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Sascha Hauera1365272005-05-05 15:14:15 -07001/*
Ben Dooks41c340f2008-02-05 00:02:15 +00002 * Davicom DM9000 Fast Ethernet driver for Linux.
Sascha Hauera1365272005-05-05 15:14:15 -07003 * Copyright (C) 1997 Sten Wang
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
Ben Dooks41c340f2008-02-05 00:02:15 +000015 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
Sascha Hauera1365272005-05-05 15:14:15 -070016 *
Ben Dooks41c340f2008-02-05 00:02:15 +000017 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauera1365272005-05-05 15:14:15 -070020 */
21
22#include <linux/module.h>
23#include <linux/ioport.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/init.h>
27#include <linux/skbuff.h>
Sascha Hauera1365272005-05-05 15:14:15 -070028#include <linux/spinlock.h>
29#include <linux/crc32.h>
30#include <linux/mii.h>
Ben Dooks7da99852008-02-05 00:02:06 +000031#include <linux/ethtool.h>
Sascha Hauera1365272005-05-05 15:14:15 -070032#include <linux/dm9000.h>
33#include <linux/delay.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010034#include <linux/platform_device.h>
Daniel Mack4e4fc052008-01-23 14:54:50 +010035#include <linux/irq.h>
Sascha Hauera1365272005-05-05 15:14:15 -070036
37#include <asm/delay.h>
38#include <asm/irq.h>
39#include <asm/io.h>
40
41#include "dm9000.h"
42
43/* Board/System/Debug information/definition ---------------- */
44
45#define DM9000_PHY 0x40 /* PHY address 0x01 */
46
Ben Dooks59eae1f2008-06-24 22:16:01 +010047#define CARDNAME "dm9000"
48#define DRV_VERSION "1.31"
Sascha Hauera1365272005-05-05 15:14:15 -070049
Alex Landauf40d24d2007-07-12 12:11:48 +080050#ifdef CONFIG_BLACKFIN
51#define readsb insb
52#define readsw insw
53#define readsl insl
54#define writesb outsb
55#define writesw outsw
56#define writesl outsl
Alex Landauf40d24d2007-07-12 12:11:48 +080057#endif
58
Sascha Hauera1365272005-05-05 15:14:15 -070059/*
60 * Transmit timeout, default 5 seconds.
61 */
62static int watchdog = 5000;
63module_param(watchdog, int, 0400);
64MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
65
Ben Dooks9a2f0372008-02-05 00:02:10 +000066/* DM9000 register address locking.
67 *
68 * The DM9000 uses an address register to control where data written
69 * to the data register goes. This means that the address register
70 * must be preserved over interrupts or similar calls.
71 *
72 * During interrupt and other critical calls, a spinlock is used to
73 * protect the system, but the calls themselves save the address
74 * in the address register in case they are interrupting another
75 * access to the device.
76 *
77 * For general accesses a lock is provided so that calls which are
78 * allowed to sleep are serialised so that the address register does
79 * not need to be saved. This lock also serves to serialise access
80 * to the EEPROM and PHY access registers which are shared between
81 * these two devices.
82 */
83
Ben Dooks6d406b32008-06-24 22:15:59 +010084/* The driver supports the original DM9000E, and now the two newer
85 * devices, DM9000A and DM9000B.
86 */
87
88enum dm9000_type {
89 TYPE_DM9000E, /* original DM9000 */
90 TYPE_DM9000A,
91 TYPE_DM9000B
92};
93
Sascha Hauera1365272005-05-05 15:14:15 -070094/* Structure/enum declaration ------------------------------- */
95typedef struct board_info {
96
Ben Dooks59eae1f2008-06-24 22:16:01 +010097 void __iomem *io_addr; /* Register I/O base address */
98 void __iomem *io_data; /* Data I/O address */
99 u16 irq; /* IRQ */
Sascha Hauera1365272005-05-05 15:14:15 -0700100
Ben Dooks59eae1f2008-06-24 22:16:01 +0100101 u16 tx_pkt_cnt;
102 u16 queue_pkt_len;
103 u16 queue_start_addr;
104 u16 dbug_cnt;
105 u8 io_mode; /* 0:word, 2:byte */
106 u8 phy_addr;
107 u8 imr_all;
108
109 unsigned int flags;
110 unsigned int in_suspend :1;
111 int debug_level;
Sascha Hauera1365272005-05-05 15:14:15 -0700112
Ben Dooks6d406b32008-06-24 22:15:59 +0100113 enum dm9000_type type;
Ben Dooks5b2b4ff2008-02-05 00:02:03 +0000114
Sascha Hauera1365272005-05-05 15:14:15 -0700115 void (*inblk)(void __iomem *port, void *data, int length);
116 void (*outblk)(void __iomem *port, void *data, int length);
117 void (*dumpblk)(void __iomem *port, int length);
118
Ben Dooksa76836f2008-02-05 00:02:02 +0000119 struct device *dev; /* parent device */
120
Sascha Hauera1365272005-05-05 15:14:15 -0700121 struct resource *addr_res; /* resources found */
122 struct resource *data_res;
123 struct resource *addr_req; /* resources requested */
124 struct resource *data_req;
125 struct resource *irq_res;
126
Ben Dooks9a2f0372008-02-05 00:02:10 +0000127 struct mutex addr_lock; /* phy and eeprom access lock */
128
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100129 struct delayed_work phy_poll;
130 struct net_device *ndev;
131
Ben Dooks59eae1f2008-06-24 22:16:01 +0100132 spinlock_t lock;
Sascha Hauera1365272005-05-05 15:14:15 -0700133
134 struct mii_if_info mii;
Ben Dooks59eae1f2008-06-24 22:16:01 +0100135 u32 msg_enable;
Sascha Hauera1365272005-05-05 15:14:15 -0700136} board_info_t;
137
Ben Dooks5b2b4ff2008-02-05 00:02:03 +0000138/* debug code */
139
140#define dm9000_dbg(db, lev, msg...) do { \
141 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
142 (lev) < db->debug_level) { \
143 dev_dbg(db->dev, msg); \
144 } \
145} while (0)
146
Ben Dooks7da99852008-02-05 00:02:06 +0000147static inline board_info_t *to_dm9000_board(struct net_device *dev)
148{
149 return dev->priv;
150}
151
Sascha Hauera1365272005-05-05 15:14:15 -0700152/* DM9000 network board routine ---------------------------- */
153
154static void
155dm9000_reset(board_info_t * db)
156{
Ben Dooksa76836f2008-02-05 00:02:02 +0000157 dev_dbg(db->dev, "resetting device\n");
158
Sascha Hauera1365272005-05-05 15:14:15 -0700159 /* RESET device */
160 writeb(DM9000_NCR, db->io_addr);
161 udelay(200);
162 writeb(NCR_RST, db->io_data);
163 udelay(200);
164}
165
166/*
167 * Read a byte from I/O port
168 */
169static u8
170ior(board_info_t * db, int reg)
171{
172 writeb(reg, db->io_addr);
173 return readb(db->io_data);
174}
175
176/*
177 * Write a byte to I/O port
178 */
179
180static void
181iow(board_info_t * db, int reg, int value)
182{
183 writeb(reg, db->io_addr);
184 writeb(value, db->io_data);
185}
186
187/* routines for sending block to chip */
188
189static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
190{
191 writesb(reg, data, count);
192}
193
194static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
195{
196 writesw(reg, data, (count+1) >> 1);
197}
198
199static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
200{
201 writesl(reg, data, (count+3) >> 2);
202}
203
204/* input block from chip to memory */
205
206static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
207{
Sascha Hauer5f6b5512005-06-20 15:32:51 -0700208 readsb(reg, data, count);
Sascha Hauera1365272005-05-05 15:14:15 -0700209}
210
211
212static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
213{
214 readsw(reg, data, (count+1) >> 1);
215}
216
217static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
218{
219 readsl(reg, data, (count+3) >> 2);
220}
221
222/* dump block from chip to null */
223
224static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
225{
226 int i;
227 int tmp;
228
229 for (i = 0; i < count; i++)
230 tmp = readb(reg);
231}
232
233static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
234{
235 int i;
236 int tmp;
237
238 count = (count + 1) >> 1;
239
240 for (i = 0; i < count; i++)
241 tmp = readw(reg);
242}
243
244static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
245{
246 int i;
247 int tmp;
248
249 count = (count + 3) >> 2;
250
251 for (i = 0; i < count; i++)
252 tmp = readl(reg);
253}
254
255/* dm9000_set_io
256 *
257 * select the specified set of io routines to use with the
258 * device
259 */
260
261static void dm9000_set_io(struct board_info *db, int byte_width)
262{
263 /* use the size of the data resource to work out what IO
264 * routines we want to use
265 */
266
267 switch (byte_width) {
268 case 1:
269 db->dumpblk = dm9000_dumpblk_8bit;
270 db->outblk = dm9000_outblk_8bit;
271 db->inblk = dm9000_inblk_8bit;
272 break;
273
Sascha Hauera1365272005-05-05 15:14:15 -0700274
275 case 3:
Ben Dooksa76836f2008-02-05 00:02:02 +0000276 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
277 case 2:
Sascha Hauera1365272005-05-05 15:14:15 -0700278 db->dumpblk = dm9000_dumpblk_16bit;
279 db->outblk = dm9000_outblk_16bit;
280 db->inblk = dm9000_inblk_16bit;
281 break;
282
283 case 4:
284 default:
285 db->dumpblk = dm9000_dumpblk_32bit;
286 db->outblk = dm9000_outblk_32bit;
287 db->inblk = dm9000_inblk_32bit;
288 break;
289 }
290}
291
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100292static void dm9000_schedule_poll(board_info_t *db)
293{
Ben Dooks6d406b32008-06-24 22:15:59 +0100294 if (db->type == TYPE_DM9000E)
295 schedule_delayed_work(&db->phy_poll, HZ * 2);
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100296}
Sascha Hauera1365272005-05-05 15:14:15 -0700297
Ben Dooksf42d8ae2008-02-05 00:02:21 +0000298static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
299{
300 board_info_t *dm = to_dm9000_board(dev);
301
302 if (!netif_running(dev))
303 return -EINVAL;
304
305 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
306}
307
Ben Dooksf8d79e72008-06-24 22:16:02 +0100308static unsigned int
309dm9000_read_locked(board_info_t *db, int reg)
310{
311 unsigned long flags;
312 unsigned int ret;
313
314 spin_lock_irqsave(&db->lock, flags);
315 ret = ior(db, reg);
316 spin_unlock_irqrestore(&db->lock, flags);
317
318 return ret;
319}
320
321static int dm9000_wait_eeprom(board_info_t *db)
322{
323 unsigned int status;
324 int timeout = 8; /* wait max 8msec */
325
326 /* The DM9000 data sheets say we should be able to
327 * poll the ERRE bit in EPCR to wait for the EEPROM
328 * operation. From testing several chips, this bit
329 * does not seem to work.
330 *
331 * We attempt to use the bit, but fall back to the
332 * timeout (which is why we do not return an error
333 * on expiry) to say that the EEPROM operation has
334 * completed.
335 */
336
337 while (1) {
338 status = dm9000_read_locked(db, DM9000_EPCR);
339
340 if ((status & EPCR_ERRE) == 0)
341 break;
342
Ben Dooks2fcf06c2008-06-24 22:16:05 +0100343 msleep(1);
344
Ben Dooksf8d79e72008-06-24 22:16:02 +0100345 if (timeout-- < 0) {
346 dev_dbg(db->dev, "timeout waiting EEPROM\n");
347 break;
348 }
349 }
350
351 return 0;
352}
353
354/*
355 * Read a word data from EEPROM
356 */
357static void
358dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
359{
360 unsigned long flags;
361
362 if (db->flags & DM9000_PLATF_NO_EEPROM) {
363 to[0] = 0xff;
364 to[1] = 0xff;
365 return;
366 }
367
368 mutex_lock(&db->addr_lock);
369
370 spin_lock_irqsave(&db->lock, flags);
371
372 iow(db, DM9000_EPAR, offset);
373 iow(db, DM9000_EPCR, EPCR_ERPRR);
374
375 spin_unlock_irqrestore(&db->lock, flags);
376
377 dm9000_wait_eeprom(db);
378
379 /* delay for at-least 150uS */
380 msleep(1);
381
382 spin_lock_irqsave(&db->lock, flags);
383
384 iow(db, DM9000_EPCR, 0x0);
385
386 to[0] = ior(db, DM9000_EPDRL);
387 to[1] = ior(db, DM9000_EPDRH);
388
389 spin_unlock_irqrestore(&db->lock, flags);
390
391 mutex_unlock(&db->addr_lock);
392}
393
394/*
395 * Write a word data to SROM
396 */
397static void
398dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
399{
400 unsigned long flags;
401
402 if (db->flags & DM9000_PLATF_NO_EEPROM)
403 return;
404
405 mutex_lock(&db->addr_lock);
406
407 spin_lock_irqsave(&db->lock, flags);
408 iow(db, DM9000_EPAR, offset);
409 iow(db, DM9000_EPDRH, data[1]);
410 iow(db, DM9000_EPDRL, data[0]);
411 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
412 spin_unlock_irqrestore(&db->lock, flags);
413
414 dm9000_wait_eeprom(db);
415
416 mdelay(1); /* wait at least 150uS to clear */
417
418 spin_lock_irqsave(&db->lock, flags);
419 iow(db, DM9000_EPCR, 0);
420 spin_unlock_irqrestore(&db->lock, flags);
421
422 mutex_unlock(&db->addr_lock);
423}
424
Ben Dooks7da99852008-02-05 00:02:06 +0000425/* ethtool ops */
426
427static void dm9000_get_drvinfo(struct net_device *dev,
428 struct ethtool_drvinfo *info)
429{
430 board_info_t *dm = to_dm9000_board(dev);
431
432 strcpy(info->driver, CARDNAME);
433 strcpy(info->version, DRV_VERSION);
434 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
435}
436
Ben Dookse662ee02008-02-05 00:02:12 +0000437static u32 dm9000_get_msglevel(struct net_device *dev)
438{
439 board_info_t *dm = to_dm9000_board(dev);
440
441 return dm->msg_enable;
442}
443
444static void dm9000_set_msglevel(struct net_device *dev, u32 value)
445{
446 board_info_t *dm = to_dm9000_board(dev);
447
448 dm->msg_enable = value;
449}
450
Ben Dooks7da99852008-02-05 00:02:06 +0000451static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
452{
453 board_info_t *dm = to_dm9000_board(dev);
Ben Dooks7da99852008-02-05 00:02:06 +0000454
Ben Dooks7da99852008-02-05 00:02:06 +0000455 mii_ethtool_gset(&dm->mii, cmd);
Ben Dooks7da99852008-02-05 00:02:06 +0000456 return 0;
457}
458
459static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
460{
461 board_info_t *dm = to_dm9000_board(dev);
Ben Dooks7da99852008-02-05 00:02:06 +0000462
Ben Dooks9a2f0372008-02-05 00:02:10 +0000463 return mii_ethtool_sset(&dm->mii, cmd);
Ben Dooks7da99852008-02-05 00:02:06 +0000464}
465
466static int dm9000_nway_reset(struct net_device *dev)
467{
468 board_info_t *dm = to_dm9000_board(dev);
469 return mii_nway_restart(&dm->mii);
470}
471
472static u32 dm9000_get_link(struct net_device *dev)
473{
474 board_info_t *dm = to_dm9000_board(dev);
Ben Dooksaa1eb452008-06-24 22:16:03 +0100475 u32 ret;
476
477 if (dm->flags & DM9000_PLATF_EXT_PHY)
478 ret = mii_link_ok(&dm->mii);
479 else
480 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
481
482 return ret;
Ben Dooks7da99852008-02-05 00:02:06 +0000483}
484
Ben Dooks29d52e52008-02-05 00:02:11 +0000485#define DM_EEPROM_MAGIC (0x444D394B)
486
487static int dm9000_get_eeprom_len(struct net_device *dev)
488{
489 return 128;
490}
491
492static int dm9000_get_eeprom(struct net_device *dev,
493 struct ethtool_eeprom *ee, u8 *data)
494{
495 board_info_t *dm = to_dm9000_board(dev);
496 int offset = ee->offset;
497 int len = ee->len;
498 int i;
499
500 /* EEPROM access is aligned to two bytes */
501
502 if ((len & 1) != 0 || (offset & 1) != 0)
503 return -EINVAL;
504
Ben Dooksbb44fb702008-02-05 00:02:20 +0000505 if (dm->flags & DM9000_PLATF_NO_EEPROM)
506 return -ENOENT;
507
Ben Dooks29d52e52008-02-05 00:02:11 +0000508 ee->magic = DM_EEPROM_MAGIC;
509
510 for (i = 0; i < len; i += 2)
511 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
512
513 return 0;
514}
515
516static int dm9000_set_eeprom(struct net_device *dev,
517 struct ethtool_eeprom *ee, u8 *data)
518{
519 board_info_t *dm = to_dm9000_board(dev);
520 int offset = ee->offset;
521 int len = ee->len;
522 int i;
523
524 /* EEPROM access is aligned to two bytes */
525
526 if ((len & 1) != 0 || (offset & 1) != 0)
527 return -EINVAL;
528
Ben Dooksbb44fb702008-02-05 00:02:20 +0000529 if (dm->flags & DM9000_PLATF_NO_EEPROM)
530 return -ENOENT;
531
Ben Dooks29d52e52008-02-05 00:02:11 +0000532 if (ee->magic != DM_EEPROM_MAGIC)
533 return -EINVAL;
534
535 for (i = 0; i < len; i += 2)
536 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
537
538 return 0;
539}
540
Ben Dooks7da99852008-02-05 00:02:06 +0000541static const struct ethtool_ops dm9000_ethtool_ops = {
542 .get_drvinfo = dm9000_get_drvinfo,
543 .get_settings = dm9000_get_settings,
544 .set_settings = dm9000_set_settings,
Ben Dookse662ee02008-02-05 00:02:12 +0000545 .get_msglevel = dm9000_get_msglevel,
546 .set_msglevel = dm9000_set_msglevel,
Ben Dooks7da99852008-02-05 00:02:06 +0000547 .nway_reset = dm9000_nway_reset,
548 .get_link = dm9000_get_link,
Ben Dooks29d52e52008-02-05 00:02:11 +0000549 .get_eeprom_len = dm9000_get_eeprom_len,
550 .get_eeprom = dm9000_get_eeprom,
551 .set_eeprom = dm9000_set_eeprom,
Ben Dooks7da99852008-02-05 00:02:06 +0000552};
553
Ben Dooksf8dd0ec2008-06-24 22:16:04 +0100554static void dm9000_show_carrier(board_info_t *db,
555 unsigned carrier, unsigned nsr)
556{
557 struct net_device *ndev = db->ndev;
558 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
559
560 if (carrier)
561 dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n",
562 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
563 (ncr & NCR_FDX) ? "full" : "half");
564 else
565 dev_info(db->dev, "%s: link down\n", ndev->name);
566}
567
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100568static void
569dm9000_poll_work(struct work_struct *w)
570{
571 struct delayed_work *dw = container_of(w, struct delayed_work, work);
572 board_info_t *db = container_of(dw, board_info_t, phy_poll);
Ben Dooksf8dd0ec2008-06-24 22:16:04 +0100573 struct net_device *ndev = db->ndev;
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100574
Ben Dooksf8dd0ec2008-06-24 22:16:04 +0100575 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
576 !(db->flags & DM9000_PLATF_EXT_PHY)) {
577 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
578 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
579 unsigned new_carrier;
580
581 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
582
583 if (old_carrier != new_carrier) {
584 if (netif_msg_link(db))
585 dm9000_show_carrier(db, new_carrier, nsr);
586
587 if (!new_carrier)
588 netif_carrier_off(ndev);
589 else
590 netif_carrier_on(ndev);
591 }
592 } else
593 mii_check_media(&db->mii, netif_msg_link(db), 0);
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100594
Ben Dooksf8dd0ec2008-06-24 22:16:04 +0100595 if (netif_running(ndev))
Ben Dooks8f5bf5f22008-05-08 11:36:42 +0100596 dm9000_schedule_poll(db);
597}
Ben Dooks7da99852008-02-05 00:02:06 +0000598
Sascha Hauera1365272005-05-05 15:14:15 -0700599/* dm9000_release_board
600 *
601 * release a board, and any mapped resources
602 */
603
604static void
605dm9000_release_board(struct platform_device *pdev, struct board_info *db)
606{
Sascha Hauera1365272005-05-05 15:14:15 -0700607 /* unmap our resources */
608
609 iounmap(db->io_addr);
610 iounmap(db->io_data);
611
612 /* release the resources */
613
Ben Dooks9088fa4f2008-06-24 22:16:00 +0100614 release_resource(db->data_req);
615 kfree(db->data_req);
Sascha Hauera1365272005-05-05 15:14:15 -0700616
Ben Dooks9088fa4f2008-06-24 22:16:00 +0100617 release_resource(db->addr_req);
618 kfree(db->addr_req);
Sascha Hauera1365272005-05-05 15:14:15 -0700619}
620
Ben Dooks6d406b32008-06-24 22:15:59 +0100621static unsigned char dm9000_type_to_char(enum dm9000_type type)
622{
623 switch (type) {
624 case TYPE_DM9000E: return 'e';
625 case TYPE_DM9000A: return 'a';
626 case TYPE_DM9000B: return 'b';
627 }
628
629 return '?';
630}
631
Ben Dooksf8d79e72008-06-24 22:16:02 +0100632/*
633 * Set DM9000 multicast address
634 */
635static void
636dm9000_hash_table(struct net_device *dev)
637{
638 board_info_t *db = (board_info_t *) dev->priv;
639 struct dev_mc_list *mcptr = dev->mc_list;
640 int mc_cnt = dev->mc_count;
641 int i, oft;
642 u32 hash_val;
643 u16 hash_table[4];
644 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
645 unsigned long flags;
646
647 dm9000_dbg(db, 1, "entering %s\n", __func__);
648
649 spin_lock_irqsave(&db->lock, flags);
650
651 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
652 iow(db, oft, dev->dev_addr[i]);
653
654 /* Clear Hash Table */
655 for (i = 0; i < 4; i++)
656 hash_table[i] = 0x0;
657
658 /* broadcast address */
659 hash_table[3] = 0x8000;
660
661 if (dev->flags & IFF_PROMISC)
662 rcr |= RCR_PRMSC;
663
664 if (dev->flags & IFF_ALLMULTI)
665 rcr |= RCR_ALL;
666
667 /* the multicast address in Hash Table : 64 bits */
668 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
669 hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
670 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
671 }
672
673 /* Write the hash table to MAC MD table */
674 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
675 iow(db, oft++, hash_table[i]);
676 iow(db, oft++, hash_table[i] >> 8);
677 }
678
679 iow(db, DM9000_RCR, rcr);
680 spin_unlock_irqrestore(&db->lock, flags);
681}
682
683/*
684 * Initilize dm9000 board
685 */
686static void
687dm9000_init_dm9000(struct net_device *dev)
688{
689 board_info_t *db = dev->priv;
690 unsigned int imr;
691
692 dm9000_dbg(db, 1, "entering %s\n", __func__);
693
694 /* I/O mode */
695 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
696
697 /* GPIO0 on pre-activate PHY */
698 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
699 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
700 iow(db, DM9000_GPR, 0); /* Enable PHY */
701
702 if (db->flags & DM9000_PLATF_EXT_PHY)
703 iow(db, DM9000_NCR, NCR_EXT_PHY);
704
705 /* Program operating register */
706 iow(db, DM9000_TCR, 0); /* TX Polling clear */
707 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
708 iow(db, DM9000_FCR, 0xff); /* Flow Control */
709 iow(db, DM9000_SMCR, 0); /* Special Mode */
710 /* clear TX status */
711 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
712 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
713
714 /* Set address filter table */
715 dm9000_hash_table(dev);
716
717 imr = IMR_PAR | IMR_PTM | IMR_PRM;
718 if (db->type != TYPE_DM9000E)
719 imr |= IMR_LNKCHNG;
720
721 db->imr_all = imr;
722
723 /* Enable TX/RX interrupt mask */
724 iow(db, DM9000_IMR, imr);
725
726 /* Init Driver variable */
727 db->tx_pkt_cnt = 0;
728 db->queue_pkt_len = 0;
729 dev->trans_start = 0;
730}
731
732/* Our watchdog timed out. Called by the networking layer */
733static void dm9000_timeout(struct net_device *dev)
734{
735 board_info_t *db = (board_info_t *) dev->priv;
736 u8 reg_save;
737 unsigned long flags;
738
739 /* Save previous register address */
740 reg_save = readb(db->io_addr);
741 spin_lock_irqsave(&db->lock, flags);
742
743 netif_stop_queue(dev);
744 dm9000_reset(db);
745 dm9000_init_dm9000(dev);
746 /* We can accept TX packets again */
747 dev->trans_start = jiffies;
748 netif_wake_queue(dev);
749
750 /* Restore previous register address */
751 writeb(reg_save, db->io_addr);
752 spin_unlock_irqrestore(&db->lock, flags);
753}
754
755/*
756 * Hardware start transmission.
757 * Send a packet to media from the upper layer.
758 */
759static int
760dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
761{
762 unsigned long flags;
763 board_info_t *db = dev->priv;
764
765 dm9000_dbg(db, 3, "%s:\n", __func__);
766
767 if (db->tx_pkt_cnt > 1)
768 return 1;
769
770 spin_lock_irqsave(&db->lock, flags);
771
772 /* Move data to DM9000 TX RAM */
773 writeb(DM9000_MWCMD, db->io_addr);
774
775 (db->outblk)(db->io_data, skb->data, skb->len);
776 dev->stats.tx_bytes += skb->len;
777
778 db->tx_pkt_cnt++;
779 /* TX control: First packet immediately send, second packet queue */
780 if (db->tx_pkt_cnt == 1) {
781 /* Set TX length to DM9000 */
782 iow(db, DM9000_TXPLL, skb->len);
783 iow(db, DM9000_TXPLH, skb->len >> 8);
784
785 /* Issue TX polling command */
786 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
787
788 dev->trans_start = jiffies; /* save the time stamp */
789 } else {
790 /* Second packet */
791 db->queue_pkt_len = skb->len;
792 netif_stop_queue(dev);
793 }
794
795 spin_unlock_irqrestore(&db->lock, flags);
796
797 /* free this SKB */
798 dev_kfree_skb(skb);
799
800 return 0;
801}
802
803/*
804 * DM9000 interrupt handler
805 * receive the packet to upper layer, free the transmitted packet
806 */
807
808static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
809{
810 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
811
812 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
813 /* One packet sent complete */
814 db->tx_pkt_cnt--;
815 dev->stats.tx_packets++;
816
817 if (netif_msg_tx_done(db))
818 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
819
820 /* Queue packet check & send */
821 if (db->tx_pkt_cnt > 0) {
822 iow(db, DM9000_TXPLL, db->queue_pkt_len);
823 iow(db, DM9000_TXPLH, db->queue_pkt_len >> 8);
824 iow(db, DM9000_TCR, TCR_TXREQ);
825 dev->trans_start = jiffies;
826 }
827 netif_wake_queue(dev);
828 }
829}
830
831struct dm9000_rxhdr {
832 u8 RxPktReady;
833 u8 RxStatus;
834 __le16 RxLen;
835} __attribute__((__packed__));
836
837/*
838 * Received a packet and pass to upper layer
839 */
840static void
841dm9000_rx(struct net_device *dev)
842{
843 board_info_t *db = (board_info_t *) dev->priv;
844 struct dm9000_rxhdr rxhdr;
845 struct sk_buff *skb;
846 u8 rxbyte, *rdptr;
847 bool GoodPacket;
848 int RxLen;
849
850 /* Check packet ready or not */
851 do {
852 ior(db, DM9000_MRCMDX); /* Dummy read */
853
854 /* Get most updated data */
855 rxbyte = readb(db->io_data);
856
857 /* Status check: this byte must be 0 or 1 */
858 if (rxbyte > DM9000_PKT_RDY) {
859 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
860 iow(db, DM9000_RCR, 0x00); /* Stop Device */
861 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
862 return;
863 }
864
865 if (rxbyte != DM9000_PKT_RDY)
866 return;
867
868 /* A packet ready now & Get status/length */
869 GoodPacket = true;
870 writeb(DM9000_MRCMD, db->io_addr);
871
872 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
873
874 RxLen = le16_to_cpu(rxhdr.RxLen);
875
876 if (netif_msg_rx_status(db))
877 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
878 rxhdr.RxStatus, RxLen);
879
880 /* Packet Status check */
881 if (RxLen < 0x40) {
882 GoodPacket = false;
883 if (netif_msg_rx_err(db))
884 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
885 }
886
887 if (RxLen > DM9000_PKT_MAX) {
888 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
889 }
890
Ben Dooksf8e5e772008-07-17 20:29:13 +0100891 /* rxhdr.RxStatus is identical to RSR register. */
892 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
893 RSR_PLE | RSR_RWTO |
894 RSR_LCS | RSR_RF)) {
Ben Dooksf8d79e72008-06-24 22:16:02 +0100895 GoodPacket = false;
Ben Dooksf8e5e772008-07-17 20:29:13 +0100896 if (rxhdr.RxStatus & RSR_FOE) {
Ben Dooksf8d79e72008-06-24 22:16:02 +0100897 if (netif_msg_rx_err(db))
898 dev_dbg(db->dev, "fifo error\n");
899 dev->stats.rx_fifo_errors++;
900 }
Ben Dooksf8e5e772008-07-17 20:29:13 +0100901 if (rxhdr.RxStatus & RSR_CE) {
Ben Dooksf8d79e72008-06-24 22:16:02 +0100902 if (netif_msg_rx_err(db))
903 dev_dbg(db->dev, "crc error\n");
904 dev->stats.rx_crc_errors++;
905 }
Ben Dooksf8e5e772008-07-17 20:29:13 +0100906 if (rxhdr.RxStatus & RSR_RF) {
Ben Dooksf8d79e72008-06-24 22:16:02 +0100907 if (netif_msg_rx_err(db))
908 dev_dbg(db->dev, "length error\n");
909 dev->stats.rx_length_errors++;
910 }
911 }
912
913 /* Move data from DM9000 */
914 if (GoodPacket
915 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
916 skb_reserve(skb, 2);
917 rdptr = (u8 *) skb_put(skb, RxLen - 4);
918
919 /* Read received packet from RX SRAM */
920
921 (db->inblk)(db->io_data, rdptr, RxLen);
922 dev->stats.rx_bytes += RxLen;
923
924 /* Pass to upper layer */
925 skb->protocol = eth_type_trans(skb, dev);
926 netif_rx(skb);
927 dev->stats.rx_packets++;
928
929 } else {
930 /* need to dump the packet's data */
931
932 (db->dumpblk)(db->io_data, RxLen);
933 }
934 } while (rxbyte == DM9000_PKT_RDY);
935}
936
937static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
938{
939 struct net_device *dev = dev_id;
940 board_info_t *db = dev->priv;
941 int int_status;
942 u8 reg_save;
943
944 dm9000_dbg(db, 3, "entering %s\n", __func__);
945
946 /* A real interrupt coming */
947
948 spin_lock(&db->lock);
949
950 /* Save previous register address */
951 reg_save = readb(db->io_addr);
952
953 /* Disable all interrupts */
954 iow(db, DM9000_IMR, IMR_PAR);
955
956 /* Got DM9000 interrupt status */
957 int_status = ior(db, DM9000_ISR); /* Got ISR */
958 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
959
960 if (netif_msg_intr(db))
961 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
962
963 /* Received the coming packet */
964 if (int_status & ISR_PRS)
965 dm9000_rx(dev);
966
967 /* Trnasmit Interrupt check */
968 if (int_status & ISR_PTS)
969 dm9000_tx_done(dev, db);
970
971 if (db->type != TYPE_DM9000E) {
972 if (int_status & ISR_LNKCHNG) {
973 /* fire a link-change request */
974 schedule_delayed_work(&db->phy_poll, 1);
975 }
976 }
977
978 /* Re-enable interrupt mask */
979 iow(db, DM9000_IMR, db->imr_all);
980
981 /* Restore previous register address */
982 writeb(reg_save, db->io_addr);
983
984 spin_unlock(&db->lock);
985
986 return IRQ_HANDLED;
987}
988
989#ifdef CONFIG_NET_POLL_CONTROLLER
990/*
991 *Used by netconsole
992 */
993static void dm9000_poll_controller(struct net_device *dev)
994{
995 disable_irq(dev->irq);
996 dm9000_interrupt(dev->irq, dev);
997 enable_irq(dev->irq);
998}
999#endif
1000
1001/*
1002 * Open the interface.
1003 * The interface is opened whenever "ifconfig" actives it.
1004 */
1005static int
1006dm9000_open(struct net_device *dev)
1007{
1008 board_info_t *db = dev->priv;
1009 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1010
1011 if (netif_msg_ifup(db))
1012 dev_dbg(db->dev, "enabling %s\n", dev->name);
1013
1014 /* If there is no IRQ type specified, default to something that
1015 * may work, and tell the user that this is a problem */
1016
Ben Dooks6ff4ff02008-06-24 22:16:07 +01001017 if (irqflags == IRQF_TRIGGER_NONE)
Ben Dooksf8d79e72008-06-24 22:16:02 +01001018 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
Ben Dooks6ff4ff02008-06-24 22:16:07 +01001019
Ben Dooksf8d79e72008-06-24 22:16:02 +01001020 irqflags |= IRQF_SHARED;
1021
1022 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
1023 return -EAGAIN;
1024
1025 /* Initialize DM9000 board */
1026 dm9000_reset(db);
1027 dm9000_init_dm9000(dev);
1028
1029 /* Init driver variable */
1030 db->dbug_cnt = 0;
1031
1032 mii_check_media(&db->mii, netif_msg_link(db), 1);
1033 netif_start_queue(dev);
1034
1035 dm9000_schedule_poll(db);
1036
1037 return 0;
1038}
1039
1040/*
1041 * Sleep, either by using msleep() or if we are suspending, then
1042 * use mdelay() to sleep.
1043 */
1044static void dm9000_msleep(board_info_t *db, unsigned int ms)
1045{
1046 if (db->in_suspend)
1047 mdelay(ms);
1048 else
1049 msleep(ms);
1050}
1051
1052/*
1053 * Read a word from phyxcer
1054 */
1055static int
1056dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1057{
1058 board_info_t *db = (board_info_t *) dev->priv;
1059 unsigned long flags;
1060 unsigned int reg_save;
1061 int ret;
1062
1063 mutex_lock(&db->addr_lock);
1064
1065 spin_lock_irqsave(&db->lock,flags);
1066
1067 /* Save previous register address */
1068 reg_save = readb(db->io_addr);
1069
1070 /* Fill the phyxcer register into REG_0C */
1071 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1072
Ben Dooksf8e5e772008-07-17 20:29:13 +01001073 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); /* Issue phyxcer read command */
Ben Dooksf8d79e72008-06-24 22:16:02 +01001074
1075 writeb(reg_save, db->io_addr);
1076 spin_unlock_irqrestore(&db->lock,flags);
1077
1078 dm9000_msleep(db, 1); /* Wait read complete */
1079
1080 spin_lock_irqsave(&db->lock,flags);
1081 reg_save = readb(db->io_addr);
1082
1083 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1084
1085 /* The read data keeps on REG_0D & REG_0E */
1086 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1087
1088 /* restore the previous address */
1089 writeb(reg_save, db->io_addr);
1090 spin_unlock_irqrestore(&db->lock,flags);
1091
1092 mutex_unlock(&db->addr_lock);
1093
1094 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1095 return ret;
1096}
1097
1098/*
1099 * Write a word to phyxcer
1100 */
1101static void
1102dm9000_phy_write(struct net_device *dev,
1103 int phyaddr_unused, int reg, int value)
1104{
1105 board_info_t *db = (board_info_t *) dev->priv;
1106 unsigned long flags;
1107 unsigned long reg_save;
1108
1109 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1110 mutex_lock(&db->addr_lock);
1111
1112 spin_lock_irqsave(&db->lock,flags);
1113
1114 /* Save previous register address */
1115 reg_save = readb(db->io_addr);
1116
1117 /* Fill the phyxcer register into REG_0C */
1118 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1119
1120 /* Fill the written data into REG_0D & REG_0E */
1121 iow(db, DM9000_EPDRL, value);
1122 iow(db, DM9000_EPDRH, value >> 8);
1123
Ben Dooksf8e5e772008-07-17 20:29:13 +01001124 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); /* Issue phyxcer write command */
Ben Dooksf8d79e72008-06-24 22:16:02 +01001125
1126 writeb(reg_save, db->io_addr);
1127 spin_unlock_irqrestore(&db->lock, flags);
1128
1129 dm9000_msleep(db, 1); /* Wait write complete */
1130
1131 spin_lock_irqsave(&db->lock,flags);
1132 reg_save = readb(db->io_addr);
1133
1134 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1135
1136 /* restore the previous address */
1137 writeb(reg_save, db->io_addr);
1138
1139 spin_unlock_irqrestore(&db->lock, flags);
1140 mutex_unlock(&db->addr_lock);
1141}
1142
1143static void
1144dm9000_shutdown(struct net_device *dev)
1145{
1146 board_info_t *db = dev->priv;
1147
1148 /* RESET device */
1149 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1150 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1151 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1152 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1153}
1154
1155/*
1156 * Stop the interface.
1157 * The interface is stopped when it is brought.
1158 */
1159static int
1160dm9000_stop(struct net_device *ndev)
1161{
1162 board_info_t *db = ndev->priv;
1163
1164 if (netif_msg_ifdown(db))
1165 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1166
1167 cancel_delayed_work_sync(&db->phy_poll);
1168
1169 netif_stop_queue(ndev);
1170 netif_carrier_off(ndev);
1171
1172 /* free interrupt */
1173 free_irq(ndev->irq, ndev);
1174
1175 dm9000_shutdown(ndev);
1176
1177 return 0;
1178}
1179
Sascha Hauera1365272005-05-05 15:14:15 -07001180#define res_size(_r) (((_r)->end - (_r)->start) + 1)
1181
1182/*
1183 * Search DM9000 board, allocate space and register it
1184 */
Enrico Scholze21fd4f02008-05-08 11:33:03 +01001185static int __devinit
Russell King3ae5eae2005-11-09 22:32:44 +00001186dm9000_probe(struct platform_device *pdev)
Sascha Hauera1365272005-05-05 15:14:15 -07001187{
Sascha Hauera1365272005-05-05 15:14:15 -07001188 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1189 struct board_info *db; /* Point a board information structure */
1190 struct net_device *ndev;
Ben Dooks179c7432008-02-05 00:02:23 +00001191 const unsigned char *mac_src;
Sascha Hauera1365272005-05-05 15:14:15 -07001192 int ret = 0;
1193 int iosize;
1194 int i;
1195 u32 id_val;
1196
Sascha Hauera1365272005-05-05 15:14:15 -07001197 /* Init network device */
Ben Dooksf8d79e72008-06-24 22:16:02 +01001198 ndev = alloc_etherdev(sizeof(struct board_info));
Sascha Hauera1365272005-05-05 15:14:15 -07001199 if (!ndev) {
Ben Dooksa76836f2008-02-05 00:02:02 +00001200 dev_err(&pdev->dev, "could not allocate device.\n");
Sascha Hauera1365272005-05-05 15:14:15 -07001201 return -ENOMEM;
1202 }
1203
Russell King3ae5eae2005-11-09 22:32:44 +00001204 SET_NETDEV_DEV(ndev, &pdev->dev);
Sascha Hauera1365272005-05-05 15:14:15 -07001205
Enrico Scholz37d5dca2008-05-08 11:35:13 +01001206 dev_dbg(&pdev->dev, "dm9000_probe()\n");
Sascha Hauera1365272005-05-05 15:14:15 -07001207
1208 /* setup board info structure */
Ben Dooksf8d79e72008-06-24 22:16:02 +01001209 db = ndev->priv;
1210 memset(db, 0, sizeof(*db));
Sascha Hauera1365272005-05-05 15:14:15 -07001211
Ben Dooksa76836f2008-02-05 00:02:02 +00001212 db->dev = &pdev->dev;
Ben Dooks8f5bf5f22008-05-08 11:36:42 +01001213 db->ndev = ndev;
Ben Dooksa76836f2008-02-05 00:02:02 +00001214
Ben Dooks9ef9ac52005-07-23 17:25:18 +01001215 spin_lock_init(&db->lock);
Ben Dooks9a2f0372008-02-05 00:02:10 +00001216 mutex_init(&db->addr_lock);
Ben Dooks9ef9ac52005-07-23 17:25:18 +01001217
Ben Dooks8f5bf5f22008-05-08 11:36:42 +01001218 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1219
Laurent Pinchart08c3f572008-06-24 22:15:57 +01001220 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1221 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1222 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1223
1224 if (db->addr_res == NULL || db->data_res == NULL ||
1225 db->irq_res == NULL) {
1226 dev_err(db->dev, "insufficient resources\n");
1227 ret = -ENOENT;
1228 goto out;
1229 }
1230
1231 iosize = res_size(db->addr_res);
1232 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1233 pdev->name);
1234
1235 if (db->addr_req == NULL) {
1236 dev_err(db->dev, "cannot claim address reg area\n");
1237 ret = -EIO;
1238 goto out;
1239 }
1240
1241 db->io_addr = ioremap(db->addr_res->start, iosize);
1242
1243 if (db->io_addr == NULL) {
1244 dev_err(db->dev, "failed to ioremap address reg\n");
1245 ret = -EINVAL;
1246 goto out;
1247 }
1248
1249 iosize = res_size(db->data_res);
1250 db->data_req = request_mem_region(db->data_res->start, iosize,
1251 pdev->name);
1252
1253 if (db->data_req == NULL) {
1254 dev_err(db->dev, "cannot claim data reg area\n");
1255 ret = -EIO;
1256 goto out;
1257 }
1258
1259 db->io_data = ioremap(db->data_res->start, iosize);
1260
1261 if (db->io_data == NULL) {
1262 dev_err(db->dev, "failed to ioremap data reg\n");
1263 ret = -EINVAL;
1264 goto out;
1265 }
1266
1267 /* fill in parameters for net-dev structure */
1268 ndev->base_addr = (unsigned long)db->io_addr;
1269 ndev->irq = db->irq_res->start;
1270
1271 /* ensure at least we have a default set of IO routines */
1272 dm9000_set_io(db, iosize);
1273
Sascha Hauera1365272005-05-05 15:14:15 -07001274 /* check to see if anything is being over-ridden */
1275 if (pdata != NULL) {
1276 /* check to see if the driver wants to over-ride the
1277 * default IO width */
1278
1279 if (pdata->flags & DM9000_PLATF_8BITONLY)
1280 dm9000_set_io(db, 1);
1281
1282 if (pdata->flags & DM9000_PLATF_16BITONLY)
1283 dm9000_set_io(db, 2);
1284
1285 if (pdata->flags & DM9000_PLATF_32BITONLY)
1286 dm9000_set_io(db, 4);
1287
1288 /* check to see if there are any IO routine
1289 * over-rides */
1290
1291 if (pdata->inblk != NULL)
1292 db->inblk = pdata->inblk;
1293
1294 if (pdata->outblk != NULL)
1295 db->outblk = pdata->outblk;
1296
1297 if (pdata->dumpblk != NULL)
1298 db->dumpblk = pdata->dumpblk;
Ben Dooks33ba5092008-02-05 00:02:01 +00001299
1300 db->flags = pdata->flags;
Sascha Hauera1365272005-05-05 15:14:15 -07001301 }
1302
Ben Dooksf8dd0ec2008-06-24 22:16:04 +01001303#ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1304 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1305#endif
1306
Sascha Hauera1365272005-05-05 15:14:15 -07001307 dm9000_reset(db);
1308
Ben Dooks59eae1f2008-06-24 22:16:01 +01001309 /* try multiple times, DM9000 sometimes gets the read wrong */
Ben Dooks513b6be2008-02-05 00:02:22 +00001310 for (i = 0; i < 8; i++) {
Sascha Hauera1365272005-05-05 15:14:15 -07001311 id_val = ior(db, DM9000_VIDL);
1312 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1313 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1314 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1315
1316 if (id_val == DM9000_ID)
1317 break;
Ben Dooksa76836f2008-02-05 00:02:02 +00001318 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
Sascha Hauera1365272005-05-05 15:14:15 -07001319 }
1320
1321 if (id_val != DM9000_ID) {
Ben Dooksa76836f2008-02-05 00:02:02 +00001322 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
Mike Rapoport418d6f82007-10-18 09:23:11 +02001323 ret = -ENODEV;
1324 goto out;
Sascha Hauera1365272005-05-05 15:14:15 -07001325 }
1326
Ben Dooks6d406b32008-06-24 22:15:59 +01001327 /* Identify what type of DM9000 we are working on */
1328
1329 id_val = ior(db, DM9000_CHIPR);
1330 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1331
1332 switch (id_val) {
1333 case CHIPR_DM9000A:
1334 db->type = TYPE_DM9000A;
1335 break;
1336 case CHIPR_DM9000B:
1337 db->type = TYPE_DM9000B;
1338 break;
1339 default:
1340 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1341 db->type = TYPE_DM9000E;
1342 }
1343
Sascha Hauera1365272005-05-05 15:14:15 -07001344 /* from this point we assume that we have found a DM9000 */
1345
1346 /* driver system function */
1347 ether_setup(ndev);
1348
1349 ndev->open = &dm9000_open;
1350 ndev->hard_start_xmit = &dm9000_start_xmit;
1351 ndev->tx_timeout = &dm9000_timeout;
1352 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1353 ndev->stop = &dm9000_stop;
Sascha Hauera1365272005-05-05 15:14:15 -07001354 ndev->set_multicast_list = &dm9000_hash_table;
Ben Dooks7da99852008-02-05 00:02:06 +00001355 ndev->ethtool_ops = &dm9000_ethtool_ops;
Ben Dooksf42d8ae2008-02-05 00:02:21 +00001356 ndev->do_ioctl = &dm9000_ioctl;
Ben Dooks7da99852008-02-05 00:02:06 +00001357
Kevin Hao2fd0e332006-08-14 23:00:15 -07001358#ifdef CONFIG_NET_POLL_CONTROLLER
1359 ndev->poll_controller = &dm9000_poll_controller;
1360#endif
Sascha Hauera1365272005-05-05 15:14:15 -07001361
Sascha Hauera1365272005-05-05 15:14:15 -07001362 db->msg_enable = NETIF_MSG_LINK;
1363 db->mii.phy_id_mask = 0x1f;
1364 db->mii.reg_num_mask = 0x1f;
1365 db->mii.force_media = 0;
1366 db->mii.full_duplex = 0;
1367 db->mii.dev = ndev;
1368 db->mii.mdio_read = dm9000_phy_read;
1369 db->mii.mdio_write = dm9000_phy_write;
1370
Ben Dooks179c7432008-02-05 00:02:23 +00001371 mac_src = "eeprom";
1372
Ben Dooks86c62fa2008-02-05 00:02:09 +00001373 /* try reading the node address from the attached EEPROM */
1374 for (i = 0; i < 6; i += 2)
1375 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
Sascha Hauera1365272005-05-05 15:14:15 -07001376
Laurent Pinchartfe414242008-07-23 17:41:52 +02001377 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1378 mac_src = "platform data";
1379 memcpy(ndev->dev_addr, pdata->dev_addr, 6);
1380 }
1381
Ben Dooks5b55dda2006-06-13 23:50:15 +01001382 if (!is_valid_ether_addr(ndev->dev_addr)) {
1383 /* try reading from mac */
Ben Dooksf8d79e72008-06-24 22:16:02 +01001384
Ben Dooks179c7432008-02-05 00:02:23 +00001385 mac_src = "chip";
Ben Dooks5b55dda2006-06-13 23:50:15 +01001386 for (i = 0; i < 6; i++)
1387 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1388 }
1389
Sascha Hauera1365272005-05-05 15:14:15 -07001390 if (!is_valid_ether_addr(ndev->dev_addr))
Ben Dooksa76836f2008-02-05 00:02:02 +00001391 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1392 "set using ifconfig\n", ndev->name);
Sascha Hauera1365272005-05-05 15:14:15 -07001393
Russell King3ae5eae2005-11-09 22:32:44 +00001394 platform_set_drvdata(pdev, ndev);
Sascha Hauera1365272005-05-05 15:14:15 -07001395 ret = register_netdev(ndev);
1396
1397 if (ret == 0) {
Joe Perches0795af52007-10-03 17:59:30 -07001398 DECLARE_MAC_BUF(mac);
Ben Dooks6d406b32008-06-24 22:15:59 +01001399 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %s (%s)\n",
1400 ndev->name, dm9000_type_to_char(db->type),
1401 db->io_addr, db->io_data, ndev->irq,
Ben Dooks179c7432008-02-05 00:02:23 +00001402 print_mac(mac, ndev->dev_addr), mac_src);
Sascha Hauera1365272005-05-05 15:14:15 -07001403 }
1404 return 0;
1405
Mike Rapoport418d6f82007-10-18 09:23:11 +02001406out:
Ben Dooksa76836f2008-02-05 00:02:02 +00001407 dev_err(db->dev, "not found (%d).\n", ret);
Sascha Hauera1365272005-05-05 15:14:15 -07001408
1409 dm9000_release_board(pdev, db);
Ben Dooks9fd9f9b2007-05-07 11:13:25 +00001410 free_netdev(ndev);
Sascha Hauera1365272005-05-05 15:14:15 -07001411
1412 return ret;
1413}
1414
Sascha Hauera1365272005-05-05 15:14:15 -07001415static int
Russell King3ae5eae2005-11-09 22:32:44 +00001416dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
Sascha Hauera1365272005-05-05 15:14:15 -07001417{
Russell King3ae5eae2005-11-09 22:32:44 +00001418 struct net_device *ndev = platform_get_drvdata(dev);
Ben Dooks321f69a2008-02-05 00:02:08 +00001419 board_info_t *db;
Sascha Hauera1365272005-05-05 15:14:15 -07001420
Russell King9480e302005-10-28 09:52:56 -07001421 if (ndev) {
Ben Dooks321f69a2008-02-05 00:02:08 +00001422 db = (board_info_t *) ndev->priv;
1423 db->in_suspend = 1;
1424
Sascha Hauera1365272005-05-05 15:14:15 -07001425 if (netif_running(ndev)) {
1426 netif_device_detach(ndev);
1427 dm9000_shutdown(ndev);
1428 }
1429 }
1430 return 0;
1431}
1432
1433static int
Russell King3ae5eae2005-11-09 22:32:44 +00001434dm9000_drv_resume(struct platform_device *dev)
Sascha Hauera1365272005-05-05 15:14:15 -07001435{
Russell King3ae5eae2005-11-09 22:32:44 +00001436 struct net_device *ndev = platform_get_drvdata(dev);
Sascha Hauera1365272005-05-05 15:14:15 -07001437 board_info_t *db = (board_info_t *) ndev->priv;
1438
Russell King9480e302005-10-28 09:52:56 -07001439 if (ndev) {
Sascha Hauera1365272005-05-05 15:14:15 -07001440
1441 if (netif_running(ndev)) {
1442 dm9000_reset(db);
1443 dm9000_init_dm9000(ndev);
1444
1445 netif_device_attach(ndev);
1446 }
Ben Dooks321f69a2008-02-05 00:02:08 +00001447
1448 db->in_suspend = 0;
Sascha Hauera1365272005-05-05 15:14:15 -07001449 }
1450 return 0;
1451}
1452
Enrico Scholze21fd4f02008-05-08 11:33:03 +01001453static int __devexit
Russell King3ae5eae2005-11-09 22:32:44 +00001454dm9000_drv_remove(struct platform_device *pdev)
Sascha Hauera1365272005-05-05 15:14:15 -07001455{
Russell King3ae5eae2005-11-09 22:32:44 +00001456 struct net_device *ndev = platform_get_drvdata(pdev);
Sascha Hauera1365272005-05-05 15:14:15 -07001457
Russell King3ae5eae2005-11-09 22:32:44 +00001458 platform_set_drvdata(pdev, NULL);
Sascha Hauera1365272005-05-05 15:14:15 -07001459
1460 unregister_netdev(ndev);
1461 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
Ben Dooks9fd9f9b2007-05-07 11:13:25 +00001462 free_netdev(ndev); /* free device structure */
Sascha Hauera1365272005-05-05 15:14:15 -07001463
Ben Dooksa76836f2008-02-05 00:02:02 +00001464 dev_dbg(&pdev->dev, "released and freed device\n");
Sascha Hauera1365272005-05-05 15:14:15 -07001465 return 0;
1466}
1467
Russell King3ae5eae2005-11-09 22:32:44 +00001468static struct platform_driver dm9000_driver = {
Ben Dooks5d22a312006-06-14 00:09:17 +01001469 .driver = {
1470 .name = "dm9000",
1471 .owner = THIS_MODULE,
1472 },
Sascha Hauera1365272005-05-05 15:14:15 -07001473 .probe = dm9000_probe,
Enrico Scholze21fd4f02008-05-08 11:33:03 +01001474 .remove = __devexit_p(dm9000_drv_remove),
Sascha Hauera1365272005-05-05 15:14:15 -07001475 .suspend = dm9000_drv_suspend,
1476 .resume = dm9000_drv_resume,
1477};
1478
1479static int __init
1480dm9000_init(void)
1481{
Ben Dooks7da99852008-02-05 00:02:06 +00001482 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
Ben Dooks2ae2d772005-07-23 17:29:38 +01001483
Ben Dooks59eae1f2008-06-24 22:16:01 +01001484 return platform_driver_register(&dm9000_driver);
Sascha Hauera1365272005-05-05 15:14:15 -07001485}
1486
1487static void __exit
1488dm9000_cleanup(void)
1489{
Russell King3ae5eae2005-11-09 22:32:44 +00001490 platform_driver_unregister(&dm9000_driver);
Sascha Hauera1365272005-05-05 15:14:15 -07001491}
1492
1493module_init(dm9000_init);
1494module_exit(dm9000_cleanup);
1495
1496MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1497MODULE_DESCRIPTION("Davicom DM9000 network driver");
1498MODULE_LICENSE("GPL");
Kay Sievers72abb462008-04-18 13:50:44 -07001499MODULE_ALIAS("platform:dm9000");