blob: 05658275ba176b1d7a22f09a469709d1f196da51 [file] [log] [blame]
Alexander Duyckb3890e32014-09-20 19:46:05 -04001/* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2014 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#ifndef _FM10K_H_
22#define _FM10K_H_
23
24#include <linux/types.h>
25#include <linux/etherdevice.h>
26#include <linux/rtnetlink.h>
27#include <linux/if_vlan.h>
28#include <linux/pci.h>
Alexander Duycka211e012014-09-20 19:54:07 -040029#include <linux/net_tstamp.h>
30#include <linux/clocksource.h>
31#include <linux/ptp_clock_kernel.h>
Alexander Duyckb3890e32014-09-20 19:46:05 -040032
Alexander Duyck0e7b3642014-09-20 19:48:10 -040033#include "fm10k_pf.h"
Alexander Duyck5cb8db42014-09-20 19:51:40 -040034#include "fm10k_vf.h"
Alexander Duyck0e7b3642014-09-20 19:48:10 -040035
36#define FM10K_MAX_JUMBO_FRAME_SIZE 15358 /* Maximum supported size 15K */
37
Alexander Duycke27ef592014-09-20 19:49:03 -040038#define MAX_QUEUES FM10K_MAX_QUEUES_PF
39
40#define FM10K_MIN_RXD 128
41#define FM10K_MAX_RXD 4096
42#define FM10K_DEFAULT_RXD 256
43
44#define FM10K_MIN_TXD 128
45#define FM10K_MAX_TXD 4096
46#define FM10K_DEFAULT_TXD 256
47#define FM10K_DEFAULT_TX_WORK 256
48
49#define FM10K_RXBUFFER_256 256
50#define FM10K_RXBUFFER_16384 16384
51#define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256
52#if PAGE_SIZE <= FM10K_RXBUFFER_16384
53#define FM10K_RX_BUFSZ (PAGE_SIZE / 2)
54#else
55#define FM10K_RX_BUFSZ FM10K_RXBUFFER_16384
56#endif
57
58/* How many Rx Buffers do we bundle into one write to the hardware ? */
59#define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */
60
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -040061#define FM10K_MAX_STATIONS 63
62struct fm10k_l2_accel {
63 int size;
64 u16 count;
65 u16 dglort;
66 struct rcu_head rcu;
67 struct net_device *macvlan[0];
68};
69
Alexander Duycke27ef592014-09-20 19:49:03 -040070enum fm10k_ring_state_t {
71 __FM10K_TX_DETECT_HANG,
72 __FM10K_HANG_CHECK_ARMED,
73};
74
75#define check_for_tx_hang(ring) \
76 test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
77#define set_check_for_tx_hang(ring) \
78 set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
79#define clear_check_for_tx_hang(ring) \
80 clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
81
82struct fm10k_tx_buffer {
83 struct fm10k_tx_desc *next_to_watch;
84 struct sk_buff *skb;
85 unsigned int bytecount;
86 u16 gso_segs;
87 u16 tx_flags;
88 DEFINE_DMA_UNMAP_ADDR(dma);
89 DEFINE_DMA_UNMAP_LEN(len);
90};
91
92struct fm10k_rx_buffer {
93 dma_addr_t dma;
94 struct page *page;
95 u32 page_offset;
96};
97
98struct fm10k_queue_stats {
99 u64 packets;
100 u64 bytes;
101};
102
103struct fm10k_tx_queue_stats {
104 u64 restart_queue;
105 u64 csum_err;
106 u64 tx_busy;
107 u64 tx_done_old;
108};
109
110struct fm10k_rx_queue_stats {
111 u64 alloc_failed;
112 u64 csum_err;
113 u64 errors;
114};
115
116struct fm10k_ring {
117 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
118 struct net_device *netdev; /* netdev ring belongs to */
119 struct device *dev; /* device for DMA mapping */
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -0400120 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */
Alexander Duycke27ef592014-09-20 19:49:03 -0400121 void *desc; /* descriptor ring memory */
122 union {
123 struct fm10k_tx_buffer *tx_buffer;
124 struct fm10k_rx_buffer *rx_buffer;
125 };
126 u32 __iomem *tail;
127 unsigned long state;
128 dma_addr_t dma; /* phys. address of descriptor ring */
129 unsigned int size; /* length in bytes */
130
131 u8 queue_index; /* needed for queue management */
132 u8 reg_idx; /* holds the special value that gets
133 * the hardware register offset
134 * associated with this ring, which is
135 * different for DCB and RSS modes
136 */
137 u8 qos_pc; /* priority class of queue */
138 u16 vid; /* default vlan ID of queue */
139 u16 count; /* amount of descriptors */
140
141 u16 next_to_alloc;
142 u16 next_to_use;
143 u16 next_to_clean;
144
145 struct fm10k_queue_stats stats;
146 struct u64_stats_sync syncp;
147 union {
148 /* Tx */
149 struct fm10k_tx_queue_stats tx_stats;
150 /* Rx */
151 struct {
152 struct fm10k_rx_queue_stats rx_stats;
153 struct sk_buff *skb;
154 };
155 };
156} ____cacheline_internodealigned_in_smp;
157
Alexander Duyck18283ca2014-09-20 19:48:51 -0400158struct fm10k_ring_container {
Alexander Duycke27ef592014-09-20 19:49:03 -0400159 struct fm10k_ring *ring; /* pointer to linked list of rings */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400160 unsigned int total_bytes; /* total bytes processed this int */
161 unsigned int total_packets; /* total packets processed this int */
162 u16 work_limit; /* total work allowed per interrupt */
163 u16 itr; /* interrupt throttle rate value */
164 u8 count; /* total number of rings in vector */
165};
166
167#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
168#define FM10K_ITR_10K 100 /* 100us */
169#define FM10K_ITR_20K 50 /* 50us */
170#define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
171
172#define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
173
Alexander Duycke27ef592014-09-20 19:49:03 -0400174static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
175{
176 return &ring->netdev->_tx[ring->queue_index];
177}
178
179/* iterator for handling rings in ring container */
180#define fm10k_for_each_ring(pos, head) \
181 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
182
Alexander Duyck18283ca2014-09-20 19:48:51 -0400183#define MAX_Q_VECTORS 256
184#define MIN_Q_VECTORS 1
185enum fm10k_non_q_vectors {
186 FM10K_MBX_VECTOR,
Alexander Duyck5cb8db42014-09-20 19:51:40 -0400187#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
Alexander Duyck18283ca2014-09-20 19:48:51 -0400188 NON_Q_VECTORS_PF
189};
190
191#define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
192 NON_Q_VECTORS_PF : \
Alexander Duyck5cb8db42014-09-20 19:51:40 -0400193 NON_Q_VECTORS_VF)
Alexander Duyck18283ca2014-09-20 19:48:51 -0400194#define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
195
196struct fm10k_q_vector {
197 struct fm10k_intfc *interface;
198 u32 __iomem *itr; /* pointer to ITR register for this vector */
199 u16 v_idx; /* index of q_vector within interface array */
200 struct fm10k_ring_container rx, tx;
201
202 struct napi_struct napi;
203 char name[IFNAMSIZ + 9];
204
Alexander Duyck7461fd92014-09-20 19:53:23 -0400205#ifdef CONFIG_DEBUG_FS
206 struct dentry *dbg_q_vector;
207#endif /* CONFIG_DEBUG_FS */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400208 struct rcu_head rcu; /* to avoid race with update stats on free */
Alexander Duycke27ef592014-09-20 19:49:03 -0400209
210 /* for dynamic allocation of rings associated with this q_vector */
211 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400212};
213
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400214enum fm10k_ring_f_enum {
215 RING_F_RSS,
216 RING_F_QOS,
217 RING_F_ARRAY_SIZE /* must be last in enum set */
218};
219
220struct fm10k_ring_feature {
221 u16 limit; /* upper limit on feature indices */
222 u16 indices; /* current value of indices */
223 u16 mask; /* Mask used for feature to ring mapping */
224 u16 offset; /* offset to start of feature */
225};
226
Alexander Duyck883a9cc2014-09-20 19:52:09 -0400227struct fm10k_iov_data {
228 unsigned int num_vfs;
229 unsigned int next_vf_mbx;
230 struct rcu_head rcu;
231 struct fm10k_vf_info vf_info[0];
232};
233
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400234#define fm10k_vxlan_port_for_each(vp, intfc) \
235 list_for_each_entry(vp, &(intfc)->vxlan_port, list)
236struct fm10k_vxlan_port {
237 struct list_head list;
238 sa_family_t sa_family;
239 __be16 port;
240};
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400241
242struct fm10k_intfc {
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400243 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
244 struct net_device *netdev;
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -0400245 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400246 struct pci_dev *pdev;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400247 unsigned long state;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400248
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400249 u32 flags;
250#define FM10K_FLAG_RESET_REQUESTED (u32)(1 << 0)
251#define FM10K_FLAG_RSS_FIELD_IPV4_UDP (u32)(1 << 1)
252#define FM10K_FLAG_RSS_FIELD_IPV6_UDP (u32)(1 << 2)
253#define FM10K_FLAG_RX_TS_ENABLED (u32)(1 << 3)
254#define FM10K_FLAG_SWPRI_CONFIG (u32)(1 << 4)
255 int xcast_mode;
256
Alexander Duyck18283ca2014-09-20 19:48:51 -0400257 /* Tx fast path data */
258 int num_tx_queues;
259 u16 tx_itr;
260
261 /* Rx fast path data */
262 int num_rx_queues;
263 u16 rx_itr;
264
Alexander Duycke27ef592014-09-20 19:49:03 -0400265 /* TX */
266 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
267
Alexander Duyckb7d85142014-09-20 19:49:25 -0400268 u64 restart_queue;
269 u64 tx_busy;
270 u64 tx_csum_errors;
271 u64 alloc_failed;
272 u64 rx_csum_errors;
273 u64 rx_errors;
274
275 u64 tx_bytes_nic;
276 u64 tx_packets_nic;
277 u64 rx_bytes_nic;
278 u64 rx_packets_nic;
279 u64 rx_drops_nic;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400280 u64 rx_overrun_pf;
281 u64 rx_overrun_vf;
Alexander Duyckb7d85142014-09-20 19:49:25 -0400282 u32 tx_timeout_count;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400283
Alexander Duycke27ef592014-09-20 19:49:03 -0400284 /* RX */
285 struct fm10k_ring *rx_ring[MAX_QUEUES];
286
Alexander Duyck18283ca2014-09-20 19:48:51 -0400287 /* Queueing vectors */
288 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
289 struct msix_entry *msix_entries;
290 int num_q_vectors; /* current number of q_vectors for device */
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400291 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
292
Alexander Duyck883a9cc2014-09-20 19:52:09 -0400293 /* SR-IOV information management structure */
294 struct fm10k_iov_data *iov_data;
295
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400296 struct fm10k_hw_stats stats;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400297 struct fm10k_hw hw;
298 u32 __iomem *uc_addr;
Alexander Duycka211e012014-09-20 19:54:07 -0400299 u32 __iomem *sw_addr;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400300 u16 msg_enable;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400301 u16 tx_ring_count;
302 u16 rx_ring_count;
Alexander Duyckb7d85142014-09-20 19:49:25 -0400303 struct timer_list service_timer;
304 struct work_struct service_task;
305 unsigned long next_stats_update;
306 unsigned long next_tx_hang_check;
307 unsigned long last_reset;
308 unsigned long link_down_event;
309 bool host_ready;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400310
311 u32 reta[FM10K_RETA_SIZE];
312 u32 rssrk[FM10K_RSSRK_SIZE];
313
314 /* VXLAN port tracking information */
315 struct list_head vxlan_port;
316
Alexander Duyck7461fd92014-09-20 19:53:23 -0400317#ifdef CONFIG_DEBUG_FS
318 struct dentry *dbg_intfc;
319
320#endif /* CONFIG_DEBUG_FS */
Alexander Duycka211e012014-09-20 19:54:07 -0400321 struct ptp_clock_info ptp_caps;
322 struct ptp_clock *ptp_clock;
323
324 struct sk_buff_head ts_tx_skb_queue;
325 u32 tx_hwtstamp_timeouts;
326
327 struct hwtstamp_config ts_config;
328 /* We are unable to actually adjust the clock beyond the frequency
329 * value. Once the clock is started there is no resetting it. As
330 * such we maintain a separate offset from the actual hardware clock
331 * to allow for offset adjustment.
332 */
333 s64 ptp_adjust;
334 rwlock_t systime_lock;
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400335#ifdef CONFIG_DCB
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400336 u8 pfc_en;
337#endif
338 u8 rx_pause;
339
340 /* GLORT resources in use by PF */
341 u16 glort;
342 u16 glort_count;
343
344 /* VLAN ID for updating multicast/unicast lists */
345 u16 vid;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400346};
Alexander Duyckb3890e32014-09-20 19:46:05 -0400347
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400348enum fm10k_state_t {
349 __FM10K_RESETTING,
350 __FM10K_DOWN,
Alexander Duyckb7d85142014-09-20 19:49:25 -0400351 __FM10K_SERVICE_SCHED,
352 __FM10K_SERVICE_DISABLE,
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400353 __FM10K_MBX_LOCK,
354 __FM10K_LINK_DOWN,
355};
356
357static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
358{
359 /* busy loop if we cannot obtain the lock as some calls
360 * such as ndo_set_rx_mode may be made in atomic context
361 */
362 while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
363 udelay(20);
364}
365
366static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
367{
368 /* flush memory to make sure state is correct */
369 smp_mb__before_atomic();
370 clear_bit(__FM10K_MBX_LOCK, &interface->state);
371}
372
373static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
374{
375 return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
376}
377
Alexander Duycke27ef592014-09-20 19:49:03 -0400378/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
379static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
380 const u32 stat_err_bits)
381{
382 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
383}
384
385/* fm10k_desc_unused - calculate if we have unused descriptors */
386static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
387{
388 s16 unused = ring->next_to_clean - ring->next_to_use - 1;
389
390 return likely(unused < 0) ? unused + ring->count : unused;
391}
392
393#define FM10K_TX_DESC(R, i) \
394 (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
395#define FM10K_RX_DESC(R, i) \
396 (&(((union fm10k_rx_desc *)((R)->desc))[i]))
397
398#define FM10K_MAX_TXD_PWR 14
399#define FM10K_MAX_DATA_PER_TXD (1 << FM10K_MAX_TXD_PWR)
400
401/* Tx Descriptors needed, worst case */
402#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
403#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
404
405enum fm10k_tx_flags {
406 /* Tx offload flags */
407 FM10K_TX_FLAGS_CSUM = 0x01,
408};
409
410/* This structure is stored as little endian values as that is the native
411 * format of the Rx descriptor. The ordering of these fields is reversed
412 * from the actual ftag header to allow for a single bswap to take care
413 * of placing all of the values in network order
414 */
415union fm10k_ftag_info {
416 __le64 ftag;
417 struct {
418 /* dglort and sglort combined into a single 32bit desc read */
419 __le32 glort;
420 /* upper 16 bits of vlan are reserved 0 for swpri_type_user */
421 __le32 vlan;
422 } d;
423 struct {
424 __le16 dglort;
425 __le16 sglort;
426 __le16 vlan;
427 __le16 swpri_type_user;
428 } w;
429};
430
431struct fm10k_cb {
Alexander Duycka211e012014-09-20 19:54:07 -0400432 union {
433 __le64 tstamp;
434 unsigned long ts_tx_timeout;
435 };
Alexander Duycke27ef592014-09-20 19:49:03 -0400436 union fm10k_ftag_info fi;
437};
438
439#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
440
Alexander Duyckb3890e32014-09-20 19:46:05 -0400441/* main */
442extern char fm10k_driver_name[];
443extern const char fm10k_driver_version[];
Alexander Duyck18283ca2014-09-20 19:48:51 -0400444int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
445void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
Alexander Duyckb101c962014-09-20 19:50:03 -0400446netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
447 struct fm10k_ring *tx_ring);
448void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
449bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
450void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400451
452/* PCI */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400453void fm10k_mbx_free_irq(struct fm10k_intfc *);
454int fm10k_mbx_request_irq(struct fm10k_intfc *);
455void fm10k_qv_free_irq(struct fm10k_intfc *interface);
456int fm10k_qv_request_irq(struct fm10k_intfc *interface);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400457int fm10k_register_pci_driver(void);
458void fm10k_unregister_pci_driver(void);
Alexander Duyck504c5ea2014-09-20 19:48:29 -0400459void fm10k_up(struct fm10k_intfc *interface);
460void fm10k_down(struct fm10k_intfc *interface);
Alexander Duyckb7d85142014-09-20 19:49:25 -0400461void fm10k_update_stats(struct fm10k_intfc *interface);
462void fm10k_service_event_schedule(struct fm10k_intfc *interface);
463void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400464
465/* Netdev */
466struct net_device *fm10k_alloc_netdev(void);
Alexander Duyck3abaae42014-09-20 19:49:43 -0400467int fm10k_setup_rx_resources(struct fm10k_ring *);
468int fm10k_setup_tx_resources(struct fm10k_ring *);
469void fm10k_free_rx_resources(struct fm10k_ring *);
470void fm10k_free_tx_resources(struct fm10k_ring *);
471void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
472void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
473void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
474 struct fm10k_tx_buffer *);
Alexander Duyck8f5e20d2014-09-20 19:48:20 -0400475void fm10k_restore_rx_state(struct fm10k_intfc *);
476void fm10k_reset_rx_state(struct fm10k_intfc *);
Alexander Duyckaa3ac822014-09-20 19:50:42 -0400477int fm10k_setup_tc(struct net_device *dev, u8 tc);
Alexander Duyck504c5ea2014-09-20 19:48:29 -0400478int fm10k_open(struct net_device *netdev);
479int fm10k_close(struct net_device *netdev);
Alexander Duyck82dd0f72014-09-20 19:50:15 -0400480
481/* Ethtool */
482void fm10k_set_ethtool_ops(struct net_device *dev);
Alexander Duyck883a9cc2014-09-20 19:52:09 -0400483
484/* IOV */
485s32 fm10k_iov_event(struct fm10k_intfc *interface);
486s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
487void fm10k_iov_suspend(struct pci_dev *pdev);
488int fm10k_iov_resume(struct pci_dev *pdev);
489void fm10k_iov_disable(struct pci_dev *pdev);
490int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
491s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
492int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
493int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
494 int vf_idx, u16 vid, u8 qos);
495int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
496 int unused);
497int fm10k_ndo_get_vf_config(struct net_device *netdev,
498 int vf_idx, struct ifla_vf_info *ivi);
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400499
Alexander Duyck7461fd92014-09-20 19:53:23 -0400500/* DebugFS */
501#ifdef CONFIG_DEBUG_FS
502void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
503void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
504void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
505void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
506void fm10k_dbg_init(void);
507void fm10k_dbg_exit(void);
508#else
509static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
510static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
511static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
512static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
513static inline void fm10k_dbg_init(void) {}
514static inline void fm10k_dbg_exit(void) {}
515#endif /* CONFIG_DEBUG_FS */
516
Alexander Duycka211e012014-09-20 19:54:07 -0400517/* Time Stamping */
518void fm10k_systime_to_hwtstamp(struct fm10k_intfc *interface,
519 struct skb_shared_hwtstamps *hwtstamp,
520 u64 systime);
521void fm10k_ts_tx_enqueue(struct fm10k_intfc *interface, struct sk_buff *skb);
522void fm10k_ts_tx_hwtstamp(struct fm10k_intfc *interface, __le16 dglort,
523 u64 systime);
524void fm10k_ts_reset(struct fm10k_intfc *interface);
525void fm10k_ts_init(struct fm10k_intfc *interface);
526void fm10k_ts_tx_subtask(struct fm10k_intfc *interface);
527void fm10k_ptp_register(struct fm10k_intfc *interface);
528void fm10k_ptp_unregister(struct fm10k_intfc *interface);
529int fm10k_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
530int fm10k_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
531
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400532/* DCB */
533void fm10k_dcbnl_set_ops(struct net_device *dev);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400534#endif /* _FM10K_H_ */