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Dong Aishengae75ff82012-04-27 20:26:16 +08001/*
2 * IMX pinmux core definitions
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef __DRIVERS_PINCTRL_IMX_H
16#define __DRIVERS_PINCTRL_IMX_H
17
18struct platform_device;
19
20/**
21 * struct imx_pin_group - describes an IMX pin group
22 * @name: the name of this specific pin group
23 * @pins: an array of discrete physical pins used in this group, taken
24 * from the driver-local pin enumeration space
25 * @npins: the number of pins in this group array, i.e. the number of
26 * elements in .pins so we can iterate over that array
27 * @mux_mode: the mux mode for each pin in this group. The size of this
28 * array is the same as pins.
Shawn Guoe1641532013-02-20 10:32:52 +080029 * @input_reg: select input register offset for this mux if any
30 * 0 if no select input setting needed.
31 * @input_val: the select input value for each pin in this group. The size of
32 * this array is the same as pins.
Dong Aishengae75ff82012-04-27 20:26:16 +080033 * @configs: the config for each pin in this group. The size of this
34 * array is the same as pins.
35 */
36struct imx_pin_group {
37 const char *name;
38 unsigned int *pins;
39 unsigned npins;
40 unsigned int *mux_mode;
Shawn Guoe1641532013-02-20 10:32:52 +080041 u16 *input_reg;
42 unsigned int *input_val;
Dong Aishengae75ff82012-04-27 20:26:16 +080043 unsigned long *configs;
44};
45
46/**
47 * struct imx_pmx_func - describes IMX pinmux functions
48 * @name: the name of this specific function
49 * @groups: corresponding pin groups
50 * @num_groups: the number of groups
51 */
52struct imx_pmx_func {
53 const char *name;
54 const char **groups;
55 unsigned num_groups;
56};
57
58/**
59 * struct imx_pin_reg - describe a pin reg map
Dong Aishengae75ff82012-04-27 20:26:16 +080060 * @mux_reg: mux register offset
61 * @conf_reg: config register offset
Dong Aishengae75ff82012-04-27 20:26:16 +080062 */
63struct imx_pin_reg {
Dong Aishengae75ff82012-04-27 20:26:16 +080064 u16 mux_reg;
65 u16 conf_reg;
Dong Aishengae75ff82012-04-27 20:26:16 +080066};
67
68struct imx_pinctrl_soc_info {
69 struct device *dev;
70 const struct pinctrl_pin_desc *pins;
71 unsigned int npins;
Shawn Guoe1641532013-02-20 10:32:52 +080072 struct imx_pin_reg *pin_regs;
Dong Aishengae75ff82012-04-27 20:26:16 +080073 struct imx_pin_group *groups;
74 unsigned int ngroups;
75 struct imx_pmx_func *functions;
76 unsigned int nfunctions;
77};
78
79#define NO_MUX 0x0
80#define NO_PAD 0x0
81
Dong Aishengae75ff82012-04-27 20:26:16 +080082#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
83
84#define PAD_CTL_MASK(len) ((1 << len) - 1)
85#define IMX_MUX_MASK 0x7
86#define IOMUXC_CONFIG_SION (0x1 << 4)
87
88int imx_pinctrl_probe(struct platform_device *pdev,
89 struct imx_pinctrl_soc_info *info);
90int imx_pinctrl_remove(struct platform_device *pdev);
91#endif /* __DRIVERS_PINCTRL_IMX_H */