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Andrew Victorc42dcb32007-05-11 19:24:18 +01001/*
2 * Copyright (C) 2005 SAN People
3 * Copyright (C) 2007 Atmel Corporation
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file COPYING in the main directory of this archive for
7 * more details.
8 */
9
10#include <linux/types.h>
11#include <linux/init.h>
12#include <linux/mm.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/spi/spi.h>
16#include <linux/fb.h>
17#include <linux/clk.h>
18
19#include <video/atmel_lcdc.h>
20
21#include <asm/hardware.h>
22#include <asm/setup.h>
23#include <asm/mach-types.h>
24#include <asm/irq.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include <asm/arch/board.h>
31#include <asm/arch/gpio.h>
Andrew Victorb78eabd2008-04-02 21:38:40 +010032#include <asm/arch/at91sam9_smc.h>
Andrew Victorc42dcb32007-05-11 19:24:18 +010033
34#include "generic.h"
35
36
Andrew Victorc42dcb32007-05-11 19:24:18 +010037static void __init ek_map_io(void)
38{
39 /* Initialize processor: 12.000 MHz crystal */
40 at91sam9rl_initialize(12000000);
41
Andrew Victora3da1222008-04-02 21:47:29 +010042 /* DGBU on ttyS0. (Rx & Tx only) */
43 at91_register_uart(0, 0, 0);
44
45 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
46 at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
47
48 /* set serial console to ttyS0 (ie, DBGU) */
49 at91_set_serial_console(0);
Andrew Victorc42dcb32007-05-11 19:24:18 +010050}
51
52static void __init ek_init_irq(void)
53{
54 at91sam9rl_init_interrupts(NULL);
55}
56
57
58/*
59 * MCI (SD/MMC)
60 */
61static struct at91_mmc_data __initdata ek_mmc_data = {
62 .wire4 = 1,
63 .det_pin = AT91_PIN_PA15,
64// .wp_pin = ... not connected
65// .vcc_pin = ... not connected
66};
67
68
69/*
70 * NAND flash
71 */
72static struct mtd_partition __initdata ek_nand_partition[] = {
73 {
74 .name = "Partition 1",
75 .offset = 0,
76 .size = 256 * 1024,
77 },
78 {
79 .name = "Partition 2",
80 .offset = 256 * 1024 ,
81 .size = MTDPART_SIZ_FULL,
82 },
83};
84
Russell Kingcdea4602007-05-30 17:48:45 +010085static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
Andrew Victorc42dcb32007-05-11 19:24:18 +010086{
87 *num_partitions = ARRAY_SIZE(ek_nand_partition);
88 return ek_nand_partition;
89}
90
91static struct at91_nand_data __initdata ek_nand_data = {
92 .ale = 21,
93 .cle = 22,
94// .det_pin = ... not connected
95 .rdy_pin = AT91_PIN_PD17,
96 .enable_pin = AT91_PIN_PB6,
97 .partition_info = nand_partitions,
98 .bus_width_16 = 0,
99};
100
101
102/*
103 * SPI devices
104 */
105static struct spi_board_info ek_spi_devices[] = {
106 { /* DataFlash chip */
107 .modalias = "mtd_dataflash",
108 .chip_select = 0,
109 .max_speed_hz = 15 * 1000 * 1000,
110 .bus_num = 0,
111 },
112};
113
114
115/*
116 * LCD Controller
117 */
118#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
119static struct fb_videomode at91_tft_vga_modes[] = {
120 {
121 .name = "TX09D50VM1CCA @ 60",
122 .refresh = 60,
123 .xres = 240, .yres = 320,
124 .pixclock = KHZ2PICOS(4965),
125
126 .left_margin = 1, .right_margin = 33,
127 .upper_margin = 1, .lower_margin = 0,
128 .hsync_len = 5, .vsync_len = 1,
129
130 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
131 .vmode = FB_VMODE_NONINTERLACED,
132 },
133};
134
135static struct fb_monspecs at91fb_default_monspecs = {
136 .manufacturer = "HIT",
137 .monitor = "TX09D50VM1CCA",
138
139 .modedb = at91_tft_vga_modes,
140 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
141 .hfmin = 15000,
142 .hfmax = 64000,
143 .vfmin = 50,
144 .vfmax = 150,
145};
146
147#define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
148 | ATMEL_LCDC_DISTYPE_TFT \
149 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
150
151static void at91_lcdc_power_control(int on)
152{
153 if (on)
154 at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
155 else
156 at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
157}
158
159/* Driver datas */
160static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
161 .default_bpp = 16,
162 .default_dmacon = ATMEL_LCDC_DMAEN,
163 .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2,
164 .default_monspecs = &at91fb_default_monspecs,
165 .atmel_lcdfb_power_control = at91_lcdc_power_control,
166 .guard_time = 1,
167};
168
169#else
170static struct atmel_lcdfb_info __initdata ek_lcdc_data;
171#endif
172
173
174static void __init ek_board_init(void)
175{
176 /* Serial */
177 at91_add_device_serial();
178 /* I2C */
Andrew Victorf230d3f2007-11-19 13:47:20 +0100179 at91_add_device_i2c(NULL, 0);
Andrew Victorc42dcb32007-05-11 19:24:18 +0100180 /* NAND */
181 at91_add_device_nand(&ek_nand_data);
182 /* SPI */
183 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
184 /* MMC */
185 at91_add_device_mmc(0, &ek_mmc_data);
186 /* LCD Controller */
187 at91_add_device_lcdc(&ek_lcdc_data);
188}
189
190MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
191 /* Maintainer: Atmel */
192 .phys_io = AT91_BASE_SYS,
193 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
194 .boot_params = AT91_SDRAM_BASE + 0x100,
195 .timer = &at91sam926x_timer,
196 .map_io = ek_map_io,
197 .init_irq = ek_init_irq,
198 .init_machine = ek_board_init,
199MACHINE_END