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Tang Yuantiandefa4c72013-06-05 09:30:48 +00001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
Tang Yuantiana4f20742015-03-13 12:39:01 +08004 * CPU Frequency Scaling driver for Freescale QorIQ SoCs.
Tang Yuantiandefa4c72013-06-05 09:30:48 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13#include <linux/clk.h>
14#include <linux/cpufreq.h>
15#include <linux/errno.h>
Tang Yuantiandefa4c72013-06-05 09:30:48 +000016#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/of.h>
21#include <linux/slab.h>
22#include <linux/smp.h>
23
Geert Uytterhoeven5877b4f2015-03-04 12:56:20 +010024#include <asm/smp.h> /* for get_hard_smp_processor_id() in UP configs */
25
Tang Yuantiandefa4c72013-06-05 09:30:48 +000026/**
Tang Yuantiana4f20742015-03-13 12:39:01 +080027 * struct cpu_data
Tang Yuantiandefa4c72013-06-05 09:30:48 +000028 * @parent: the parent node of cpu clock
29 * @table: frequency table
30 */
31struct cpu_data {
Tang Yuantiandefa4c72013-06-05 09:30:48 +000032 struct device_node *parent;
33 struct cpufreq_frequency_table *table;
34};
35
36/**
37 * struct soc_data - SoC specific data
38 * @freq_mask: mask the disallowed frequencies
39 * @flag: unique flags
40 */
41struct soc_data {
42 u32 freq_mask[4];
43 u32 flag;
44};
45
46#define FREQ_MASK 1
47/* see hardware specification for the allowed frqeuencies */
48static const struct soc_data sdata[] = {
49 { /* used by p2041 and p3041 */
50 .freq_mask = {0x8, 0x8, 0x2, 0x2},
51 .flag = FREQ_MASK,
52 },
53 { /* used by p5020 */
54 .freq_mask = {0x8, 0x2},
55 .flag = FREQ_MASK,
56 },
57 { /* used by p4080, p5040 */
58 .freq_mask = {0},
59 .flag = 0,
60 },
61};
62
63/*
64 * the minimum allowed core frequency, in Hz
65 * for chassis v1.0, >= platform frequency
66 * for chassis v2.0, >= platform frequency / 2
67 */
68static u32 min_cpufreq;
69static const u32 *fmask;
70
Tang Yuantiana4f20742015-03-13 12:39:01 +080071#if defined(CONFIG_ARM)
72static int get_cpu_physical_id(int cpu)
Tang Yuantiandefa4c72013-06-05 09:30:48 +000073{
Tang Yuantiana4f20742015-03-13 12:39:01 +080074 return topology_core_id(cpu);
75}
76#else
77static int get_cpu_physical_id(int cpu)
78{
79 return get_hard_smp_processor_id(cpu);
Tang Yuantiandefa4c72013-06-05 09:30:48 +000080}
81#endif
82
Tang Yuantiana4f20742015-03-13 12:39:01 +080083static u32 get_bus_freq(void)
84{
85 struct device_node *soc;
86 u32 sysfreq;
87
88 soc = of_find_node_by_type(NULL, "soc");
89 if (!soc)
90 return 0;
91
92 if (of_property_read_u32(soc, "bus-frequency", &sysfreq))
93 sysfreq = 0;
94
95 of_node_put(soc);
96
97 return sysfreq;
98}
99
100static struct device_node *cpu_to_clk_node(int cpu)
101{
102 struct device_node *np, *clk_np;
103
104 if (!cpu_present(cpu))
105 return NULL;
106
107 np = of_get_cpu_node(cpu, NULL);
108 if (!np)
109 return NULL;
110
111 clk_np = of_parse_phandle(np, "clocks", 0);
112 if (!clk_np)
113 return NULL;
114
115 of_node_put(np);
116
117 return clk_np;
118}
119
120/* traverse cpu nodes to get cpu mask of sharing clock wire */
121static void set_affected_cpus(struct cpufreq_policy *policy)
122{
123 struct device_node *np, *clk_np;
124 struct cpumask *dstp = policy->cpus;
125 int i;
126
127 np = cpu_to_clk_node(policy->cpu);
128 if (!np)
129 return;
130
131 for_each_present_cpu(i) {
132 clk_np = cpu_to_clk_node(i);
133 if (!clk_np)
134 continue;
135
136 if (clk_np == np)
137 cpumask_set_cpu(i, dstp);
138
139 of_node_put(clk_np);
140 }
141 of_node_put(np);
142}
143
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000144/* reduce the duplicated frequencies in frequency table */
145static void freq_table_redup(struct cpufreq_frequency_table *freq_table,
146 int count)
147{
148 int i, j;
149
150 for (i = 1; i < count; i++) {
151 for (j = 0; j < i; j++) {
152 if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID ||
153 freq_table[j].frequency !=
154 freq_table[i].frequency)
155 continue;
156
157 freq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
158 break;
159 }
160 }
161}
162
163/* sort the frequencies in frequency table in descenting order */
164static void freq_table_sort(struct cpufreq_frequency_table *freq_table,
165 int count)
166{
167 int i, j, ind;
168 unsigned int freq, max_freq;
169 struct cpufreq_frequency_table table;
Tang Yuantiana4f20742015-03-13 12:39:01 +0800170
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000171 for (i = 0; i < count - 1; i++) {
172 max_freq = freq_table[i].frequency;
173 ind = i;
174 for (j = i + 1; j < count; j++) {
175 freq = freq_table[j].frequency;
176 if (freq == CPUFREQ_ENTRY_INVALID ||
177 freq <= max_freq)
178 continue;
179 ind = j;
180 max_freq = freq;
181 }
182
183 if (ind != i) {
184 /* exchange the frequencies */
185 table.driver_data = freq_table[i].driver_data;
186 table.frequency = freq_table[i].frequency;
187 freq_table[i].driver_data = freq_table[ind].driver_data;
188 freq_table[i].frequency = freq_table[ind].frequency;
189 freq_table[ind].driver_data = table.driver_data;
190 freq_table[ind].frequency = table.frequency;
191 }
192 }
193}
194
Tang Yuantiana4f20742015-03-13 12:39:01 +0800195static int qoriq_cpufreq_cpu_init(struct cpufreq_policy *policy)
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000196{
197 struct device_node *np;
198 int i, count, ret;
199 u32 freq, mask;
200 struct clk *clk;
201 struct cpufreq_frequency_table *table;
202 struct cpu_data *data;
203 unsigned int cpu = policy->cpu;
Ed Swarthout906fe032014-06-05 18:56:17 -0500204 u64 u64temp;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000205
206 np = of_get_cpu_node(cpu, NULL);
207 if (!np)
208 return -ENODEV;
209
210 data = kzalloc(sizeof(*data), GFP_KERNEL);
Tang Yuantiana4f20742015-03-13 12:39:01 +0800211 if (!data)
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000212 goto err_np;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000213
Viresh Kumar652ed952014-01-09 20:38:43 +0530214 policy->clk = of_clk_get(np, 0);
215 if (IS_ERR(policy->clk)) {
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000216 pr_err("%s: no clock information\n", __func__);
217 goto err_nomem2;
218 }
219
220 data->parent = of_parse_phandle(np, "clocks", 0);
221 if (!data->parent) {
222 pr_err("%s: could not get clock information\n", __func__);
223 goto err_nomem2;
224 }
225
226 count = of_property_count_strings(data->parent, "clock-names");
227 table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL);
228 if (!table) {
229 pr_err("%s: no memory\n", __func__);
230 goto err_node;
231 }
232
233 if (fmask)
Tang Yuantiana4f20742015-03-13 12:39:01 +0800234 mask = fmask[get_cpu_physical_id(cpu)];
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000235 else
236 mask = 0x0;
237
238 for (i = 0; i < count; i++) {
239 clk = of_clk_get(data->parent, i);
240 freq = clk_get_rate(clk);
241 /*
242 * the clock is valid if its frequency is not masked
243 * and large than minimum allowed frequency.
244 */
245 if (freq < min_cpufreq || (mask & (1 << i)))
246 table[i].frequency = CPUFREQ_ENTRY_INVALID;
247 else
248 table[i].frequency = freq / 1000;
249 table[i].driver_data = i;
250 }
251 freq_table_redup(table, count);
252 freq_table_sort(table, count);
253 table[i].frequency = CPUFREQ_TABLE_END;
254
255 /* set the min and max frequency properly */
Viresh Kumar6b4147d2013-09-16 18:56:28 +0530256 ret = cpufreq_table_validate_and_show(policy, table);
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000257 if (ret) {
258 pr_err("invalid frequency table: %d\n", ret);
259 goto err_nomem1;
260 }
261
262 data->table = table;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000263
264 /* update ->cpus if we have cluster, no harm if not */
Tang Yuantiana4f20742015-03-13 12:39:01 +0800265 set_affected_cpus(policy);
266 policy->driver_data = data;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000267
Ed Swarthout906fe032014-06-05 18:56:17 -0500268 /* Minimum transition latency is 12 platform clocks */
269 u64temp = 12ULL * NSEC_PER_SEC;
Tang Yuantiana4f20742015-03-13 12:39:01 +0800270 do_div(u64temp, get_bus_freq());
Ed Swarthout906fe032014-06-05 18:56:17 -0500271 policy->cpuinfo.transition_latency = u64temp + 1;
Tim Gardner6712d292014-04-28 10:18:18 -0600272
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000273 of_node_put(np);
274
275 return 0;
276
277err_nomem1:
278 kfree(table);
279err_node:
280 of_node_put(data->parent);
281err_nomem2:
Tang Yuantiana4f20742015-03-13 12:39:01 +0800282 policy->driver_data = NULL;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000283 kfree(data);
284err_np:
285 of_node_put(np);
286
287 return -ENODEV;
288}
289
Tang Yuantiana4f20742015-03-13 12:39:01 +0800290static int __exit qoriq_cpufreq_cpu_exit(struct cpufreq_policy *policy)
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000291{
Tang Yuantiana4f20742015-03-13 12:39:01 +0800292 struct cpu_data *data = policy->driver_data;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000293
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000294 of_node_put(data->parent);
295 kfree(data->table);
296 kfree(data);
Tang Yuantiana4f20742015-03-13 12:39:01 +0800297 policy->driver_data = NULL;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000298
299 return 0;
300}
301
Tang Yuantiana4f20742015-03-13 12:39:01 +0800302static int qoriq_cpufreq_target(struct cpufreq_policy *policy,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530303 unsigned int index)
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000304{
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000305 struct clk *parent;
Tang Yuantiana4f20742015-03-13 12:39:01 +0800306 struct cpu_data *data = policy->driver_data;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000307
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530308 parent = of_clk_get(data->parent, data->table[index].driver_data);
Viresh Kumar652ed952014-01-09 20:38:43 +0530309 return clk_set_parent(policy->clk, parent);
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000310}
311
Tang Yuantiana4f20742015-03-13 12:39:01 +0800312static struct cpufreq_driver qoriq_cpufreq_driver = {
313 .name = "qoriq_cpufreq",
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000314 .flags = CPUFREQ_CONST_LOOPS,
Tang Yuantiana4f20742015-03-13 12:39:01 +0800315 .init = qoriq_cpufreq_cpu_init,
316 .exit = __exit_p(qoriq_cpufreq_cpu_exit),
Viresh Kumardc2398d2013-10-03 20:28:18 +0530317 .verify = cpufreq_generic_frequency_table_verify,
Tang Yuantiana4f20742015-03-13 12:39:01 +0800318 .target_index = qoriq_cpufreq_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530319 .get = cpufreq_generic_get,
Viresh Kumardc2398d2013-10-03 20:28:18 +0530320 .attr = cpufreq_generic_attr,
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000321};
322
Tang Yuantiana4f20742015-03-13 12:39:01 +0800323static const struct of_device_id node_matches[] __initconst = {
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000324 { .compatible = "fsl,p2041-clockgen", .data = &sdata[0], },
325 { .compatible = "fsl,p3041-clockgen", .data = &sdata[0], },
326 { .compatible = "fsl,p5020-clockgen", .data = &sdata[1], },
327 { .compatible = "fsl,p4080-clockgen", .data = &sdata[2], },
328 { .compatible = "fsl,p5040-clockgen", .data = &sdata[2], },
329 { .compatible = "fsl,qoriq-clockgen-2.0", },
330 {}
331};
332
Tang Yuantiana4f20742015-03-13 12:39:01 +0800333static int __init qoriq_cpufreq_init(void)
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000334{
335 int ret;
336 struct device_node *np;
337 const struct of_device_id *match;
338 const struct soc_data *data;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000339
340 np = of_find_matching_node(NULL, node_matches);
341 if (!np)
342 return -ENODEV;
343
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000344 match = of_match_node(node_matches, np);
345 data = match->data;
346 if (data) {
347 if (data->flag)
348 fmask = data->freq_mask;
Tang Yuantiana4f20742015-03-13 12:39:01 +0800349 min_cpufreq = get_bus_freq();
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000350 } else {
Tang Yuantiana4f20742015-03-13 12:39:01 +0800351 min_cpufreq = get_bus_freq() / 2;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000352 }
353
354 of_node_put(np);
355
Tang Yuantiana4f20742015-03-13 12:39:01 +0800356 ret = cpufreq_register_driver(&qoriq_cpufreq_driver);
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000357 if (!ret)
Tang Yuantiana4f20742015-03-13 12:39:01 +0800358 pr_info("Freescale QorIQ CPU frequency scaling driver\n");
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000359
360 return ret;
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000361}
Tang Yuantiana4f20742015-03-13 12:39:01 +0800362module_init(qoriq_cpufreq_init);
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000363
Tang Yuantiana4f20742015-03-13 12:39:01 +0800364static void __exit qoriq_cpufreq_exit(void)
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000365{
Tang Yuantiana4f20742015-03-13 12:39:01 +0800366 cpufreq_unregister_driver(&qoriq_cpufreq_driver);
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000367}
Tang Yuantiana4f20742015-03-13 12:39:01 +0800368module_exit(qoriq_cpufreq_exit);
Tang Yuantiandefa4c72013-06-05 09:30:48 +0000369
370MODULE_LICENSE("GPL");
371MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
Tang Yuantiana4f20742015-03-13 12:39:01 +0800372MODULE_DESCRIPTION("cpufreq driver for Freescale QorIQ series SoCs");