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Andrew Victor907d6de2006-06-20 19:30:19 +01001/*
Andrew Victor9d041262007-02-05 11:42:07 +01002 * arch/arm/mach-at91/pm.c
Andrew Victor907d6de2006-06-20 19:30:19 +01003 * AT91 Power Management
4 *
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
Russell King2f8163b2011-07-26 10:53:52 +010013#include <linux/gpio.h>
Rafael J. Wysocki95d9ffb2007-10-18 03:04:39 -070014#include <linux/suspend.h>
Andrew Victor907d6de2006-06-20 19:30:19 +010015#include <linux/sched.h>
16#include <linux/proc_fs.h>
Andrew Victor907d6de2006-06-20 19:30:19 +010017#include <linux/interrupt.h>
18#include <linux/sysfs.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
Russell Kingfced80c2008-09-06 12:10:45 +010021#include <linux/io.h>
Andrew Victor907d6de2006-06-20 19:30:19 +010022
Andrew Victor907d6de2006-06-20 19:30:19 +010023#include <asm/irq.h>
Arun Sharma600634972011-07-26 16:09:06 -070024#include <linux/atomic.h>
Andrew Victor907d6de2006-06-20 19:30:19 +010025#include <asm/mach/time.h>
26#include <asm/mach/irq.h>
Andrew Victor907d6de2006-06-20 19:30:19 +010027
Russell Kinga09e64f2008-08-05 16:14:15 +010028#include <mach/at91_pmc.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/cpu.h>
Andrew Victor907d6de2006-06-20 19:30:19 +010030
Jean-Christophe PLAGNIOL-VILLARDa510b9b2012-10-30 06:41:28 +080031#include "at91_aic.h"
Andrew Victor907d6de2006-06-20 19:30:19 +010032#include "generic.h"
Albin Tonnerre1ea60cf2009-11-01 18:40:50 +010033#include "pm.h"
Andrew Victor907d6de2006-06-20 19:30:19 +010034
Andrew Victor565ac442008-04-02 21:52:19 +010035/*
36 * Show the reason for the previous system reset.
37 */
Andrew Victor565ac442008-04-02 21:52:19 +010038
Russell Kinga09e64f2008-08-05 16:14:15 +010039#include <mach/at91_rstc.h>
40#include <mach/at91_shdwc.h>
Andrew Victor565ac442008-04-02 21:52:19 +010041
42static void __init show_reset_status(void)
43{
44 static char reset[] __initdata = "reset";
45
46 static char general[] __initdata = "general";
47 static char wakeup[] __initdata = "wakeup";
48 static char watchdog[] __initdata = "watchdog";
49 static char software[] __initdata = "software";
50 static char user[] __initdata = "user";
51 static char unknown[] __initdata = "unknown";
52
53 static char signal[] __initdata = "signal";
54 static char rtc[] __initdata = "rtc";
55 static char rtt[] __initdata = "rtt";
56 static char restore[] __initdata = "power-restored";
57
58 char *reason, *r2 = reset;
59 u32 reset_type, wake_type;
60
Jean-Christophe PLAGNIOL-VILLARDe9f68b52011-11-18 01:25:52 +080061 if (!at91_shdwc_base || !at91_rstc_base)
Jean-Christophe PLAGNIOL-VILLARDf22deee2011-11-01 01:23:20 +080062 return;
63
Jean-Christophe PLAGNIOL-VILLARDe9f68b52011-11-18 01:25:52 +080064 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
Jean-Christophe PLAGNIOL-VILLARDf22deee2011-11-01 01:23:20 +080065 wake_type = at91_shdwc_read(AT91_SHDW_SR);
Andrew Victor565ac442008-04-02 21:52:19 +010066
67 switch (reset_type) {
68 case AT91_RSTC_RSTTYP_GENERAL:
69 reason = general;
70 break;
71 case AT91_RSTC_RSTTYP_WAKEUP:
72 /* board-specific code enabled the wakeup sources */
73 reason = wakeup;
74
75 /* "wakeup signal" */
76 if (wake_type & AT91_SHDW_WAKEUP0)
77 r2 = signal;
78 else {
79 r2 = reason;
80 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
81 reason = rtt;
82 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
83 reason = rtc;
84 else if (wake_type == 0) /* power-restored wakeup */
85 reason = restore;
86 else /* unknown wakeup */
87 reason = unknown;
88 }
89 break;
90 case AT91_RSTC_RSTTYP_WATCHDOG:
91 reason = watchdog;
92 break;
93 case AT91_RSTC_RSTTYP_SOFTWARE:
94 reason = software;
95 break;
96 case AT91_RSTC_RSTTYP_USER:
97 reason = user;
98 break;
99 default:
100 reason = unknown;
101 break;
102 }
103 pr_info("AT91: Starting after %s %s\n", reason, r2);
104}
Andrew Victor565ac442008-04-02 21:52:19 +0100105
Andrew Victor907d6de2006-06-20 19:30:19 +0100106static int at91_pm_valid_state(suspend_state_t state)
107{
108 switch (state) {
109 case PM_SUSPEND_ON:
110 case PM_SUSPEND_STANDBY:
111 case PM_SUSPEND_MEM:
112 return 1;
113
114 default:
115 return 0;
116 }
117}
118
119
120static suspend_state_t target_state;
121
122/*
123 * Called after processes are frozen, but before we shutdown devices.
124 */
Rafael J. Wysockic697eec2008-01-08 00:04:17 +0100125static int at91_pm_begin(suspend_state_t state)
Andrew Victor907d6de2006-06-20 19:30:19 +0100126{
127 target_state = state;
128 return 0;
129}
130
131/*
132 * Verify that all the clocks are correct before entering
133 * slow-clock mode.
134 */
135static int at91_pm_verify_clocks(void)
136{
137 unsigned long scsr;
138 int i;
139
Jean-Christophe PLAGNIOL-VILLARDb5514952011-11-25 09:59:46 +0800140 scsr = at91_pmc_read(AT91_PMC_SCSR);
Andrew Victor907d6de2006-06-20 19:30:19 +0100141
142 /* USB must not be using PLLB */
Andrew Victord481f862006-12-01 11:27:31 +0100143 if (cpu_is_at91rm9200()) {
144 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
Ryan Mallon7f96b1c2009-04-01 20:33:30 +0100145 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
Andrew Victord481f862006-12-01 11:27:31 +0100146 return 0;
147 }
Nicolas Ferreb319ff82009-06-26 15:37:01 +0100148 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
149 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
Andrew Victorb6b27ae2007-05-31 09:34:53 +0100150 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
Ryan Mallon7f96b1c2009-04-01 20:33:30 +0100151 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
Andrew Victorb6b27ae2007-05-31 09:34:53 +0100152 return 0;
153 }
Andrew Victor907d6de2006-06-20 19:30:19 +0100154 }
155
Arnd Bergmann9e0e4e12012-04-30 13:00:32 +0000156 if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS))
157 return 1;
158
Andrew Victor907d6de2006-06-20 19:30:19 +0100159 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
160 for (i = 0; i < 4; i++) {
161 u32 css;
162
163 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
164 continue;
165
Jean-Christophe PLAGNIOL-VILLARDb5514952011-11-25 09:59:46 +0800166 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
Andrew Victor907d6de2006-06-20 19:30:19 +0100167 if (css != AT91_PMC_CSS_SLOW) {
Ryan Mallon7f96b1c2009-04-01 20:33:30 +0100168 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
Andrew Victor907d6de2006-06-20 19:30:19 +0100169 return 0;
170 }
171 }
Andrew Victor907d6de2006-06-20 19:30:19 +0100172
173 return 1;
174}
175
176/*
177 * Call this from platform driver suspend() to see how deeply to suspend.
178 * For example, some controllers (like OHCI) need one of the PLL clocks
179 * in order to act as a wakeup source, and those are not available when
180 * going into slow clock mode.
181 *
182 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
183 * the very same problem (but not using at91 main_clk), and it'd be better
184 * to add one generic API rather than lots of platform-specific ones.
185 */
186int at91_suspend_entering_slow_clock(void)
187{
188 return (target_state == PM_SUSPEND_MEM);
189}
190EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
191
192
Jean-Christophe PLAGNIOL-VILLARDfb7e1972012-02-22 17:50:55 +0100193static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
194 void __iomem *ramc1, int memctrl);
Andrew Victor907d6de2006-06-20 19:30:19 +0100195
Andrew Victorf5d0f452008-04-02 21:50:16 +0100196#ifdef CONFIG_AT91_SLOW_CLOCK
Jean-Christophe PLAGNIOL-VILLARDfb7e1972012-02-22 17:50:55 +0100197extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
198 void __iomem *ramc1, int memctrl);
Andrew Victorf5d0f452008-04-02 21:50:16 +0100199extern u32 at91_slow_clock_sz;
200#endif
201
Andrew Victor907d6de2006-06-20 19:30:19 +0100202static int at91_pm_enter(suspend_state_t state)
203{
204 at91_gpio_suspend();
205 at91_irq_suspend();
206
207 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
208 /* remember all the always-wake irqs */
Jean-Christophe PLAGNIOL-VILLARDb5514952011-11-25 09:59:46 +0800209 (at91_pmc_read(AT91_PMC_PCSR)
Andrew Victor907d6de2006-06-20 19:30:19 +0100210 | (1 << AT91_ID_FIQ)
211 | (1 << AT91_ID_SYS)
Andrew Victor1f4fd0a2006-11-30 10:01:47 +0100212 | (at91_extern_irq))
Jean-Christophe PLAGNIOL-VILLARDbe6d4322011-11-03 01:12:50 +0800213 & at91_aic_read(AT91_AIC_IMR),
Andrew Victor907d6de2006-06-20 19:30:19 +0100214 state);
215
216 switch (state) {
217 /*
218 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
219 * drivers must suspend more deeply: only the master clock
220 * controller may be using the main oscillator.
221 */
222 case PM_SUSPEND_MEM:
223 /*
224 * Ensure that clocks are in a valid state.
225 */
226 if (!at91_pm_verify_clocks())
227 goto error;
228
229 /*
230 * Enter slow clock mode by switching over to clk32k and
231 * turning off the main oscillator; reverse on wakeup.
232 */
233 if (slow_clock) {
Jean-Christophe PLAGNIOL-VILLARDfb7e1972012-02-22 17:50:55 +0100234 int memctrl = AT91_MEMCTRL_SDRAMC;
235
236 if (cpu_is_at91rm9200())
237 memctrl = AT91_MEMCTRL_MC;
238 else if (cpu_is_at91sam9g45())
239 memctrl = AT91_MEMCTRL_DDRSDR;
Andrew Victorf5d0f452008-04-02 21:50:16 +0100240#ifdef CONFIG_AT91_SLOW_CLOCK
241 /* copy slow_clock handler to SRAM, and call it */
242 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
243#endif
Jean-Christophe PLAGNIOL-VILLARDfb7e1972012-02-22 17:50:55 +0100244 slow_clock(at91_pmc_base, at91_ramc_base[0],
245 at91_ramc_base[1], memctrl);
Andrew Victor907d6de2006-06-20 19:30:19 +0100246 break;
247 } else {
Andrew Victorf5d0f452008-04-02 21:50:16 +0100248 pr_info("AT91: PM - no slow clock mode enabled ...\n");
Andrew Victor907d6de2006-06-20 19:30:19 +0100249 /* FALLTHROUGH leaving master clock alone */
250 }
251
252 /*
253 * STANDBY mode has *all* drivers suspended; ignores irqs not
254 * marked as 'wakeup' event sources; and reduces DRAM power.
255 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
256 * nothing fancy done with main or cpu clocks.
257 */
258 case PM_SUSPEND_STANDBY:
259 /*
260 * NOTE: the Wait-for-Interrupt instruction needs to be
Andrew Victorf5d0f452008-04-02 21:50:16 +0100261 * in icache so no SDRAM accesses are needed until the
262 * wakeup IRQ occurs and self-refresh is terminated.
Nicolas Ferre8aeeda82010-10-22 17:53:39 +0200263 * For ARM 926 based chips, this requirement is weaker
264 * as at91sam9 can access a RAM in self-refresh mode.
Andrew Victor907d6de2006-06-20 19:30:19 +0100265 */
Jean-Christophe PLAGNIOL-VILLARDefd09162012-02-13 14:58:30 +0800266 if (cpu_is_at91rm9200())
267 at91rm9200_standby();
268 else if (cpu_is_at91sam9g45())
269 at91sam9g45_standby();
270 else
271 at91sam9_standby();
Andrew Victorf5d0f452008-04-02 21:50:16 +0100272 break;
Andrew Victor907d6de2006-06-20 19:30:19 +0100273
274 case PM_SUSPEND_ON:
Nicolas Ferre8aeeda82010-10-22 17:53:39 +0200275 cpu_do_idle();
Andrew Victor907d6de2006-06-20 19:30:19 +0100276 break;
277
278 default:
279 pr_debug("AT91: PM - bogus suspend state %d\n", state);
280 goto error;
281 }
282
283 pr_debug("AT91: PM - wakeup %08x\n",
Jean-Christophe PLAGNIOL-VILLARDbe6d4322011-11-03 01:12:50 +0800284 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
Andrew Victor907d6de2006-06-20 19:30:19 +0100285
286error:
287 target_state = PM_SUSPEND_ON;
288 at91_irq_resume();
289 at91_gpio_resume();
290 return 0;
291}
292
Rafael J. Wysockic697eec2008-01-08 00:04:17 +0100293/*
294 * Called right prior to thawing processes.
295 */
296static void at91_pm_end(void)
297{
298 target_state = PM_SUSPEND_ON;
299}
300
Andrew Victor907d6de2006-06-20 19:30:19 +0100301
Lionel Debroux2f55ac02010-11-16 14:14:02 +0100302static const struct platform_suspend_ops at91_pm_ops = {
Rafael J. Wysockic697eec2008-01-08 00:04:17 +0100303 .valid = at91_pm_valid_state,
304 .begin = at91_pm_begin,
305 .enter = at91_pm_enter,
306 .end = at91_pm_end,
Andrew Victor907d6de2006-06-20 19:30:19 +0100307};
308
309static int __init at91_pm_init(void)
310{
Andrew Victorf5d0f452008-04-02 21:50:16 +0100311#ifdef CONFIG_AT91_SLOW_CLOCK
312 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
Andrew Victor907d6de2006-06-20 19:30:19 +0100313#endif
314
Andrew Victorf5d0f452008-04-02 21:50:16 +0100315 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
316
Andrew Victorf5d0f452008-04-02 21:50:16 +0100317 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
Jean-Christophe PLAGNIOL-VILLARDefd09162012-02-13 14:58:30 +0800318 if (cpu_is_at91rm9200())
319 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
Andrew Victor907d6de2006-06-20 19:30:19 +0100320
Rafael J. Wysocki26398a72007-10-18 03:04:40 -0700321 suspend_set_ops(&at91_pm_ops);
Andrew Victor907d6de2006-06-20 19:30:19 +0100322
Andrew Victor565ac442008-04-02 21:52:19 +0100323 show_reset_status();
Andrew Victor907d6de2006-06-20 19:30:19 +0100324 return 0;
325}
326arch_initcall(at91_pm_init);