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Naveen N. Rao156d0e22016-06-22 21:55:07 +05301/*
2 * bpf_jit_comp64.c: eBPF JIT compiler
3 *
4 * Copyright 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
5 * IBM Corporation
6 *
7 * Based on the powerpc classic BPF JIT compiler by Matt Evans
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
12 * of the License.
13 */
14#include <linux/moduleloader.h>
15#include <asm/cacheflush.h>
16#include <linux/netdevice.h>
17#include <linux/filter.h>
18#include <linux/if_vlan.h>
19#include <asm/kprobes.h>
Naveen N. Raoce076142016-09-24 02:05:01 +053020#include <linux/bpf.h>
Naveen N. Rao156d0e22016-06-22 21:55:07 +053021
22#include "bpf_jit64.h"
23
24int bpf_jit_enable __read_mostly;
25
26static void bpf_jit_fill_ill_insns(void *area, unsigned int size)
27{
28 int *p = area;
29
30 /* Fill whole space with trap instructions */
31 while (p < (int *)((char *)area + size))
32 *p++ = BREAKPOINT_INSTRUCTION;
33}
34
35static inline void bpf_flush_icache(void *start, void *end)
36{
37 smp_wmb();
38 flush_icache_range((unsigned long)start, (unsigned long)end);
39}
40
41static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i)
42{
43 return (ctx->seen & (1 << (31 - b2p[i])));
44}
45
46static inline void bpf_set_seen_register(struct codegen_context *ctx, int i)
47{
48 ctx->seen |= (1 << (31 - b2p[i]));
49}
50
51static inline bool bpf_has_stack_frame(struct codegen_context *ctx)
52{
53 /*
54 * We only need a stack frame if:
55 * - we call other functions (kernel helpers), or
56 * - the bpf program uses its stack area
57 * The latter condition is deduced from the usage of BPF_REG_FP
58 */
59 return ctx->seen & SEEN_FUNC || bpf_is_seen_register(ctx, BPF_REG_FP);
60}
61
Naveen N. Rao7b847f52016-09-24 02:05:00 +053062/*
63 * When not setting up our own stackframe, the redzone usage is:
64 *
65 * [ prev sp ] <-------------
66 * [ ... ] |
67 * sp (r1) ---> [ stack pointer ] --------------
68 * [ nv gpr save area ] 8*8
69 * [ tail_call_cnt ] 8
70 * [ local_tmp_var ] 8
71 * [ unused red zone ] 208 bytes protected
72 */
73static int bpf_jit_stack_local(struct codegen_context *ctx)
74{
75 if (bpf_has_stack_frame(ctx))
76 return STACK_FRAME_MIN_SIZE + MAX_BPF_STACK;
77 else
78 return -(BPF_PPC_STACK_SAVE + 16);
79}
80
Naveen N. Raoce076142016-09-24 02:05:01 +053081static int bpf_jit_stack_tailcallcnt(struct codegen_context *ctx)
82{
83 return bpf_jit_stack_local(ctx) + 8;
84}
85
Naveen N. Rao7b847f52016-09-24 02:05:00 +053086static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
87{
88 if (reg >= BPF_PPC_NVR_MIN && reg < 32)
89 return (bpf_has_stack_frame(ctx) ? BPF_PPC_STACKFRAME : 0)
90 - (8 * (32 - reg));
91
92 pr_err("BPF JIT is asking about unknown registers");
93 BUG();
94}
95
Naveen N. Rao156d0e22016-06-22 21:55:07 +053096static void bpf_jit_emit_skb_loads(u32 *image, struct codegen_context *ctx)
97{
98 /*
99 * Load skb->len and skb->data_len
100 * r3 points to skb
101 */
102 PPC_LWZ(b2p[SKB_HLEN_REG], 3, offsetof(struct sk_buff, len));
103 PPC_LWZ(b2p[TMP_REG_1], 3, offsetof(struct sk_buff, data_len));
104 /* header_len = len - data_len */
105 PPC_SUB(b2p[SKB_HLEN_REG], b2p[SKB_HLEN_REG], b2p[TMP_REG_1]);
106
107 /* skb->data pointer */
108 PPC_BPF_LL(b2p[SKB_DATA_REG], 3, offsetof(struct sk_buff, data));
109}
110
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530111static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
112{
113 int i;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530114
Naveen N. Raoce076142016-09-24 02:05:01 +0530115 /*
116 * Initialize tail_call_cnt if we do tail calls.
117 * Otherwise, put in NOPs so that it can be skipped when we are
118 * invoked through a tail call.
119 */
120 if (ctx->seen & SEEN_TAILCALL) {
121 PPC_LI(b2p[TMP_REG_1], 0);
122 /* this goes in the redzone */
123 PPC_BPF_STL(b2p[TMP_REG_1], 1, -(BPF_PPC_STACK_SAVE + 8));
124 } else {
125 PPC_NOP();
126 PPC_NOP();
127 }
128
129#define BPF_TAILCALL_PROLOGUE_SIZE 8
130
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530131 if (bpf_has_stack_frame(ctx)) {
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530132 /*
133 * We need a stack frame, but we don't necessarily need to
134 * save/restore LR unless we call other functions
135 */
136 if (ctx->seen & SEEN_FUNC) {
137 EMIT(PPC_INST_MFLR | __PPC_RT(R0));
138 PPC_BPF_STL(0, 1, PPC_LR_STKOFF);
139 }
140
141 PPC_BPF_STLU(1, 1, -BPF_PPC_STACKFRAME);
142 }
143
144 /*
145 * Back up non-volatile regs -- BPF registers 6-10
146 * If we haven't created our own stack frame, we save these
147 * in the protected zone below the previous stack frame
148 */
149 for (i = BPF_REG_6; i <= BPF_REG_10; i++)
150 if (bpf_is_seen_register(ctx, i))
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530151 PPC_BPF_STL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530152
153 /*
154 * Save additional non-volatile regs if we cache skb
155 * Also, setup skb data
156 */
157 if (ctx->seen & SEEN_SKB) {
158 PPC_BPF_STL(b2p[SKB_HLEN_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530159 bpf_jit_stack_offsetof(ctx, b2p[SKB_HLEN_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530160 PPC_BPF_STL(b2p[SKB_DATA_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530161 bpf_jit_stack_offsetof(ctx, b2p[SKB_DATA_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530162 bpf_jit_emit_skb_loads(image, ctx);
163 }
164
165 /* Setup frame pointer to point to the bpf stack area */
166 if (bpf_is_seen_register(ctx, BPF_REG_FP))
167 PPC_ADDI(b2p[BPF_REG_FP], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530168 STACK_FRAME_MIN_SIZE + MAX_BPF_STACK);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530169}
170
Naveen N. Raoce076142016-09-24 02:05:01 +0530171static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx)
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530172{
173 int i;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530174
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530175 /* Restore NVRs */
176 for (i = BPF_REG_6; i <= BPF_REG_10; i++)
177 if (bpf_is_seen_register(ctx, i))
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530178 PPC_BPF_LL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530179
180 /* Restore non-volatile registers used for skb cache */
181 if (ctx->seen & SEEN_SKB) {
182 PPC_BPF_LL(b2p[SKB_HLEN_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530183 bpf_jit_stack_offsetof(ctx, b2p[SKB_HLEN_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530184 PPC_BPF_LL(b2p[SKB_DATA_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530185 bpf_jit_stack_offsetof(ctx, b2p[SKB_DATA_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530186 }
187
188 /* Tear down our stack frame */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530189 if (bpf_has_stack_frame(ctx)) {
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530190 PPC_ADDI(1, 1, BPF_PPC_STACKFRAME);
191 if (ctx->seen & SEEN_FUNC) {
192 PPC_BPF_LL(0, 1, PPC_LR_STKOFF);
193 PPC_MTLR(0);
194 }
195 }
Naveen N. Raoce076142016-09-24 02:05:01 +0530196}
197
198static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
199{
200 bpf_jit_emit_common_epilogue(image, ctx);
201
202 /* Move result to r3 */
203 PPC_MR(3, b2p[BPF_REG_0]);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530204
205 PPC_BLR();
206}
207
Naveen N. Raoce076142016-09-24 02:05:01 +0530208static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64 func)
209{
Sandipan Das0416be42018-05-24 12:26:46 +0530210 unsigned int i, ctx_idx = ctx->idx;
211
212 /* Load function address into r12 */
213 PPC_LI64(12, func);
214
215 /* For bpf-to-bpf function calls, the callee's address is unknown
216 * until the last extra pass. As seen above, we use PPC_LI64() to
217 * load the callee's address, but this may optimize the number of
218 * instructions required based on the nature of the address.
219 *
220 * Since we don't want the number of instructions emitted to change,
221 * we pad the optimized PPC_LI64() call with NOPs to guarantee that
222 * we always have a five-instruction sequence, which is the maximum
223 * that PPC_LI64() can emit.
224 */
225 for (i = ctx->idx - ctx_idx; i < 5; i++)
226 PPC_NOP();
227
Naveen N. Raoce076142016-09-24 02:05:01 +0530228#ifdef PPC64_ELF_ABI_v1
Naveen N. Raoce076142016-09-24 02:05:01 +0530229 /*
230 * Load TOC from function descriptor at offset 8.
231 * We can clobber r2 since we get called through a
232 * function pointer (so caller will save/restore r2)
233 * and since we don't use a TOC ourself.
234 */
Sandipan Das0416be42018-05-24 12:26:46 +0530235 PPC_BPF_LL(2, 12, 8);
236 /* Load actual entry point from function descriptor */
237 PPC_BPF_LL(12, 12, 0);
Naveen N. Raoce076142016-09-24 02:05:01 +0530238#endif
Sandipan Das0416be42018-05-24 12:26:46 +0530239
240 PPC_MTLR(12);
Naveen N. Raoce076142016-09-24 02:05:01 +0530241 PPC_BLRL();
242}
243
244static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out)
245{
246 /*
247 * By now, the eBPF program has already setup parameters in r3, r4 and r5
248 * r3/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program
249 * r4/BPF_REG_2 - pointer to bpf_array
250 * r5/BPF_REG_3 - index in bpf_array
251 */
252 int b2p_bpf_array = b2p[BPF_REG_2];
253 int b2p_index = b2p[BPF_REG_3];
254
255 /*
256 * if (index >= array->map.max_entries)
257 * goto out;
258 */
259 PPC_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries));
Daniel Borkmann2b70de42018-03-08 16:17:37 +0100260 PPC_RLWINM(b2p_index, b2p_index, 0, 0, 31);
Naveen N. Raoce076142016-09-24 02:05:01 +0530261 PPC_CMPLW(b2p_index, b2p[TMP_REG_1]);
262 PPC_BCC(COND_GE, out);
263
264 /*
265 * if (tail_call_cnt > MAX_TAIL_CALL_CNT)
266 * goto out;
267 */
268 PPC_LD(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx));
269 PPC_CMPLWI(b2p[TMP_REG_1], MAX_TAIL_CALL_CNT);
270 PPC_BCC(COND_GT, out);
271
272 /*
273 * tail_call_cnt++;
274 */
275 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], 1);
276 PPC_BPF_STL(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx));
277
278 /* prog = array->ptrs[index]; */
279 PPC_MULI(b2p[TMP_REG_1], b2p_index, 8);
280 PPC_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array);
281 PPC_LD(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_array, ptrs));
282
283 /*
284 * if (prog == NULL)
285 * goto out;
286 */
287 PPC_CMPLDI(b2p[TMP_REG_1], 0);
288 PPC_BCC(COND_EQ, out);
289
290 /* goto *(prog->bpf_func + prologue_size); */
291 PPC_LD(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_prog, bpf_func));
292#ifdef PPC64_ELF_ABI_v1
293 /* skip past the function descriptor */
294 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1],
295 FUNCTION_DESCR_SIZE + BPF_TAILCALL_PROLOGUE_SIZE);
296#else
297 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], BPF_TAILCALL_PROLOGUE_SIZE);
298#endif
299 PPC_MTCTR(b2p[TMP_REG_1]);
300
301 /* tear down stack, restore NVRs, ... */
302 bpf_jit_emit_common_epilogue(image, ctx);
303
304 PPC_BCTR();
305 /* out: */
306}
307
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530308/* Assemble the body code between the prologue & epilogue */
309static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
310 struct codegen_context *ctx,
311 u32 *addrs)
312{
313 const struct bpf_insn *insn = fp->insnsi;
314 int flen = fp->len;
315 int i;
316
317 /* Start of epilogue code - will only be valid 2nd pass onwards */
318 u32 exit_addr = addrs[flen];
319
320 for (i = 0; i < flen; i++) {
321 u32 code = insn[i].code;
322 u32 dst_reg = b2p[insn[i].dst_reg];
323 u32 src_reg = b2p[insn[i].src_reg];
324 s16 off = insn[i].off;
325 s32 imm = insn[i].imm;
326 u64 imm64;
327 u8 *func;
328 u32 true_cond;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530329
330 /*
331 * addrs[] maps a BPF bytecode address into a real offset from
332 * the start of the body code.
333 */
334 addrs[i] = ctx->idx * 4;
335
336 /*
337 * As an optimization, we note down which non-volatile registers
338 * are used so that we can only save/restore those in our
339 * prologue and epilogue. We do this here regardless of whether
340 * the actual BPF instruction uses src/dst registers or not
341 * (for instance, BPF_CALL does not use them). The expectation
342 * is that those instructions will have src_reg/dst_reg set to
343 * 0. Even otherwise, we just lose some prologue/epilogue
344 * optimization but everything else should work without
345 * any issues.
346 */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530347 if (dst_reg >= BPF_PPC_NVR_MIN && dst_reg < 32)
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530348 bpf_set_seen_register(ctx, insn[i].dst_reg);
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530349 if (src_reg >= BPF_PPC_NVR_MIN && src_reg < 32)
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530350 bpf_set_seen_register(ctx, insn[i].src_reg);
351
352 switch (code) {
353 /*
354 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG
355 */
356 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */
357 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */
358 PPC_ADD(dst_reg, dst_reg, src_reg);
359 goto bpf_alu32_trunc;
360 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */
361 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */
362 PPC_SUB(dst_reg, dst_reg, src_reg);
363 goto bpf_alu32_trunc;
364 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */
365 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */
366 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */
367 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */
368 if (BPF_OP(code) == BPF_SUB)
369 imm = -imm;
370 if (imm) {
371 if (imm >= -32768 && imm < 32768)
372 PPC_ADDI(dst_reg, dst_reg, IMM_L(imm));
373 else {
374 PPC_LI32(b2p[TMP_REG_1], imm);
375 PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]);
376 }
377 }
378 goto bpf_alu32_trunc;
379 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */
380 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */
381 if (BPF_CLASS(code) == BPF_ALU)
382 PPC_MULW(dst_reg, dst_reg, src_reg);
383 else
384 PPC_MULD(dst_reg, dst_reg, src_reg);
385 goto bpf_alu32_trunc;
386 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */
387 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */
388 if (imm >= -32768 && imm < 32768)
389 PPC_MULI(dst_reg, dst_reg, IMM_L(imm));
390 else {
391 PPC_LI32(b2p[TMP_REG_1], imm);
392 if (BPF_CLASS(code) == BPF_ALU)
393 PPC_MULW(dst_reg, dst_reg,
394 b2p[TMP_REG_1]);
395 else
396 PPC_MULD(dst_reg, dst_reg,
397 b2p[TMP_REG_1]);
398 }
399 goto bpf_alu32_trunc;
400 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */
401 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */
402 PPC_CMPWI(src_reg, 0);
403 PPC_BCC_SHORT(COND_NE, (ctx->idx * 4) + 12);
404 PPC_LI(b2p[BPF_REG_0], 0);
405 PPC_JMP(exit_addr);
406 if (BPF_OP(code) == BPF_MOD) {
407 PPC_DIVWU(b2p[TMP_REG_1], dst_reg, src_reg);
408 PPC_MULW(b2p[TMP_REG_1], src_reg,
409 b2p[TMP_REG_1]);
410 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
411 } else
412 PPC_DIVWU(dst_reg, dst_reg, src_reg);
413 goto bpf_alu32_trunc;
414 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
415 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
416 PPC_CMPDI(src_reg, 0);
417 PPC_BCC_SHORT(COND_NE, (ctx->idx * 4) + 12);
418 PPC_LI(b2p[BPF_REG_0], 0);
419 PPC_JMP(exit_addr);
420 if (BPF_OP(code) == BPF_MOD) {
421 PPC_DIVD(b2p[TMP_REG_1], dst_reg, src_reg);
422 PPC_MULD(b2p[TMP_REG_1], src_reg,
423 b2p[TMP_REG_1]);
424 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
425 } else
426 PPC_DIVD(dst_reg, dst_reg, src_reg);
427 break;
428 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */
429 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */
430 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */
431 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */
432 if (imm == 0)
433 return -EINVAL;
434 else if (imm == 1)
435 goto bpf_alu32_trunc;
436
437 PPC_LI32(b2p[TMP_REG_1], imm);
438 switch (BPF_CLASS(code)) {
439 case BPF_ALU:
440 if (BPF_OP(code) == BPF_MOD) {
441 PPC_DIVWU(b2p[TMP_REG_2], dst_reg,
442 b2p[TMP_REG_1]);
443 PPC_MULW(b2p[TMP_REG_1],
444 b2p[TMP_REG_1],
445 b2p[TMP_REG_2]);
446 PPC_SUB(dst_reg, dst_reg,
447 b2p[TMP_REG_1]);
448 } else
449 PPC_DIVWU(dst_reg, dst_reg,
450 b2p[TMP_REG_1]);
451 break;
452 case BPF_ALU64:
453 if (BPF_OP(code) == BPF_MOD) {
454 PPC_DIVD(b2p[TMP_REG_2], dst_reg,
455 b2p[TMP_REG_1]);
456 PPC_MULD(b2p[TMP_REG_1],
457 b2p[TMP_REG_1],
458 b2p[TMP_REG_2]);
459 PPC_SUB(dst_reg, dst_reg,
460 b2p[TMP_REG_1]);
461 } else
462 PPC_DIVD(dst_reg, dst_reg,
463 b2p[TMP_REG_1]);
464 break;
465 }
466 goto bpf_alu32_trunc;
467 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */
468 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
469 PPC_NEG(dst_reg, dst_reg);
470 goto bpf_alu32_trunc;
471
472 /*
473 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH
474 */
475 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */
476 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
477 PPC_AND(dst_reg, dst_reg, src_reg);
478 goto bpf_alu32_trunc;
479 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */
480 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
481 if (!IMM_H(imm))
482 PPC_ANDI(dst_reg, dst_reg, IMM_L(imm));
483 else {
484 /* Sign-extended */
485 PPC_LI32(b2p[TMP_REG_1], imm);
486 PPC_AND(dst_reg, dst_reg, b2p[TMP_REG_1]);
487 }
488 goto bpf_alu32_trunc;
489 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
490 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
491 PPC_OR(dst_reg, dst_reg, src_reg);
492 goto bpf_alu32_trunc;
493 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */
494 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */
495 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) {
496 /* Sign-extended */
497 PPC_LI32(b2p[TMP_REG_1], imm);
498 PPC_OR(dst_reg, dst_reg, b2p[TMP_REG_1]);
499 } else {
500 if (IMM_L(imm))
501 PPC_ORI(dst_reg, dst_reg, IMM_L(imm));
502 if (IMM_H(imm))
503 PPC_ORIS(dst_reg, dst_reg, IMM_H(imm));
504 }
505 goto bpf_alu32_trunc;
506 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */
507 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */
508 PPC_XOR(dst_reg, dst_reg, src_reg);
509 goto bpf_alu32_trunc;
510 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */
511 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */
512 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) {
513 /* Sign-extended */
514 PPC_LI32(b2p[TMP_REG_1], imm);
515 PPC_XOR(dst_reg, dst_reg, b2p[TMP_REG_1]);
516 } else {
517 if (IMM_L(imm))
518 PPC_XORI(dst_reg, dst_reg, IMM_L(imm));
519 if (IMM_H(imm))
520 PPC_XORIS(dst_reg, dst_reg, IMM_H(imm));
521 }
522 goto bpf_alu32_trunc;
523 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */
524 /* slw clears top 32 bits */
525 PPC_SLW(dst_reg, dst_reg, src_reg);
526 break;
527 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */
528 PPC_SLD(dst_reg, dst_reg, src_reg);
529 break;
530 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */
531 /* with imm 0, we still need to clear top 32 bits */
532 PPC_SLWI(dst_reg, dst_reg, imm);
533 break;
534 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */
535 if (imm != 0)
536 PPC_SLDI(dst_reg, dst_reg, imm);
537 break;
538 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */
539 PPC_SRW(dst_reg, dst_reg, src_reg);
540 break;
541 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */
542 PPC_SRD(dst_reg, dst_reg, src_reg);
543 break;
544 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */
545 PPC_SRWI(dst_reg, dst_reg, imm);
546 break;
547 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */
548 if (imm != 0)
549 PPC_SRDI(dst_reg, dst_reg, imm);
550 break;
551 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
552 PPC_SRAD(dst_reg, dst_reg, src_reg);
553 break;
554 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */
555 if (imm != 0)
556 PPC_SRADI(dst_reg, dst_reg, imm);
557 break;
558
559 /*
560 * MOV
561 */
562 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
563 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
564 PPC_MR(dst_reg, src_reg);
565 goto bpf_alu32_trunc;
566 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */
567 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */
568 PPC_LI32(dst_reg, imm);
569 if (imm < 0)
570 goto bpf_alu32_trunc;
571 break;
572
573bpf_alu32_trunc:
574 /* Truncate to 32-bits */
575 if (BPF_CLASS(code) == BPF_ALU)
576 PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31);
577 break;
578
579 /*
580 * BPF_FROM_BE/LE
581 */
582 case BPF_ALU | BPF_END | BPF_FROM_LE:
583 case BPF_ALU | BPF_END | BPF_FROM_BE:
584#ifdef __BIG_ENDIAN__
585 if (BPF_SRC(code) == BPF_FROM_BE)
586 goto emit_clear;
587#else /* !__BIG_ENDIAN__ */
588 if (BPF_SRC(code) == BPF_FROM_LE)
589 goto emit_clear;
590#endif
591 switch (imm) {
592 case 16:
593 /* Rotate 8 bits left & mask with 0x0000ff00 */
594 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 16, 23);
595 /* Rotate 8 bits right & insert LSB to reg */
596 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 24, 31);
597 /* Move result back to dst_reg */
598 PPC_MR(dst_reg, b2p[TMP_REG_1]);
599 break;
600 case 32:
601 /*
602 * Rotate word left by 8 bits:
603 * 2 bytes are already in their final position
604 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4)
605 */
606 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 0, 31);
607 /* Rotate 24 bits and insert byte 1 */
608 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 0, 7);
609 /* Rotate 24 bits and insert byte 3 */
610 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 16, 23);
611 PPC_MR(dst_reg, b2p[TMP_REG_1]);
612 break;
613 case 64:
614 /*
615 * Way easier and faster(?) to store the value
616 * into stack and then use ldbrx
617 *
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530618 * ctx->seen will be reliable in pass2, but
619 * the instructions generated will remain the
620 * same across all passes
621 */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530622 PPC_STD(dst_reg, 1, bpf_jit_stack_local(ctx));
623 PPC_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530624 PPC_LDBRX(dst_reg, 0, b2p[TMP_REG_1]);
625 break;
626 }
627 break;
628
629emit_clear:
630 switch (imm) {
631 case 16:
632 /* zero-extend 16 bits into 64 bits */
633 PPC_RLDICL(dst_reg, dst_reg, 0, 48);
634 break;
635 case 32:
636 /* zero-extend 32 bits into 64 bits */
637 PPC_RLDICL(dst_reg, dst_reg, 0, 32);
638 break;
639 case 64:
640 /* nop */
641 break;
642 }
643 break;
644
645 /*
646 * BPF_ST(X)
647 */
648 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */
649 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
650 if (BPF_CLASS(code) == BPF_ST) {
651 PPC_LI(b2p[TMP_REG_1], imm);
652 src_reg = b2p[TMP_REG_1];
653 }
654 PPC_STB(src_reg, dst_reg, off);
655 break;
656 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
657 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
658 if (BPF_CLASS(code) == BPF_ST) {
659 PPC_LI(b2p[TMP_REG_1], imm);
660 src_reg = b2p[TMP_REG_1];
661 }
662 PPC_STH(src_reg, dst_reg, off);
663 break;
664 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
665 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
666 if (BPF_CLASS(code) == BPF_ST) {
667 PPC_LI32(b2p[TMP_REG_1], imm);
668 src_reg = b2p[TMP_REG_1];
669 }
670 PPC_STW(src_reg, dst_reg, off);
671 break;
672 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
673 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
674 if (BPF_CLASS(code) == BPF_ST) {
675 PPC_LI32(b2p[TMP_REG_1], imm);
676 src_reg = b2p[TMP_REG_1];
677 }
678 PPC_STD(src_reg, dst_reg, off);
679 break;
680
681 /*
682 * BPF_STX XADD (atomic_add)
683 */
684 /* *(u32 *)(dst + off) += src */
685 case BPF_STX | BPF_XADD | BPF_W:
686 /* Get EA into TMP_REG_1 */
687 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
688 /* error if EA is not word-aligned */
689 PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x03);
690 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + 12);
691 PPC_LI(b2p[BPF_REG_0], 0);
692 PPC_JMP(exit_addr);
693 /* load value from memory into TMP_REG_2 */
694 PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
695 /* add value from src_reg into this */
696 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
697 /* store result back */
698 PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
699 /* we're done if this succeeded */
700 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4));
701 /* otherwise, let's try once more */
702 PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
703 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
704 PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
705 /* exit if the store was not successful */
706 PPC_LI(b2p[BPF_REG_0], 0);
707 PPC_BCC(COND_NE, exit_addr);
708 break;
709 /* *(u64 *)(dst + off) += src */
710 case BPF_STX | BPF_XADD | BPF_DW:
711 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
712 /* error if EA is not doubleword-aligned */
713 PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x07);
714 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (3*4));
715 PPC_LI(b2p[BPF_REG_0], 0);
716 PPC_JMP(exit_addr);
717 PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
718 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
719 PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
720 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4));
721 PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
722 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
723 PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
724 PPC_LI(b2p[BPF_REG_0], 0);
725 PPC_BCC(COND_NE, exit_addr);
726 break;
727
728 /*
729 * BPF_LDX
730 */
731 /* dst = *(u8 *)(ul) (src + off) */
732 case BPF_LDX | BPF_MEM | BPF_B:
733 PPC_LBZ(dst_reg, src_reg, off);
734 break;
735 /* dst = *(u16 *)(ul) (src + off) */
736 case BPF_LDX | BPF_MEM | BPF_H:
737 PPC_LHZ(dst_reg, src_reg, off);
738 break;
739 /* dst = *(u32 *)(ul) (src + off) */
740 case BPF_LDX | BPF_MEM | BPF_W:
741 PPC_LWZ(dst_reg, src_reg, off);
742 break;
743 /* dst = *(u64 *)(ul) (src + off) */
744 case BPF_LDX | BPF_MEM | BPF_DW:
745 PPC_LD(dst_reg, src_reg, off);
746 break;
747
748 /*
749 * Doubleword load
750 * 16 byte instruction that uses two 'struct bpf_insn'
751 */
752 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
753 imm64 = ((u64)(u32) insn[i].imm) |
754 (((u64)(u32) insn[i+1].imm) << 32);
755 /* Adjust for two bpf instructions */
756 addrs[++i] = ctx->idx * 4;
757 PPC_LI64(dst_reg, imm64);
758 break;
759
760 /*
761 * Return/Exit
762 */
763 case BPF_JMP | BPF_EXIT:
764 /*
765 * If this isn't the very last instruction, branch to
766 * the epilogue. If we _are_ the last instruction,
767 * we'll just fall through to the epilogue.
768 */
769 if (i != flen - 1)
770 PPC_JMP(exit_addr);
771 /* else fall through to the epilogue */
772 break;
773
774 /*
775 * Call kernel helper
776 */
777 case BPF_JMP | BPF_CALL:
778 ctx->seen |= SEEN_FUNC;
779 func = (u8 *) __bpf_call_base + imm;
780
781 /* Save skb pointer if we need to re-cache skb data */
782 if (bpf_helper_changes_skb_data(func))
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530783 PPC_BPF_STL(3, 1, bpf_jit_stack_local(ctx));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530784
785 bpf_jit_emit_func_call(image, ctx, (u64)func);
786
787 /* move return value from r3 to BPF_REG_0 */
788 PPC_MR(b2p[BPF_REG_0], 3);
789
790 /* refresh skb cache */
791 if (bpf_helper_changes_skb_data(func)) {
792 /* reload skb pointer to r3 */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530793 PPC_BPF_LL(3, 1, bpf_jit_stack_local(ctx));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530794 bpf_jit_emit_skb_loads(image, ctx);
795 }
796 break;
797
798 /*
799 * Jumps and branches
800 */
801 case BPF_JMP | BPF_JA:
802 PPC_JMP(addrs[i + 1 + off]);
803 break;
804
805 case BPF_JMP | BPF_JGT | BPF_K:
806 case BPF_JMP | BPF_JGT | BPF_X:
807 case BPF_JMP | BPF_JSGT | BPF_K:
808 case BPF_JMP | BPF_JSGT | BPF_X:
809 true_cond = COND_GT;
810 goto cond_branch;
811 case BPF_JMP | BPF_JGE | BPF_K:
812 case BPF_JMP | BPF_JGE | BPF_X:
813 case BPF_JMP | BPF_JSGE | BPF_K:
814 case BPF_JMP | BPF_JSGE | BPF_X:
815 true_cond = COND_GE;
816 goto cond_branch;
817 case BPF_JMP | BPF_JEQ | BPF_K:
818 case BPF_JMP | BPF_JEQ | BPF_X:
819 true_cond = COND_EQ;
820 goto cond_branch;
821 case BPF_JMP | BPF_JNE | BPF_K:
822 case BPF_JMP | BPF_JNE | BPF_X:
823 true_cond = COND_NE;
824 goto cond_branch;
825 case BPF_JMP | BPF_JSET | BPF_K:
826 case BPF_JMP | BPF_JSET | BPF_X:
827 true_cond = COND_NE;
828 /* Fall through */
829
830cond_branch:
831 switch (code) {
832 case BPF_JMP | BPF_JGT | BPF_X:
833 case BPF_JMP | BPF_JGE | BPF_X:
834 case BPF_JMP | BPF_JEQ | BPF_X:
835 case BPF_JMP | BPF_JNE | BPF_X:
836 /* unsigned comparison */
837 PPC_CMPLD(dst_reg, src_reg);
838 break;
839 case BPF_JMP | BPF_JSGT | BPF_X:
840 case BPF_JMP | BPF_JSGE | BPF_X:
841 /* signed comparison */
842 PPC_CMPD(dst_reg, src_reg);
843 break;
844 case BPF_JMP | BPF_JSET | BPF_X:
845 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, src_reg);
846 break;
847 case BPF_JMP | BPF_JNE | BPF_K:
848 case BPF_JMP | BPF_JEQ | BPF_K:
849 case BPF_JMP | BPF_JGT | BPF_K:
850 case BPF_JMP | BPF_JGE | BPF_K:
851 /*
852 * Need sign-extended load, so only positive
853 * values can be used as imm in cmpldi
854 */
855 if (imm >= 0 && imm < 32768)
856 PPC_CMPLDI(dst_reg, imm);
857 else {
858 /* sign-extending load */
859 PPC_LI32(b2p[TMP_REG_1], imm);
860 /* ... but unsigned comparison */
861 PPC_CMPLD(dst_reg, b2p[TMP_REG_1]);
862 }
863 break;
864 case BPF_JMP | BPF_JSGT | BPF_K:
865 case BPF_JMP | BPF_JSGE | BPF_K:
866 /*
867 * signed comparison, so any 16-bit value
868 * can be used in cmpdi
869 */
870 if (imm >= -32768 && imm < 32768)
871 PPC_CMPDI(dst_reg, imm);
872 else {
873 PPC_LI32(b2p[TMP_REG_1], imm);
874 PPC_CMPD(dst_reg, b2p[TMP_REG_1]);
875 }
876 break;
877 case BPF_JMP | BPF_JSET | BPF_K:
878 /* andi does not sign-extend the immediate */
879 if (imm >= 0 && imm < 32768)
880 /* PPC_ANDI is _only/always_ dot-form */
881 PPC_ANDI(b2p[TMP_REG_1], dst_reg, imm);
882 else {
883 PPC_LI32(b2p[TMP_REG_1], imm);
884 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg,
885 b2p[TMP_REG_1]);
886 }
887 break;
888 }
889 PPC_BCC(true_cond, addrs[i + 1 + off]);
890 break;
891
892 /*
893 * Loads from packet header/data
894 * Assume 32-bit input value in imm and X (src_reg)
895 */
896
897 /* Absolute loads */
898 case BPF_LD | BPF_W | BPF_ABS:
899 func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_word);
900 goto common_load_abs;
901 case BPF_LD | BPF_H | BPF_ABS:
902 func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_half);
903 goto common_load_abs;
904 case BPF_LD | BPF_B | BPF_ABS:
905 func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_byte);
906common_load_abs:
907 /*
908 * Load from [imm]
909 * Load into r4, which can just be passed onto
910 * skb load helpers as the second parameter
911 */
912 PPC_LI32(4, imm);
913 goto common_load;
914
915 /* Indirect loads */
916 case BPF_LD | BPF_W | BPF_IND:
917 func = (u8 *)sk_load_word;
918 goto common_load_ind;
919 case BPF_LD | BPF_H | BPF_IND:
920 func = (u8 *)sk_load_half;
921 goto common_load_ind;
922 case BPF_LD | BPF_B | BPF_IND:
923 func = (u8 *)sk_load_byte;
924common_load_ind:
925 /*
926 * Load from [src_reg + imm]
927 * Treat src_reg as a 32-bit value
928 */
929 PPC_EXTSW(4, src_reg);
930 if (imm) {
931 if (imm >= -32768 && imm < 32768)
932 PPC_ADDI(4, 4, IMM_L(imm));
933 else {
934 PPC_LI32(b2p[TMP_REG_1], imm);
935 PPC_ADD(4, 4, b2p[TMP_REG_1]);
936 }
937 }
938
939common_load:
940 ctx->seen |= SEEN_SKB;
941 ctx->seen |= SEEN_FUNC;
942 bpf_jit_emit_func_call(image, ctx, (u64)func);
943
944 /*
945 * Helper returns 'lt' condition on error, and an
946 * appropriate return value in BPF_REG_0
947 */
948 PPC_BCC(COND_LT, exit_addr);
949 break;
950
951 /*
Naveen N. Raoce076142016-09-24 02:05:01 +0530952 * Tail call
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530953 */
954 case BPF_JMP | BPF_CALL | BPF_X:
Naveen N. Raoce076142016-09-24 02:05:01 +0530955 ctx->seen |= SEEN_TAILCALL;
956 bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]);
957 break;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530958
959 default:
960 /*
961 * The filter contains something cruel & unusual.
962 * We don't handle it, but also there shouldn't be
963 * anything missing from our list.
964 */
965 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n",
966 code, i);
967 return -ENOTSUPP;
968 }
969 }
970
971 /* Set end-of-body-code address for exit. */
972 addrs[i] = ctx->idx * 4;
973
974 return 0;
975}
976
977void bpf_jit_compile(struct bpf_prog *fp) { }
978
979struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
980{
981 u32 proglen;
982 u32 alloclen;
983 u8 *image = NULL;
984 u32 *code_base;
985 u32 *addrs;
986 struct codegen_context cgctx;
987 int pass;
988 int flen;
989 struct bpf_binary_header *bpf_hdr;
Naveen N. Raob7b70132016-09-24 02:05:02 +0530990 struct bpf_prog *org_fp = fp;
991 struct bpf_prog *tmp_fp;
992 bool bpf_blinded = false;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530993
994 if (!bpf_jit_enable)
Naveen N. Raob7b70132016-09-24 02:05:02 +0530995 return org_fp;
996
997 tmp_fp = bpf_jit_blind_constants(org_fp);
998 if (IS_ERR(tmp_fp))
999 return org_fp;
1000
1001 if (tmp_fp != org_fp) {
1002 bpf_blinded = true;
1003 fp = tmp_fp;
1004 }
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301005
1006 flen = fp->len;
1007 addrs = kzalloc((flen+1) * sizeof(*addrs), GFP_KERNEL);
Naveen N. Raob7b70132016-09-24 02:05:02 +05301008 if (addrs == NULL) {
1009 fp = org_fp;
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301010 goto out;
Naveen N. Raob7b70132016-09-24 02:05:02 +05301011 }
1012
1013 memset(&cgctx, 0, sizeof(struct codegen_context));
1014
1015 /* Scouting faux-generate pass 0 */
1016 if (bpf_jit_build_body(fp, 0, &cgctx, addrs)) {
1017 /* We hit something illegal or unsupported. */
1018 fp = org_fp;
1019 goto out;
1020 }
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301021
1022 /*
1023 * Pretend to build prologue, given the features we've seen. This will
1024 * update ctgtx.idx as it pretends to output instructions, then we can
1025 * calculate total size from idx.
1026 */
1027 bpf_jit_build_prologue(0, &cgctx);
1028 bpf_jit_build_epilogue(0, &cgctx);
1029
1030 proglen = cgctx.idx * 4;
1031 alloclen = proglen + FUNCTION_DESCR_SIZE;
1032
1033 bpf_hdr = bpf_jit_binary_alloc(alloclen, &image, 4,
1034 bpf_jit_fill_ill_insns);
Naveen N. Raob7b70132016-09-24 02:05:02 +05301035 if (!bpf_hdr) {
1036 fp = org_fp;
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301037 goto out;
Naveen N. Raob7b70132016-09-24 02:05:02 +05301038 }
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301039
1040 code_base = (u32 *)(image + FUNCTION_DESCR_SIZE);
1041
1042 /* Code generation passes 1-2 */
1043 for (pass = 1; pass < 3; pass++) {
1044 /* Now build the prologue, body code & epilogue for real. */
1045 cgctx.idx = 0;
1046 bpf_jit_build_prologue(code_base, &cgctx);
1047 bpf_jit_build_body(fp, code_base, &cgctx, addrs);
1048 bpf_jit_build_epilogue(code_base, &cgctx);
1049
1050 if (bpf_jit_enable > 1)
1051 pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
1052 proglen - (cgctx.idx * 4), cgctx.seen);
1053 }
1054
1055 if (bpf_jit_enable > 1)
1056 /*
1057 * Note that we output the base address of the code_base
1058 * rather than image, since opcodes are in code_base.
1059 */
1060 bpf_jit_dump(flen, proglen, pass, code_base);
1061
1062 if (image) {
1063 bpf_flush_icache(bpf_hdr, image + alloclen);
1064#ifdef PPC64_ELF_ABI_v1
1065 /* Function descriptor nastiness: Address + TOC */
1066 ((u64 *)image)[0] = (u64)code_base;
1067 ((u64 *)image)[1] = local_paca->kernel_toc;
1068#endif
1069 fp->bpf_func = (void *)image;
1070 fp->jited = 1;
1071 }
1072
1073out:
1074 kfree(addrs);
Naveen N. Raob7b70132016-09-24 02:05:02 +05301075
1076 if (bpf_blinded)
1077 bpf_jit_prog_release_other(fp, fp == org_fp ? tmp_fp : org_fp);
1078
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301079 return fp;
1080}
1081
1082void bpf_jit_free(struct bpf_prog *fp)
1083{
1084 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1085 struct bpf_binary_header *bpf_hdr = (void *)addr;
1086
1087 if (fp->jited)
1088 bpf_jit_binary_free(bpf_hdr);
1089
1090 bpf_prog_unlock_free(fp);
1091}