blob: 5dd520b3b6e25cbce36fca27a444052b73b82a74 [file] [log] [blame]
Erich Chen1c57e862006-07-12 08:59:32 -07001/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
NickCheng97b99122011-01-06 17:32:41 +08005** BY : Nick Cheng
Erich Chen1c57e862006-07-12 08:59:32 -07006** Description: SCSI RAID Device Driver for
7** ARECA RAID Host adapter
8*******************************************************************************
9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10**
11** Web site: www.areca.com.tw
Nick Cheng1a4f5502007-09-13 17:26:40 +080012** E-mail: support@areca.com.tw
Erich Chen1c57e862006-07-12 08:59:32 -070013**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License version 2 as
16** published by the Free Software Foundation.
17** This program is distributed in the hope that it will be useful,
18** but WITHOUT ANY WARRANTY; without even the implied warranty of
19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20** GNU General Public License for more details.
21*******************************************************************************
22** Redistribution and use in source and binary forms, with or without
23** modification, are permitted provided that the following conditions
24** are met:
25** 1. Redistributions of source code must retain the above copyright
26** notice, this list of conditions and the following disclaimer.
27** 2. Redistributions in binary form must reproduce the above copyright
28** notice, this list of conditions and the following disclaimer in the
29** documentation and/or other materials provided with the distribution.
30** 3. The name of the author may not be used to endorse or promote products
31** derived from this software without specific prior written permission.
32**
33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43*******************************************************************************
44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46*******************************************************************************
47*/
48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
David Millera7c89622010-08-16 21:20:07 -070059#include <linux/slab.h>
Erich Chen1c57e862006-07-12 08:59:32 -070060#include <linux/pci.h>
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +080061#include <linux/aer.h>
Erich Chen1c57e862006-07-12 08:59:32 -070062#include <asm/dma.h>
63#include <asm/io.h>
Erich Chen1c57e862006-07-12 08:59:32 -070064#include <asm/uaccess.h>
65#include <scsi/scsi_host.h>
66#include <scsi/scsi.h>
67#include <scsi/scsi_cmnd.h>
68#include <scsi/scsi_tcq.h>
69#include <scsi/scsi_device.h>
70#include <scsi/scsi_transport.h>
71#include <scsi/scsicam.h>
72#include "arcmsr.h"
Nick Chengae52e7f2010-06-18 15:39:12 +080073MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
Nick Chengcdd3cb12010-07-13 20:03:04 +080074MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
Erich Chen1c57e862006-07-12 08:59:32 -070075MODULE_LICENSE("Dual BSD/GPL");
76MODULE_VERSION(ARCMSR_DRIVER_VERSION);
Tomas Henzl8b7eb862011-04-29 16:28:24 +020077
78#define ARCMSR_SLEEPTIME 10
79#define ARCMSR_RETRYCOUNT 12
80
Nick Chengae52e7f2010-06-18 15:39:12 +080081wait_queue_head_t wait_q;
Nick Cheng1a4f5502007-09-13 17:26:40 +080082static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
83 struct scsi_cmnd *cmd);
84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070085static int arcmsr_abort(struct scsi_cmnd *);
86static int arcmsr_bus_reset(struct scsi_cmnd *);
87static int arcmsr_bios_param(struct scsi_device *sdev,
Nick Cheng1a4f5502007-09-13 17:26:40 +080088 struct block_device *bdev, sector_t capacity, int *info);
Jeff Garzikf2812332010-11-16 02:10:29 -050089static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
Erich Chen1c57e862006-07-12 08:59:32 -070090static int arcmsr_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id);
Ching Huang61cda872014-08-19 14:26:09 +080092static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
93static int arcmsr_resume(struct pci_dev *pdev);
Erich Chen1c57e862006-07-12 08:59:32 -070094static void arcmsr_remove(struct pci_dev *pdev);
95static void arcmsr_shutdown(struct pci_dev *pdev);
96static void arcmsr_iop_init(struct AdapterControlBlock *acb);
97static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080098static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
Ching Huang61cda872014-08-19 14:26:09 +080099static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
100 u32 intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -0700101static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800102static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
103static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800104static void arcmsr_request_device_map(unsigned long pacb);
105static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
106static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800107static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800108static void arcmsr_message_isr_bh_fn(struct work_struct *work);
Nick Chengae52e7f2010-06-18 15:39:12 +0800109static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800110static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800111static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
112static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700113static const char *arcmsr_info(struct Scsi_Host *);
114static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800115static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
Mike Christiee881a172009-10-15 17:46:39 -0700116 int queue_depth, int reason)
Erich Chen1c57e862006-07-12 08:59:32 -0700117{
Mike Christiee881a172009-10-15 17:46:39 -0700118 if (reason != SCSI_QDEPTH_DEFAULT)
119 return -EOPNOTSUPP;
120
Erich Chen1c57e862006-07-12 08:59:32 -0700121 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
122 queue_depth = ARCMSR_MAX_CMD_PERLUN;
123 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
124 return queue_depth;
125}
126
127static struct scsi_host_template arcmsr_scsi_host_template = {
128 .module = THIS_MODULE,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800129 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
130 ARCMSR_DRIVER_VERSION,
Erich Chen1c57e862006-07-12 08:59:32 -0700131 .info = arcmsr_info,
132 .queuecommand = arcmsr_queue_command,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800133 .eh_abort_handler = arcmsr_abort,
Erich Chen1c57e862006-07-12 08:59:32 -0700134 .eh_bus_reset_handler = arcmsr_bus_reset,
135 .bios_param = arcmsr_bios_param,
136 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
Ching Huang3df824a2014-08-19 14:29:41 +0800137 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800138 .this_id = ARCMSR_SCSI_INITIATOR_ID,
139 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
140 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
Erich Chen1c57e862006-07-12 08:59:32 -0700141 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
142 .use_clustering = ENABLE_CLUSTERING,
143 .shost_attrs = arcmsr_host_attrs,
Martin K. Petersen54b2b502013-10-23 06:25:40 -0400144 .no_write_same = 1,
Erich Chen1c57e862006-07-12 08:59:32 -0700145};
Ching Huang8b7c9942014-08-19 14:55:57 +0800146
Erich Chen1c57e862006-07-12 08:59:32 -0700147static struct pci_device_id arcmsr_device_id_table[] = {
Ching Huang8b7c9942014-08-19 14:55:57 +0800148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
149 .driver_data = ACB_ADAPTER_TYPE_A},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
151 .driver_data = ACB_ADAPTER_TYPE_A},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
153 .driver_data = ACB_ADAPTER_TYPE_A},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
155 .driver_data = ACB_ADAPTER_TYPE_A},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
157 .driver_data = ACB_ADAPTER_TYPE_A},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
159 .driver_data = ACB_ADAPTER_TYPE_B},
160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
161 .driver_data = ACB_ADAPTER_TYPE_B},
162 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
163 .driver_data = ACB_ADAPTER_TYPE_B},
164 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
165 .driver_data = ACB_ADAPTER_TYPE_A},
166 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
167 .driver_data = ACB_ADAPTER_TYPE_A},
168 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
169 .driver_data = ACB_ADAPTER_TYPE_A},
170 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
171 .driver_data = ACB_ADAPTER_TYPE_A},
172 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
173 .driver_data = ACB_ADAPTER_TYPE_A},
174 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
175 .driver_data = ACB_ADAPTER_TYPE_A},
176 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
177 .driver_data = ACB_ADAPTER_TYPE_A},
178 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
179 .driver_data = ACB_ADAPTER_TYPE_A},
180 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
181 .driver_data = ACB_ADAPTER_TYPE_A},
182 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
183 .driver_data = ACB_ADAPTER_TYPE_A},
184 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
185 .driver_data = ACB_ADAPTER_TYPE_C},
Erich Chen1c57e862006-07-12 08:59:32 -0700186 {0, 0}, /* Terminating entry */
187};
188MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
Ching Huang8b7c9942014-08-19 14:55:57 +0800189
Erich Chen1c57e862006-07-12 08:59:32 -0700190static struct pci_driver arcmsr_pci_driver = {
191 .name = "arcmsr",
Nick Chengcdd3cb12010-07-13 20:03:04 +0800192 .id_table = arcmsr_device_id_table,
Erich Chen1c57e862006-07-12 08:59:32 -0700193 .probe = arcmsr_probe,
194 .remove = arcmsr_remove,
Ching Huang61cda872014-08-19 14:26:09 +0800195 .suspend = arcmsr_suspend,
196 .resume = arcmsr_resume,
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +0800197 .shutdown = arcmsr_shutdown,
Erich Chen1c57e862006-07-12 08:59:32 -0700198};
Nick Chengcdd3cb12010-07-13 20:03:04 +0800199/*
200****************************************************************************
201****************************************************************************
202*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800203
204static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800205{
206 switch (acb->adapter_type) {
207 case ACB_ADAPTER_TYPE_A:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800208 case ACB_ADAPTER_TYPE_C:
Nick Chengae52e7f2010-06-18 15:39:12 +0800209 break;
210 case ACB_ADAPTER_TYPE_B:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800211 dma_free_coherent(&acb->pdev->dev,
212 sizeof(struct MessageUnit_B),
213 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
Nick Chengae52e7f2010-06-18 15:39:12 +0800214 }
215 }
216}
217
218static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
219{
220 struct pci_dev *pdev = acb->pdev;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800221 switch (acb->adapter_type){
Nick Chengae52e7f2010-06-18 15:39:12 +0800222 case ACB_ADAPTER_TYPE_A:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800223 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
Nick Chengae52e7f2010-06-18 15:39:12 +0800224 if (!acb->pmuA) {
225 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
226 return false;
227 }
228 break;
229 }
230 case ACB_ADAPTER_TYPE_B:{
231 void __iomem *mem_base0, *mem_base1;
232 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
233 if (!mem_base0) {
234 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
235 return false;
236 }
237 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
238 if (!mem_base1) {
239 iounmap(mem_base0);
240 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
241 return false;
242 }
243 acb->mem_base0 = mem_base0;
244 acb->mem_base1 = mem_base1;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800245 break;
246 }
247 case ACB_ADAPTER_TYPE_C:{
248 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
249 if (!acb->pmuC) {
250 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
251 return false;
252 }
253 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
254 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
255 return true;
256 }
257 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800258 }
259 }
260 return true;
261}
262
263static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
264{
265 switch (acb->adapter_type) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800266 case ACB_ADAPTER_TYPE_A:{
267 iounmap(acb->pmuA);
268 }
269 break;
270 case ACB_ADAPTER_TYPE_B:{
271 iounmap(acb->mem_base0);
272 iounmap(acb->mem_base1);
273 }
274
275 break;
276 case ACB_ADAPTER_TYPE_C:{
277 iounmap(acb->pmuC);
278 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800279 }
280}
281
David Howells7d12e782006-10-05 14:55:46 +0100282static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
Erich Chen1c57e862006-07-12 08:59:32 -0700283{
284 irqreturn_t handle_state;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800285 struct AdapterControlBlock *acb = dev_id;
Erich Chen1c57e862006-07-12 08:59:32 -0700286
Erich Chen1c57e862006-07-12 08:59:32 -0700287 handle_state = arcmsr_interrupt(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700288 return handle_state;
289}
290
291static int arcmsr_bios_param(struct scsi_device *sdev,
292 struct block_device *bdev, sector_t capacity, int *geom)
293{
294 int ret, heads, sectors, cylinders, total_capacity;
295 unsigned char *buffer;/* return copy of block device's partition table */
296
297 buffer = scsi_bios_ptable(bdev);
298 if (buffer) {
299 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
300 kfree(buffer);
301 if (ret != -1)
302 return ret;
303 }
304 total_capacity = capacity;
305 heads = 64;
306 sectors = 32;
307 cylinders = total_capacity / (heads * sectors);
308 if (cylinders > 1024) {
309 heads = 255;
310 sectors = 63;
311 cylinders = total_capacity / (heads * sectors);
312 }
313 geom[0] = heads;
314 geom[1] = sectors;
315 geom[2] = cylinders;
316 return 0;
317}
318
Nick Chengae52e7f2010-06-18 15:39:12 +0800319static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800320{
Nick Chengae52e7f2010-06-18 15:39:12 +0800321 struct MessageUnit_A __iomem *reg = acb->pmuA;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200322 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800323
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200324 for (i = 0; i < 2000; i++) {
325 if (readl(&reg->outbound_intstatus) &
326 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
327 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
328 &reg->outbound_intstatus);
329 return true;
330 }
331 msleep(10);
332 } /* max 20 seconds */
333
Nick Chengcdd3cb12010-07-13 20:03:04 +0800334 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800335}
336
337static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
338{
339 struct MessageUnit_B *reg = acb->pmuB;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200340 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800341
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200342 for (i = 0; i < 2000; i++) {
343 if (readl(reg->iop2drv_doorbell)
344 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
345 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
346 reg->iop2drv_doorbell);
347 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
348 reg->drv2iop_doorbell);
349 return true;
350 }
351 msleep(10);
352 } /* max 20 seconds */
353
Nick Chengcdd3cb12010-07-13 20:03:04 +0800354 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800355}
356
Nick Chengcdd3cb12010-07-13 20:03:04 +0800357static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
358{
359 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200360 int i;
361
362 for (i = 0; i < 2000; i++) {
363 if (readl(&phbcmu->outbound_doorbell)
364 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
365 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
366 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
367 return true;
368 }
369 msleep(10);
370 } /* max 20 seconds */
371
Nick Chengcdd3cb12010-07-13 20:03:04 +0800372 return false;
373}
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200374
Nick Chengae52e7f2010-06-18 15:39:12 +0800375static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
376{
377 struct MessageUnit_A __iomem *reg = acb->pmuA;
378 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800379 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
380 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800381 if (arcmsr_hba_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800382 break;
383 else {
384 retry_count--;
385 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
386 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
387 }
388 } while (retry_count != 0);
389}
390
391static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
392{
393 struct MessageUnit_B *reg = acb->pmuB;
394 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800395 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
396 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800397 if (arcmsr_hbb_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800398 break;
399 else {
400 retry_count--;
401 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
402 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
403 }
404 } while (retry_count != 0);
405}
406
Nick Chengcdd3cb12010-07-13 20:03:04 +0800407static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
408{
409 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
410 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
411 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
412 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
413 do {
414 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
415 break;
416 } else {
417 retry_count--;
418 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
419 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
420 }
421 } while (retry_count != 0);
422 return;
423}
Nick Chengae52e7f2010-06-18 15:39:12 +0800424static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
425{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800426 switch (acb->adapter_type) {
427
428 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800429 arcmsr_flush_hba_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800430 }
431 break;
432
433 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800434 arcmsr_flush_hbb_cache(acb);
435 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800436 break;
437 case ACB_ADAPTER_TYPE_C: {
438 arcmsr_flush_hbc_cache(acb);
439 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800440 }
441}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800442
Nick Chengae52e7f2010-06-18 15:39:12 +0800443static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
444{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800445 struct pci_dev *pdev = acb->pdev;
446 void *dma_coherent;
447 dma_addr_t dma_coherent_handle;
448 struct CommandControlBlock *ccb_tmp;
449 int i = 0, j = 0;
450 dma_addr_t cdb_phyaddr;
Tomas Henzl87f76152011-04-29 16:28:30 +0200451 unsigned long roundup_ccbsize;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800452 unsigned long max_xfer_len;
453 unsigned long max_sg_entrys;
454 uint32_t firm_config_version;
Tomas Henzl87f76152011-04-29 16:28:30 +0200455
Nick Chengcdd3cb12010-07-13 20:03:04 +0800456 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
457 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
458 acb->devstate[i][j] = ARECA_RAID_GONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800459
Nick Chengcdd3cb12010-07-13 20:03:04 +0800460 max_xfer_len = ARCMSR_MAX_XFER_LEN;
461 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
462 firm_config_version = acb->firm_cfg_version;
463 if((firm_config_version & 0xFF) >= 3){
464 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
Tomas Henzl87f76152011-04-29 16:28:30 +0200465 max_sg_entrys = (max_xfer_len/4096);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800466 }
467 acb->host->max_sectors = max_xfer_len/512;
468 acb->host->sg_tablesize = max_sg_entrys;
469 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
Tomas Henzl87f76152011-04-29 16:28:30 +0200470 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800471 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
472 if(!dma_coherent){
Tomas Henzl87f76152011-04-29 16:28:30 +0200473 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800474 return -ENOMEM;
475 }
476 acb->dma_coherent = dma_coherent;
477 acb->dma_coherent_handle = dma_coherent_handle;
478 memset(dma_coherent, 0, acb->uncache_size);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800479 ccb_tmp = dma_coherent;
480 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
481 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
482 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
483 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
484 acb->pccb_pool[i] = ccb_tmp;
485 ccb_tmp->acb = acb;
486 INIT_LIST_HEAD(&ccb_tmp->list);
487 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
488 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
489 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
Erich Chen1c57e862006-07-12 08:59:32 -0700490 }
Erich Chen1c57e862006-07-12 08:59:32 -0700491 return 0;
492}
Nick Cheng36b83de2010-05-17 11:22:42 +0800493
Nick Chengcdd3cb12010-07-13 20:03:04 +0800494static void arcmsr_message_isr_bh_fn(struct work_struct *work)
495{
Ching Huang12aad942014-08-19 14:59:00 +0800496 struct AdapterControlBlock *acb = container_of(work,
497 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
498 char *acb_dev_map = (char *)acb->device_map;
499 uint32_t __iomem *signature = NULL;
500 char __iomem *devicemap = NULL;
501 int target, lun;
502 struct scsi_device *psdev;
503 char diff, temp;
504
Nick Cheng36b83de2010-05-17 11:22:42 +0800505 switch (acb->adapter_type) {
Ching Huang12aad942014-08-19 14:59:00 +0800506 case ACB_ADAPTER_TYPE_A: {
507 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800508
Ching Huang12aad942014-08-19 14:59:00 +0800509 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
510 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800511 break;
Ching Huang12aad942014-08-19 14:59:00 +0800512 }
513 case ACB_ADAPTER_TYPE_B: {
514 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +0800515
Ching Huang12aad942014-08-19 14:59:00 +0800516 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
517 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
518 break;
519 }
520 case ACB_ADAPTER_TYPE_C: {
521 struct MessageUnit_C __iomem *reg = acb->pmuC;
522
523 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
524 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
525 break;
526 }
527 }
528 atomic_inc(&acb->rq_map_token);
529 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
530 return;
531 for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
532 target++) {
533 temp = readb(devicemap);
534 diff = (*acb_dev_map) ^ temp;
535 if (diff != 0) {
536 *acb_dev_map = temp;
537 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
538 lun++) {
539 if ((diff & 0x01) == 1 &&
540 (temp & 0x01) == 1) {
541 scsi_add_device(acb->host,
542 0, target, lun);
543 } else if ((diff & 0x01) == 1
544 && (temp & 0x01) == 0) {
545 psdev = scsi_device_lookup(acb->host,
546 0, target, lun);
547 if (psdev != NULL) {
548 scsi_remove_device(psdev);
549 scsi_device_put(psdev);
Nick Cheng36b83de2010-05-17 11:22:42 +0800550 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800551 }
Ching Huang12aad942014-08-19 14:59:00 +0800552 temp >>= 1;
553 diff >>= 1;
Nick Cheng36b83de2010-05-17 11:22:42 +0800554 }
555 }
Ching Huang12aad942014-08-19 14:59:00 +0800556 devicemap++;
557 acb_dev_map++;
Nick Cheng36b83de2010-05-17 11:22:42 +0800558 }
559}
Erich Chen1c57e862006-07-12 08:59:32 -0700560
Ching Huang1d1166e2014-08-19 14:23:31 +0800561static int
562arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
563{
564 int i, j, r;
565 struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS];
566
567 for (i = 0; i < ARCMST_NUM_MSIX_VECTORS; i++)
568 entries[i].entry = i;
569 r = pci_enable_msix_range(pdev, entries, 1, ARCMST_NUM_MSIX_VECTORS);
570 if (r < 0)
571 goto msi_int;
572 acb->msix_vector_count = r;
573 for (i = 0; i < r; i++) {
574 if (request_irq(entries[i].vector,
575 arcmsr_do_interrupt, 0, "arcmsr", acb)) {
576 pr_warn("arcmsr%d: request_irq =%d failed!\n",
577 acb->host->host_no, entries[i].vector);
578 for (j = 0 ; j < i ; j++)
579 free_irq(entries[j].vector, acb);
580 pci_disable_msix(pdev);
581 goto msi_int;
582 }
583 acb->entries[i] = entries[i];
584 }
585 acb->acb_flags |= ACB_F_MSIX_ENABLED;
586 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
587 return SUCCESS;
588msi_int:
589 if (pci_enable_msi_exact(pdev, 1) < 0)
590 goto legacy_int;
591 if (request_irq(pdev->irq, arcmsr_do_interrupt,
592 IRQF_SHARED, "arcmsr", acb)) {
593 pr_warn("arcmsr%d: request_irq =%d failed!\n",
594 acb->host->host_no, pdev->irq);
595 pci_disable_msi(pdev);
596 goto legacy_int;
597 }
598 acb->acb_flags |= ACB_F_MSI_ENABLED;
599 pr_info("arcmsr%d: msi enabled\n", acb->host->host_no);
600 return SUCCESS;
601legacy_int:
602 if (request_irq(pdev->irq, arcmsr_do_interrupt,
603 IRQF_SHARED, "arcmsr", acb)) {
604 pr_warn("arcmsr%d: request_irq = %d failed!\n",
605 acb->host->host_no, pdev->irq);
606 return FAILED;
607 }
608 return SUCCESS;
609}
610
Nick Chengae52e7f2010-06-18 15:39:12 +0800611static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
Erich Chen1c57e862006-07-12 08:59:32 -0700612{
613 struct Scsi_Host *host;
614 struct AdapterControlBlock *acb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800615 uint8_t bus,dev_fun;
Erich Chen1c57e862006-07-12 08:59:32 -0700616 int error;
Erich Chen1c57e862006-07-12 08:59:32 -0700617 error = pci_enable_device(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800618 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800619 return -ENODEV;
Erich Chen1c57e862006-07-12 08:59:32 -0700620 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800621 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800622 if(!host){
623 goto pci_disable_dev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800624 }
Yang Hongyang6a355282009-04-06 19:01:13 -0700625 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800626 if(error){
Yang Hongyang284901a2009-04-06 19:01:15 -0700627 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800628 if(error){
Erich Chen1c57e862006-07-12 08:59:32 -0700629 printk(KERN_WARNING
630 "scsi%d: No suitable DMA mask available\n",
631 host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +0800632 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700633 }
634 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800635 init_waitqueue_head(&wait_q);
Erich Chen1c57e862006-07-12 08:59:32 -0700636 bus = pdev->bus->number;
637 dev_fun = pdev->devfn;
Nick Chengae52e7f2010-06-18 15:39:12 +0800638 acb = (struct AdapterControlBlock *) host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800639 memset(acb,0,sizeof(struct AdapterControlBlock));
Erich Chen1c57e862006-07-12 08:59:32 -0700640 acb->pdev = pdev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800641 acb->host = host;
Erich Chen1c57e862006-07-12 08:59:32 -0700642 host->max_lun = ARCMSR_MAX_TARGETLUN;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800643 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
644 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
Ching Huang3df824a2014-08-19 14:29:41 +0800645 host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800646 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
Erich Chen1c57e862006-07-12 08:59:32 -0700647 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
648 host->unique_id = (bus << 8) | dev_fun;
Nick Chengae52e7f2010-06-18 15:39:12 +0800649 pci_set_drvdata(pdev, host);
650 pci_set_master(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -0700651 error = pci_request_regions(pdev, "arcmsr");
Nick Chengcdd3cb12010-07-13 20:03:04 +0800652 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800653 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700654 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800655 spin_lock_init(&acb->eh_lock);
656 spin_lock_init(&acb->ccblist_lock);
Erich Chen1c57e862006-07-12 08:59:32 -0700657 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
Nick Chengcdd3cb12010-07-13 20:03:04 +0800658 ACB_F_MESSAGE_RQBUFFER_CLEARED |
659 ACB_F_MESSAGE_WQBUFFER_READED);
Erich Chen1c57e862006-07-12 08:59:32 -0700660 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
661 INIT_LIST_HEAD(&acb->ccb_free_list);
Ching Huang8b7c9942014-08-19 14:55:57 +0800662 acb->adapter_type = id->driver_data;
Nick Chengae52e7f2010-06-18 15:39:12 +0800663 error = arcmsr_remap_pciregion(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800664 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800665 goto pci_release_regs;
666 }
667 error = arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800668 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800669 goto unmap_pci_region;
670 }
Erich Chen1c57e862006-07-12 08:59:32 -0700671 error = arcmsr_alloc_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800672 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800673 goto free_hbb_mu;
674 }
Erich Chen1c57e862006-07-12 08:59:32 -0700675 error = scsi_add_host(host, &pdev->dev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800676 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800677 goto RAID_controller_stop;
678 }
Ching Huang1d1166e2014-08-19 14:23:31 +0800679 if (arcmsr_request_irq(pdev, acb) == FAILED)
Nick Chengae52e7f2010-06-18 15:39:12 +0800680 goto scsi_host_remove;
Ching Huang1d1166e2014-08-19 14:23:31 +0800681 arcmsr_iop_init(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800682 scsi_scan_host(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800683 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
Nick Cheng36b83de2010-05-17 11:22:42 +0800684 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +0800685 atomic_set(&acb->ante_token_value, 16);
686 acb->fw_flag = FW_NORMAL;
Nick Cheng36b83de2010-05-17 11:22:42 +0800687 init_timer(&acb->eternal_timer);
Nick Chengae52e7f2010-06-18 15:39:12 +0800688 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Nick Cheng36b83de2010-05-17 11:22:42 +0800689 acb->eternal_timer.data = (unsigned long) acb;
690 acb->eternal_timer.function = &arcmsr_request_device_map;
691 add_timer(&acb->eternal_timer);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800692 if(arcmsr_alloc_sysfs_attr(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800693 goto out_free_sysfs;
Erich Chen1c57e862006-07-12 08:59:32 -0700694 return 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800695out_free_sysfs:
Nick Chengae52e7f2010-06-18 15:39:12 +0800696scsi_host_remove:
697 scsi_remove_host(host);
698RAID_controller_stop:
699 arcmsr_stop_adapter_bgrb(acb);
700 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700701 arcmsr_free_ccb_pool(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800702free_hbb_mu:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800703 arcmsr_free_hbb_mu(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800704unmap_pci_region:
705 arcmsr_unmap_pciregion(acb);
706pci_release_regs:
Erich Chen1c57e862006-07-12 08:59:32 -0700707 pci_release_regions(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800708scsi_host_release:
Erich Chen1c57e862006-07-12 08:59:32 -0700709 scsi_host_put(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800710pci_disable_dev:
Erich Chen1c57e862006-07-12 08:59:32 -0700711 pci_disable_device(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800712 return -ENODEV;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800713}
714
Ching Huang1d1166e2014-08-19 14:23:31 +0800715static void arcmsr_free_irq(struct pci_dev *pdev,
716 struct AdapterControlBlock *acb)
717{
718 int i;
719
720 if (acb->acb_flags & ACB_F_MSI_ENABLED) {
721 free_irq(pdev->irq, acb);
722 pci_disable_msi(pdev);
723 } else if (acb->acb_flags & ACB_F_MSIX_ENABLED) {
724 for (i = 0; i < acb->msix_vector_count; i++)
725 free_irq(acb->entries[i].vector, acb);
726 pci_disable_msix(pdev);
727 } else
728 free_irq(pdev->irq, acb);
729}
730
Ching Huang61cda872014-08-19 14:26:09 +0800731static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
732{
733 uint32_t intmask_org;
734 struct Scsi_Host *host = pci_get_drvdata(pdev);
735 struct AdapterControlBlock *acb =
736 (struct AdapterControlBlock *)host->hostdata;
737
738 intmask_org = arcmsr_disable_outbound_ints(acb);
739 arcmsr_free_irq(pdev, acb);
740 del_timer_sync(&acb->eternal_timer);
741 flush_work(&acb->arcmsr_do_message_isr_bh);
742 arcmsr_stop_adapter_bgrb(acb);
743 arcmsr_flush_adapter_cache(acb);
744 pci_set_drvdata(pdev, host);
745 pci_save_state(pdev);
746 pci_disable_device(pdev);
747 pci_set_power_state(pdev, pci_choose_state(pdev, state));
748 return 0;
749}
750
751static int arcmsr_resume(struct pci_dev *pdev)
752{
753 int error;
754 struct Scsi_Host *host = pci_get_drvdata(pdev);
755 struct AdapterControlBlock *acb =
756 (struct AdapterControlBlock *)host->hostdata;
757
758 pci_set_power_state(pdev, PCI_D0);
759 pci_enable_wake(pdev, PCI_D0, 0);
760 pci_restore_state(pdev);
761 if (pci_enable_device(pdev)) {
762 pr_warn("%s: pci_enable_device error\n", __func__);
763 return -ENODEV;
764 }
765 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
766 if (error) {
767 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
768 if (error) {
769 pr_warn("scsi%d: No suitable DMA mask available\n",
770 host->host_no);
771 goto controller_unregister;
772 }
773 }
774 pci_set_master(pdev);
775 if (arcmsr_request_irq(pdev, acb) == FAILED)
776 goto controller_stop;
777 arcmsr_iop_init(acb);
778 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
779 atomic_set(&acb->rq_map_token, 16);
780 atomic_set(&acb->ante_token_value, 16);
781 acb->fw_flag = FW_NORMAL;
782 init_timer(&acb->eternal_timer);
783 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
784 acb->eternal_timer.data = (unsigned long) acb;
785 acb->eternal_timer.function = &arcmsr_request_device_map;
786 add_timer(&acb->eternal_timer);
787 return 0;
788controller_stop:
789 arcmsr_stop_adapter_bgrb(acb);
790 arcmsr_flush_adapter_cache(acb);
791controller_unregister:
792 scsi_remove_host(host);
793 arcmsr_free_ccb_pool(acb);
794 arcmsr_unmap_pciregion(acb);
795 pci_release_regions(pdev);
796 scsi_host_put(host);
797 pci_disable_device(pdev);
798 return -ENODEV;
799}
800
Nick Cheng36b83de2010-05-17 11:22:42 +0800801static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800802{
Al Viro80da1ad2007-10-29 05:08:28 +0000803 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -0700804 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800805 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Erich Chen1c57e862006-07-12 08:59:32 -0700806 printk(KERN_NOTICE
807 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
808 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800809 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800810 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800811 return true;
Erich Chen1c57e862006-07-12 08:59:32 -0700812}
813
Nick Cheng36b83de2010-05-17 11:22:42 +0800814static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800815{
Al Viro80da1ad2007-10-29 05:08:28 +0000816 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800817
Nick Chengae52e7f2010-06-18 15:39:12 +0800818 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800819 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800820 printk(KERN_NOTICE
821 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
822 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800823 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800824 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800825 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800826}
Nick Chengcdd3cb12010-07-13 20:03:04 +0800827static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
828{
829 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
830 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
831 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
832 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
833 printk(KERN_NOTICE
834 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
835 , pACB->host->host_no);
836 return false;
837 }
838 return true;
839}
Nick Cheng36b83de2010-05-17 11:22:42 +0800840static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800841{
Nick Cheng36b83de2010-05-17 11:22:42 +0800842 uint8_t rtnval = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800843 switch (acb->adapter_type) {
844 case ACB_ADAPTER_TYPE_A: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800845 rtnval = arcmsr_abort_hba_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800846 }
847 break;
848
849 case ACB_ADAPTER_TYPE_B: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800850 rtnval = arcmsr_abort_hbb_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800851 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800852 break;
853
854 case ACB_ADAPTER_TYPE_C: {
855 rtnval = arcmsr_abort_hbc_allcmd(acb);
856 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800857 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800858 return rtnval;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800859}
860
Erich Chen1c57e862006-07-12 08:59:32 -0700861static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
862{
Erich Chen1c57e862006-07-12 08:59:32 -0700863 struct scsi_cmnd *pcmd = ccb->pcmd;
864
FUJITA Tomonorideff2622007-05-14 19:25:56 +0900865 scsi_dma_unmap(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800866}
Erich Chen1c57e862006-07-12 08:59:32 -0700867
Nick Chengae52e7f2010-06-18 15:39:12 +0800868static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
Erich Chen1c57e862006-07-12 08:59:32 -0700869{
870 struct AdapterControlBlock *acb = ccb->acb;
871 struct scsi_cmnd *pcmd = ccb->pcmd;
Nick Chengae52e7f2010-06-18 15:39:12 +0800872 unsigned long flags;
Nick Chengae52e7f2010-06-18 15:39:12 +0800873 atomic_dec(&acb->ccboutstandingcount);
Erich Chen1c57e862006-07-12 08:59:32 -0700874 arcmsr_pci_unmap_dma(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -0700875 ccb->startdone = ARCMSR_CCB_DONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800876 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700877 list_add_tail(&ccb->list, &acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800878 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700879 pcmd->scsi_done(pcmd);
880}
881
Nick Cheng1a4f5502007-09-13 17:26:40 +0800882static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
883{
884
885 struct scsi_cmnd *pcmd = ccb->pcmd;
886 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800887 pcmd->result = DID_OK << 16;
888 if (sensebuffer) {
889 int sense_data_length =
FUJITA Tomonorib80ca4f2008-01-13 15:46:13 +0900890 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
891 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
892 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800893 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
894 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
895 sensebuffer->Valid = 1;
896 }
897}
898
899static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
900{
901 u32 orig_mask = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800902 switch (acb->adapter_type) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800903 case ACB_ADAPTER_TYPE_A : {
Al Viro80da1ad2007-10-29 05:08:28 +0000904 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800905 orig_mask = readl(&reg->outbound_intmask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800906 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
907 &reg->outbound_intmask);
908 }
909 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800910 case ACB_ADAPTER_TYPE_B : {
Al Viro80da1ad2007-10-29 05:08:28 +0000911 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800912 orig_mask = readl(reg->iop2drv_doorbell_mask);
913 writel(0, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800914 }
915 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800916 case ACB_ADAPTER_TYPE_C:{
917 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
918 /* disable all outbound interrupt */
919 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
920 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
921 }
922 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800923 }
924 return orig_mask;
925}
926
Nick Chengcdd3cb12010-07-13 20:03:04 +0800927static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
928 struct CommandControlBlock *ccb, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800929{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800930 uint8_t id, lun;
931 id = ccb->pcmd->device->id;
932 lun = ccb->pcmd->device->lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800933 if (!error) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800934 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
935 acb->devstate[id][lun] = ARECA_RAID_GOOD;
Julia Lawall7968f192010-08-05 22:19:36 +0200936 ccb->pcmd->result = DID_OK << 16;
937 arcmsr_ccb_complete(ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800938 }else{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800939 switch (ccb->arcmsr_cdb.DeviceStatus) {
940 case ARCMSR_DEV_SELECT_TIMEOUT: {
941 acb->devstate[id][lun] = ARECA_RAID_GONE;
942 ccb->pcmd->result = DID_NO_CONNECT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800943 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800944 }
945 break;
946
947 case ARCMSR_DEV_ABORTED:
948
949 case ARCMSR_DEV_INIT_FAIL: {
950 acb->devstate[id][lun] = ARECA_RAID_GONE;
951 ccb->pcmd->result = DID_BAD_TARGET << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800952 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800953 }
954 break;
955
956 case ARCMSR_DEV_CHECK_CONDITION: {
957 acb->devstate[id][lun] = ARECA_RAID_GOOD;
958 arcmsr_report_sense_info(ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800959 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800960 }
961 break;
962
963 default:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800964 printk(KERN_NOTICE
965 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
966 but got unknown DeviceStatus = 0x%x \n"
967 , acb->host->host_no
968 , id
969 , lun
970 , ccb->arcmsr_cdb.DeviceStatus);
971 acb->devstate[id][lun] = ARECA_RAID_GONE;
972 ccb->pcmd->result = DID_NO_CONNECT << 16;
973 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800974 break;
975 }
976 }
977}
978
Nick Chengcdd3cb12010-07-13 20:03:04 +0800979static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800980{
Nick Chengae52e7f2010-06-18 15:39:12 +0800981 int id, lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800982 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
983 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
984 struct scsi_cmnd *abortcmd = pCCB->pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800985 if (abortcmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800986 id = abortcmd->device->id;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800987 lun = abortcmd->device->lun;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800988 abortcmd->result |= DID_ABORT << 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800989 arcmsr_ccb_complete(pCCB);
990 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
991 acb->host->host_no, pCCB);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800992 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800993 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800994 }
995 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
996 done acb = '0x%p'"
997 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
998 " ccboutstandingcount = %d \n"
999 , acb->host->host_no
1000 , acb
Nick Chengcdd3cb12010-07-13 20:03:04 +08001001 , pCCB
1002 , pCCB->acb
1003 , pCCB->startdone
Nick Cheng1a4f5502007-09-13 17:26:40 +08001004 , atomic_read(&acb->ccboutstandingcount));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001005 return;
NickCheng97b99122011-01-06 17:32:41 +08001006 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001007 arcmsr_report_ccb_state(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001008}
1009
1010static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1011{
1012 int i = 0;
1013 uint32_t flag_ccb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001014 struct ARCMSR_CDB *pARCMSR_CDB;
1015 bool error;
1016 struct CommandControlBlock *pCCB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001017 switch (acb->adapter_type) {
1018
1019 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001020 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001021 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001022 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Cheng1a4f5502007-09-13 17:26:40 +08001023 acb->outbound_int_enable;
1024 /*clear and abort all outbound posted Q*/
1025 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
Nick Chengcdd3cb12010-07-13 20:03:04 +08001026 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001027 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001028 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1029 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1030 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1031 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001032 }
1033 }
1034 break;
1035
1036 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001037 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001038 /*clear all outbound posted Q*/
NickCheng97b99122011-01-06 17:32:41 +08001039 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
Nick Cheng1a4f5502007-09-13 17:26:40 +08001040 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1041 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
1042 writel(0, &reg->done_qbuffer[i]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001043 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1044 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1045 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1046 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001047 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001048 reg->post_qbuffer[i] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001049 }
1050 reg->doneq_index = 0;
1051 reg->postq_index = 0;
1052 }
1053 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001054 case ACB_ADAPTER_TYPE_C: {
1055 struct MessageUnit_C *reg = acb->pmuC;
1056 struct ARCMSR_CDB *pARCMSR_CDB;
1057 uint32_t flag_ccb, ccb_cdb_phy;
1058 bool error;
1059 struct CommandControlBlock *pCCB;
1060 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
1061 /*need to do*/
1062 flag_ccb = readl(&reg->outbound_queueport_low);
1063 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1064 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1065 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1066 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1067 arcmsr_drain_donequeue(acb, pCCB, error);
1068 }
1069 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001070 }
1071}
Ching Huang1d1166e2014-08-19 14:23:31 +08001072
Erich Chen1c57e862006-07-12 08:59:32 -07001073static void arcmsr_remove(struct pci_dev *pdev)
1074{
1075 struct Scsi_Host *host = pci_get_drvdata(pdev);
1076 struct AdapterControlBlock *acb =
1077 (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07001078 int poll_count = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001079 arcmsr_free_sysfs_attr(acb);
1080 scsi_remove_host(host);
Tejun Heo43829732012-08-20 14:51:24 -07001081 flush_work(&acb->arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +08001082 del_timer_sync(&acb->eternal_timer);
1083 arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001084 arcmsr_stop_adapter_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001085 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001086 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1087 acb->acb_flags &= ~ACB_F_IOP_INITED;
1088
Nick Chengcdd3cb12010-07-13 20:03:04 +08001089 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
Erich Chen1c57e862006-07-12 08:59:32 -07001090 if (!atomic_read(&acb->ccboutstandingcount))
1091 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001092 arcmsr_interrupt(acb);/* FIXME: need spinlock */
Erich Chen1c57e862006-07-12 08:59:32 -07001093 msleep(25);
1094 }
1095
1096 if (atomic_read(&acb->ccboutstandingcount)) {
1097 int i;
1098
1099 arcmsr_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001100 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001101 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1102 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1103 if (ccb->startdone == ARCMSR_CCB_START) {
1104 ccb->startdone = ARCMSR_CCB_ABORTED;
1105 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001106 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001107 }
1108 }
1109 }
Ching Huang1d1166e2014-08-19 14:23:31 +08001110 arcmsr_free_irq(pdev, acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001111 arcmsr_free_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001112 arcmsr_free_hbb_mu(acb);
1113 arcmsr_unmap_pciregion(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001114 pci_release_regions(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001115 scsi_host_put(host);
Erich Chen1c57e862006-07-12 08:59:32 -07001116 pci_disable_device(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -07001117}
1118
1119static void arcmsr_shutdown(struct pci_dev *pdev)
1120{
1121 struct Scsi_Host *host = pci_get_drvdata(pdev);
1122 struct AdapterControlBlock *acb =
1123 (struct AdapterControlBlock *)host->hostdata;
Nick Cheng36b83de2010-05-17 11:22:42 +08001124 del_timer_sync(&acb->eternal_timer);
1125 arcmsr_disable_outbound_ints(acb);
Ching Huang1d1166e2014-08-19 14:23:31 +08001126 arcmsr_free_irq(pdev, acb);
Tejun Heo43829732012-08-20 14:51:24 -07001127 flush_work(&acb->arcmsr_do_message_isr_bh);
Erich Chen1c57e862006-07-12 08:59:32 -07001128 arcmsr_stop_adapter_bgrb(acb);
1129 arcmsr_flush_adapter_cache(acb);
1130}
1131
1132static int arcmsr_module_init(void)
1133{
1134 int error = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001135 error = pci_register_driver(&arcmsr_pci_driver);
1136 return error;
1137}
1138
1139static void arcmsr_module_exit(void)
1140{
1141 pci_unregister_driver(&arcmsr_pci_driver);
1142}
1143module_init(arcmsr_module_init);
1144module_exit(arcmsr_module_exit);
1145
Nick Cheng36b83de2010-05-17 11:22:42 +08001146static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001147 u32 intmask_org)
Erich Chen1c57e862006-07-12 08:59:32 -07001148{
Erich Chen1c57e862006-07-12 08:59:32 -07001149 u32 mask;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001150 switch (acb->adapter_type) {
1151
Nick Chengcdd3cb12010-07-13 20:03:04 +08001152 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001153 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001154 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
Nick Cheng36b83de2010-05-17 11:22:42 +08001155 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1156 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001157 writel(mask, &reg->outbound_intmask);
1158 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1159 }
1160 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001161
Nick Chengcdd3cb12010-07-13 20:03:04 +08001162 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001163 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +08001164 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1165 ARCMSR_IOP2DRV_DATA_READ_OK |
1166 ARCMSR_IOP2DRV_CDB_DONE |
1167 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
Nick Chengae52e7f2010-06-18 15:39:12 +08001168 writel(mask, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001169 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1170 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001171 break;
1172 case ACB_ADAPTER_TYPE_C: {
1173 struct MessageUnit_C *reg = acb->pmuC;
1174 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1175 writel(intmask_org & mask, &reg->host_int_mask);
1176 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1177 }
Erich Chen1c57e862006-07-12 08:59:32 -07001178 }
1179}
1180
Nick Cheng76d78302008-02-04 23:53:24 -08001181static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07001182 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1183{
1184 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1185 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
Al Viro80da1ad2007-10-29 05:08:28 +00001186 __le32 address_lo, address_hi;
Erich Chen1c57e862006-07-12 08:59:32 -07001187 int arccdbsize = 0x30;
Nick Chengae52e7f2010-06-18 15:39:12 +08001188 __le32 length = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001189 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +08001190 struct scatterlist *sg;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001191 int nseg;
Erich Chen1c57e862006-07-12 08:59:32 -07001192 ccb->pcmd = pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001193 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
Erich Chen1c57e862006-07-12 08:59:32 -07001194 arcmsr_cdb->TargetID = pcmd->device->id;
1195 arcmsr_cdb->LUN = pcmd->device->lun;
1196 arcmsr_cdb->Function = 1;
Nick Chengae52e7f2010-06-18 15:39:12 +08001197 arcmsr_cdb->Context = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001198 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
Erich Chen1c57e862006-07-12 08:59:32 -07001199
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001200 nseg = scsi_dma_map(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001201 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
Nick Cheng76d78302008-02-04 23:53:24 -08001202 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001203 scsi_for_each_sg(pcmd, sg, nseg, i) {
1204 /* Get the physical address of the current data pointer */
1205 length = cpu_to_le32(sg_dma_len(sg));
1206 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1207 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1208 if (address_hi == 0) {
1209 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001210
Nick Chengcdd3cb12010-07-13 20:03:04 +08001211 pdma_sg->address = address_lo;
1212 pdma_sg->length = length;
1213 psge += sizeof (struct SG32ENTRY);
1214 arccdbsize += sizeof (struct SG32ENTRY);
1215 } else {
1216 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001217
Nick Chengcdd3cb12010-07-13 20:03:04 +08001218 pdma_sg->addresshigh = address_hi;
1219 pdma_sg->address = address_lo;
1220 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1221 psge += sizeof (struct SG64ENTRY);
1222 arccdbsize += sizeof (struct SG64ENTRY);
Erich Chen1c57e862006-07-12 08:59:32 -07001223 }
Erich Chen1c57e862006-07-12 08:59:32 -07001224 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001225 arcmsr_cdb->sgcount = (uint8_t)nseg;
1226 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1227 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1228 if ( arccdbsize > 256)
1229 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
roel kluinc32e0612011-01-01 19:40:23 +01001230 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001231 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001232 ccb->arc_cdb_size = arccdbsize;
Nick Cheng76d78302008-02-04 23:53:24 -08001233 return SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07001234}
1235
1236static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1237{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001238 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
Erich Chen1c57e862006-07-12 08:59:32 -07001239 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07001240 atomic_inc(&acb->ccboutstandingcount);
1241 ccb->startdone = ARCMSR_CCB_START;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001242 switch (acb->adapter_type) {
1243 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001244 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001245
1246 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001247 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
Erich Chen1c57e862006-07-12 08:59:32 -07001248 &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001249 else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001250 writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001251 }
1252 }
1253 break;
1254
1255 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001256 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001257 uint32_t ending_index, index = reg->postq_index;
1258
1259 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1260 writel(0, &reg->post_qbuffer[ending_index]);
1261 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001262 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
Nick Cheng1a4f5502007-09-13 17:26:40 +08001263 &reg->post_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001264 } else {
1265 writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001266 }
1267 index++;
1268 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1269 reg->postq_index = index;
Nick Chengae52e7f2010-06-18 15:39:12 +08001270 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001271 }
1272 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001273 case ACB_ADAPTER_TYPE_C: {
1274 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1275 uint32_t ccb_post_stamp, arc_cdb_size;
1276
1277 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1278 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1279 if (acb->cdb_phyaddr_hi32) {
1280 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1281 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1282 } else {
1283 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1284 }
1285 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001286 }
Erich Chen1c57e862006-07-12 08:59:32 -07001287}
1288
Nick Cheng1a4f5502007-09-13 17:26:40 +08001289static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001290{
Al Viro80da1ad2007-10-29 05:08:28 +00001291 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001292 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1293 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001294 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001295 printk(KERN_NOTICE
1296 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1297 , acb->host->host_no);
1298 }
1299}
1300
1301static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1302{
Al Viro80da1ad2007-10-29 05:08:28 +00001303 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001304 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001305 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001306
Nick Chengcdd3cb12010-07-13 20:03:04 +08001307 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001308 printk(KERN_NOTICE
1309 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1310 , acb->host->host_no);
Erich Chen1c57e862006-07-12 08:59:32 -07001311 }
1312}
1313
Nick Chengcdd3cb12010-07-13 20:03:04 +08001314static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1315{
1316 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1317 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1318 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1319 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1320 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1321 printk(KERN_NOTICE
1322 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1323 , pACB->host->host_no);
1324 }
1325 return;
1326}
Erich Chen1c57e862006-07-12 08:59:32 -07001327static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1328{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001329 switch (acb->adapter_type) {
1330 case ACB_ADAPTER_TYPE_A: {
1331 arcmsr_stop_hba_bgrb(acb);
1332 }
1333 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001334
Nick Cheng1a4f5502007-09-13 17:26:40 +08001335 case ACB_ADAPTER_TYPE_B: {
1336 arcmsr_stop_hbb_bgrb(acb);
1337 }
1338 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001339 case ACB_ADAPTER_TYPE_C: {
1340 arcmsr_stop_hbc_bgrb(acb);
1341 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001342 }
Erich Chen1c57e862006-07-12 08:59:32 -07001343}
1344
1345static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1346{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001347 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
Erich Chen1c57e862006-07-12 08:59:32 -07001348}
1349
Nick Cheng1a4f5502007-09-13 17:26:40 +08001350void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001351{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001352 switch (acb->adapter_type) {
1353 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001354 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001355 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1356 }
1357 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001358
Nick Cheng1a4f5502007-09-13 17:26:40 +08001359 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001360 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001361 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001362 }
1363 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001364 case ACB_ADAPTER_TYPE_C: {
1365 struct MessageUnit_C __iomem *reg = acb->pmuC;
1366 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1367 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001368 }
1369}
1370
1371static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1372{
1373 switch (acb->adapter_type) {
1374 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001375 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001376 /*
1377 ** push inbound doorbell tell iop, driver data write ok
1378 ** and wait reply on next hwinterrupt for next Qbuffer post
1379 */
1380 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1381 }
1382 break;
1383
1384 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001385 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001386 /*
1387 ** push inbound doorbell tell iop, driver data write ok
1388 ** and wait reply on next hwinterrupt for next Qbuffer post
1389 */
Nick Chengae52e7f2010-06-18 15:39:12 +08001390 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001391 }
1392 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001393 case ACB_ADAPTER_TYPE_C: {
1394 struct MessageUnit_C __iomem *reg = acb->pmuC;
1395 /*
1396 ** push inbound doorbell tell iop, driver data write ok
1397 ** and wait reply on next hwinterrupt for next Qbuffer post
1398 */
1399 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1400 }
1401 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001402 }
1403}
1404
Al Viro80da1ad2007-10-29 05:08:28 +00001405struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001406{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001407 struct QBUFFER __iomem *qbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001408 switch (acb->adapter_type) {
1409
1410 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001411 struct MessageUnit_A __iomem *reg = acb->pmuA;
1412 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001413 }
1414 break;
1415
1416 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001417 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001418 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001419 }
1420 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001421 case ACB_ADAPTER_TYPE_C: {
1422 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1423 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1424 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001425 }
1426 return qbuffer;
1427}
1428
Al Viro80da1ad2007-10-29 05:08:28 +00001429static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001430{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001431 struct QBUFFER __iomem *pqbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001432 switch (acb->adapter_type) {
1433
1434 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001435 struct MessageUnit_A __iomem *reg = acb->pmuA;
1436 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001437 }
1438 break;
1439
1440 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001441 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001442 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001443 }
1444 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001445 case ACB_ADAPTER_TYPE_C: {
1446 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1447 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1448 }
1449
Nick Cheng1a4f5502007-09-13 17:26:40 +08001450 }
1451 return pqbuffer;
1452}
1453
1454static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1455{
Al Viro80da1ad2007-10-29 05:08:28 +00001456 struct QBUFFER __iomem *prbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001457 struct QBUFFER *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001458 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001459 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001460 rqbuf_lastindex = acb->rqbuf_lastindex;
1461 rqbuf_firstindex = acb->rqbuf_firstindex;
1462 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001463 iop_data = (uint8_t __iomem *)prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001464 iop_len = prbuffer->data_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001465 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001466
1467 if (my_empty_len >= iop_len)
1468 {
1469 while (iop_len > 0) {
1470 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
Nick Chengcdd3cb12010-07-13 20:03:04 +08001471 memcpy(pQbuffer, iop_data, 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001472 rqbuf_lastindex++;
1473 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1474 iop_data++;
1475 iop_len--;
1476 }
1477 acb->rqbuf_lastindex = rqbuf_lastindex;
1478 arcmsr_iop_message_read(acb);
1479 }
1480
1481 else {
1482 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1483 }
1484}
1485
1486static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1487{
1488 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1489 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1490 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001491 struct QBUFFER __iomem *pwbuffer;
1492 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001493 int32_t allxfer_len = 0;
1494
1495 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1496 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1497 iop_data = (uint8_t __iomem *)pwbuffer->data;
1498
1499 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1500 (allxfer_len < 124)) {
1501 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1502 memcpy(iop_data, pQbuffer, 1);
1503 acb->wqbuf_firstindex++;
1504 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1505 iop_data++;
1506 allxfer_len++;
1507 }
1508 pwbuffer->data_len = allxfer_len;
1509
1510 arcmsr_iop_message_wrote(acb);
1511 }
1512
1513 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1514 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1515 }
1516}
1517
1518static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1519{
1520 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001521 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001522 outbound_doorbell = readl(&reg->outbound_doorbell);
Ching Huang6b393722014-08-19 14:18:24 +08001523 do {
1524 writel(outbound_doorbell, &reg->outbound_doorbell);
1525 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
1526 arcmsr_iop2drv_data_wrote_handle(acb);
1527 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
1528 arcmsr_iop2drv_data_read_handle(acb);
1529 outbound_doorbell = readl(&reg->outbound_doorbell);
1530 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
1531 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
Nick Cheng1a4f5502007-09-13 17:26:40 +08001532}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001533static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1534{
1535 uint32_t outbound_doorbell;
1536 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1537 /*
1538 *******************************************************************
1539 ** Maybe here we need to check wrqbuffer_lock is lock or not
1540 ** DOORBELL: din! don!
1541 ** check if there are any mail need to pack from firmware
1542 *******************************************************************
1543 */
1544 outbound_doorbell = readl(&reg->outbound_doorbell);
Ching Huang6b393722014-08-19 14:18:24 +08001545 do {
1546 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
1547 readl(&reg->outbound_doorbell_clear);
1548 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
1549 arcmsr_iop2drv_data_wrote_handle(pACB);
1550 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
1551 arcmsr_iop2drv_data_read_handle(pACB);
1552 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
1553 arcmsr_hbc_message_isr(pACB);
1554 outbound_doorbell = readl(&reg->outbound_doorbell);
1555 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
1556 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
1557 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001558}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001559static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1560{
1561 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001562 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001563 struct ARCMSR_CDB *pARCMSR_CDB;
1564 struct CommandControlBlock *pCCB;
1565 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001566 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001567 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1568 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1569 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1570 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001571 }
1572}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001573static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1574{
1575 uint32_t index;
1576 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001577 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001578 struct ARCMSR_CDB *pARCMSR_CDB;
1579 struct CommandControlBlock *pCCB;
1580 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001581 index = reg->doneq_index;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001582 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1583 writel(0, &reg->done_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001584 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1585 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1586 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1587 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001588 index++;
1589 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1590 reg->doneq_index = index;
1591 }
1592}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001593
1594static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1595{
1596 struct MessageUnit_C *phbcmu;
1597 struct ARCMSR_CDB *arcmsr_cdb;
1598 struct CommandControlBlock *ccb;
1599 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1600 int error;
1601
1602 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1603 /* areca cdb command done */
1604 /* Use correct offset and size for syncing */
1605
Ching Huang6b393722014-08-19 14:18:24 +08001606 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
1607 0xFFFFFFFF) {
1608 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1609 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
1610 + ccb_cdb_phy);
1611 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
1612 arcmsr_cdb);
1613 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
1614 ? true : false;
1615 /* check if command done with no error */
1616 arcmsr_drain_donequeue(acb, ccb, error);
1617 throttling++;
1618 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1619 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
1620 &phbcmu->inbound_doorbell);
1621 throttling = 0;
1622 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001623 }
1624}
Nick Cheng36b83de2010-05-17 11:22:42 +08001625/*
1626**********************************************************************************
1627** Handle a message interrupt
1628**
Nick Chengcdd3cb12010-07-13 20:03:04 +08001629** The only message interrupt we expect is in response to a query for the current adapter config.
Nick Cheng36b83de2010-05-17 11:22:42 +08001630** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1631**********************************************************************************
1632*/
1633static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1634{
1635 struct MessageUnit_A *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001636 /*clear interrupt and message state*/
1637 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1638 schedule_work(&acb->arcmsr_do_message_isr_bh);
1639}
1640static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1641{
1642 struct MessageUnit_B *reg = acb->pmuB;
1643
1644 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001645 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001646 schedule_work(&acb->arcmsr_do_message_isr_bh);
1647}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001648/*
1649**********************************************************************************
1650** Handle a message interrupt
1651**
1652** The only message interrupt we expect is in response to a query for the
1653** current adapter config.
1654** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1655**********************************************************************************
1656*/
1657static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1658{
1659 struct MessageUnit_C *reg = acb->pmuC;
1660 /*clear interrupt and message state*/
1661 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1662 schedule_work(&acb->arcmsr_do_message_isr_bh);
1663}
1664
Nick Cheng1a4f5502007-09-13 17:26:40 +08001665static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1666{
1667 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001668 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001669 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001670 acb->outbound_int_enable;
Ching Huang6b393722014-08-19 14:18:24 +08001671 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
1672 return IRQ_NONE;
1673 do {
1674 writel(outbound_intstatus, &reg->outbound_intstatus);
1675 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
1676 arcmsr_hba_doorbell_isr(acb);
1677 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
1678 arcmsr_hba_postqueue_isr(acb);
1679 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
1680 arcmsr_hba_message_isr(acb);
1681 outbound_intstatus = readl(&reg->outbound_intstatus) &
1682 acb->outbound_int_enable;
1683 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
1684 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
1685 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
1686 return IRQ_HANDLED;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001687}
1688
1689static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1690{
1691 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001692 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001693 outbound_doorbell = readl(reg->iop2drv_doorbell) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001694 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001695 if (!outbound_doorbell)
Ching Huang6b393722014-08-19 14:18:24 +08001696 return IRQ_NONE;
1697 do {
1698 writel(~outbound_doorbell, reg->iop2drv_doorbell);
1699 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
1700 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
1701 arcmsr_iop2drv_data_wrote_handle(acb);
1702 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
1703 arcmsr_iop2drv_data_read_handle(acb);
1704 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
1705 arcmsr_hbb_postqueue_isr(acb);
1706 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
1707 arcmsr_hbb_message_isr(acb);
1708 outbound_doorbell = readl(reg->iop2drv_doorbell) &
1709 acb->outbound_int_enable;
1710 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
1711 | ARCMSR_IOP2DRV_DATA_READ_OK
1712 | ARCMSR_IOP2DRV_CDB_DONE
1713 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
1714 return IRQ_HANDLED;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001715}
1716
Nick Chengcdd3cb12010-07-13 20:03:04 +08001717static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1718{
1719 uint32_t host_interrupt_status;
1720 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1721 /*
1722 *********************************************
1723 ** check outbound intstatus
1724 *********************************************
1725 */
Ching Huang6b393722014-08-19 14:18:24 +08001726 host_interrupt_status = readl(&phbcmu->host_int_status) &
1727 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
1728 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
1729 if (!host_interrupt_status)
1730 return IRQ_NONE;
1731 do {
1732 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
1733 arcmsr_hbc_doorbell_isr(pACB);
1734 /* MU post queue interrupts*/
1735 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
1736 arcmsr_hbc_postqueue_isr(pACB);
1737 host_interrupt_status = readl(&phbcmu->host_int_status);
1738 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
1739 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
1740 return IRQ_HANDLED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001741}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001742static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1743{
1744 switch (acb->adapter_type) {
Ching Huang6b393722014-08-19 14:18:24 +08001745 case ACB_ADAPTER_TYPE_A:
1746 return arcmsr_handle_hba_isr(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001747 break;
Ching Huang6b393722014-08-19 14:18:24 +08001748 case ACB_ADAPTER_TYPE_B:
1749 return arcmsr_handle_hbb_isr(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001750 break;
Ching Huang6b393722014-08-19 14:18:24 +08001751 case ACB_ADAPTER_TYPE_C:
1752 return arcmsr_handle_hbc_isr(acb);
1753 default:
1754 return IRQ_NONE;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001755 }
Erich Chen1c57e862006-07-12 08:59:32 -07001756}
1757
1758static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1759{
1760 if (acb) {
1761 /* stop adapter background rebuild */
1762 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001763 uint32_t intmask_org;
Erich Chen1c57e862006-07-12 08:59:32 -07001764 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001765 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001766 arcmsr_stop_adapter_bgrb(acb);
1767 arcmsr_flush_adapter_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001768 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07001769 }
1770 }
1771}
1772
Nick Cheng1a4f5502007-09-13 17:26:40 +08001773void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001774{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001775 int32_t wqbuf_firstindex, wqbuf_lastindex;
1776 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001777 struct QBUFFER __iomem *pwbuffer;
1778 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001779 int32_t allxfer_len = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001780 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1781 iop_data = (uint8_t __iomem *)pwbuffer->data;
1782 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1783 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1784 wqbuf_firstindex = acb->wqbuf_firstindex;
1785 wqbuf_lastindex = acb->wqbuf_lastindex;
1786 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1787 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1788 memcpy(iop_data, pQbuffer, 1);
1789 wqbuf_firstindex++;
1790 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1791 iop_data++;
1792 allxfer_len++;
1793 }
1794 acb->wqbuf_firstindex = wqbuf_firstindex;
1795 pwbuffer->data_len = allxfer_len;
1796 arcmsr_iop_message_wrote(acb);
1797 }
1798}
1799
Nick Cheng36b83de2010-05-17 11:22:42 +08001800static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001801 struct scsi_cmnd *cmd)
1802{
Erich Chen1c57e862006-07-12 08:59:32 -07001803 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1804 int retvalue = 0, transfer_len = 0;
1805 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001806 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07001807 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1808 (uint32_t ) cmd->cmnd[6] << 16 |
1809 (uint32_t ) cmd->cmnd[7] << 8 |
1810 (uint32_t ) cmd->cmnd[8];
Nick Cheng1a4f5502007-09-13 17:26:40 +08001811 /* 4 bytes: Areca io control code */
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001812 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08001813 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001814 if (scsi_sg_count(cmd) > 1) {
1815 retvalue = ARCMSR_MESSAGE_FAIL;
1816 goto message_out;
Erich Chen1c57e862006-07-12 08:59:32 -07001817 }
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001818 transfer_len += sg->length;
1819
Erich Chen1c57e862006-07-12 08:59:32 -07001820 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1821 retvalue = ARCMSR_MESSAGE_FAIL;
1822 goto message_out;
1823 }
1824 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1825 switch(controlcode) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001826
Erich Chen1c57e862006-07-12 08:59:32 -07001827 case ARCMSR_MESSAGE_READ_RQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001828 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001829 uint8_t *pQbuffer, *ptmpQbuffer;
1830 int32_t allxfer_len = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001831
Daniel Drake69e562c2008-02-20 13:29:05 +00001832 ver_addr = kmalloc(1032, GFP_ATOMIC);
1833 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001834 retvalue = ARCMSR_MESSAGE_FAIL;
1835 goto message_out;
1836 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001837
Daniel Drake69e562c2008-02-20 13:29:05 +00001838 ptmpQbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001839 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1840 && (allxfer_len < 1031)) {
1841 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1842 memcpy(ptmpQbuffer, pQbuffer, 1);
1843 acb->rqbuf_firstindex++;
1844 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1845 ptmpQbuffer++;
1846 allxfer_len++;
1847 }
1848 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
Erich Chen1c57e862006-07-12 08:59:32 -07001849
Al Viro80da1ad2007-10-29 05:08:28 +00001850 struct QBUFFER __iomem *prbuffer;
1851 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001852 int32_t iop_len;
1853
1854 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1855 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001856 iop_data = prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001857 iop_len = readl(&prbuffer->data_len);
1858 while (iop_len > 0) {
1859 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1860 acb->rqbuf_lastindex++;
1861 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1862 iop_data++;
1863 iop_len--;
Erich Chen1c57e862006-07-12 08:59:32 -07001864 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001865 arcmsr_iop_message_read(acb);
1866 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001867 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001868 pcmdmessagefld->cmdmessage.Length = allxfer_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001869 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001870 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001871 }else{
1872 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Chengae52e7f2010-06-18 15:39:12 +08001873 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001874 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001875 }
1876 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001877
Nick Cheng1a4f5502007-09-13 17:26:40 +08001878 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001879 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001880 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1881 uint8_t *pQbuffer, *ptmpuserbuffer;
1882
Daniel Drake69e562c2008-02-20 13:29:05 +00001883 ver_addr = kmalloc(1032, GFP_ATOMIC);
1884 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001885 retvalue = ARCMSR_MESSAGE_FAIL;
1886 goto message_out;
1887 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001888 if(acb->fw_flag == FW_DEADLOCK) {
1889 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Cheng36b83de2010-05-17 11:22:42 +08001890 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001891 }else{
1892 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Chengae52e7f2010-06-18 15:39:12 +08001893 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001894 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001895 ptmpuserbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001896 user_len = pcmdmessagefld->cmdmessage.Length;
1897 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1898 wqbuf_lastindex = acb->wqbuf_lastindex;
1899 wqbuf_firstindex = acb->wqbuf_firstindex;
1900 if (wqbuf_lastindex != wqbuf_firstindex) {
1901 struct SENSE_DATA *sensebuffer =
1902 (struct SENSE_DATA *)cmd->sense_buffer;
1903 arcmsr_post_ioctldata2iop(acb);
1904 /* has error report sensedata */
1905 sensebuffer->ErrorCode = 0x70;
1906 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1907 sensebuffer->AdditionalSenseLength = 0x0A;
1908 sensebuffer->AdditionalSenseCode = 0x20;
1909 sensebuffer->Valid = 1;
1910 retvalue = ARCMSR_MESSAGE_FAIL;
1911 } else {
1912 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1913 &(ARCMSR_MAX_QBUFFER - 1);
1914 if (my_empty_len >= user_len) {
1915 while (user_len > 0) {
1916 pQbuffer =
1917 &acb->wqbuffer[acb->wqbuf_lastindex];
1918 memcpy(pQbuffer, ptmpuserbuffer, 1);
1919 acb->wqbuf_lastindex++;
1920 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1921 ptmpuserbuffer++;
1922 user_len--;
1923 }
1924 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1925 acb->acb_flags &=
1926 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1927 arcmsr_post_ioctldata2iop(acb);
1928 }
1929 } else {
1930 /* has error report sensedata */
Erich Chen1c57e862006-07-12 08:59:32 -07001931 struct SENSE_DATA *sensebuffer =
1932 (struct SENSE_DATA *)cmd->sense_buffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001933 sensebuffer->ErrorCode = 0x70;
1934 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1935 sensebuffer->AdditionalSenseLength = 0x0A;
1936 sensebuffer->AdditionalSenseCode = 0x20;
1937 sensebuffer->Valid = 1;
1938 retvalue = ARCMSR_MESSAGE_FAIL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001939 }
Erich Chen1c57e862006-07-12 08:59:32 -07001940 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001941 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001942 }
1943 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001944
Erich Chen1c57e862006-07-12 08:59:32 -07001945 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001946 uint8_t *pQbuffer = acb->rqbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001947 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1948 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1949 arcmsr_iop_message_read(acb);
1950 }
1951 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1952 acb->rqbuf_firstindex = 0;
1953 acb->rqbuf_lastindex = 0;
1954 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001955 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001956 pcmdmessagefld->cmdmessage.ReturnCode =
1957 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001958 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001959 pcmdmessagefld->cmdmessage.ReturnCode =
1960 ARCMSR_MESSAGE_RETURNCODE_OK;
1961 }
Erich Chen1c57e862006-07-12 08:59:32 -07001962 }
1963 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001964
Erich Chen1c57e862006-07-12 08:59:32 -07001965 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001966 uint8_t *pQbuffer = acb->wqbuffer;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001967 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001968 pcmdmessagefld->cmdmessage.ReturnCode =
1969 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001970 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001971 pcmdmessagefld->cmdmessage.ReturnCode =
1972 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001973 }
Erich Chen1c57e862006-07-12 08:59:32 -07001974
Nick Cheng1a4f5502007-09-13 17:26:40 +08001975 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1976 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1977 arcmsr_iop_message_read(acb);
1978 }
1979 acb->acb_flags |=
1980 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1981 ACB_F_MESSAGE_WQBUFFER_READED);
1982 acb->wqbuf_firstindex = 0;
1983 acb->wqbuf_lastindex = 0;
1984 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Erich Chen1c57e862006-07-12 08:59:32 -07001985 }
1986 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001987
Erich Chen1c57e862006-07-12 08:59:32 -07001988 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001989 uint8_t *pQbuffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001990
Nick Cheng1a4f5502007-09-13 17:26:40 +08001991 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1992 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1993 arcmsr_iop_message_read(acb);
1994 }
1995 acb->acb_flags |=
1996 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1997 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1998 | ACB_F_MESSAGE_WQBUFFER_READED);
1999 acb->rqbuf_firstindex = 0;
2000 acb->rqbuf_lastindex = 0;
2001 acb->wqbuf_firstindex = 0;
2002 acb->wqbuf_lastindex = 0;
2003 pQbuffer = acb->rqbuffer;
2004 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2005 pQbuffer = acb->wqbuffer;
2006 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002007 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002008 pcmdmessagefld->cmdmessage.ReturnCode =
2009 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002010 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002011 pcmdmessagefld->cmdmessage.ReturnCode =
2012 ARCMSR_MESSAGE_RETURNCODE_OK;
2013 }
Erich Chen1c57e862006-07-12 08:59:32 -07002014 }
2015 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002016
Erich Chen1c57e862006-07-12 08:59:32 -07002017 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002018 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002019 pcmdmessagefld->cmdmessage.ReturnCode =
2020 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002021 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002022 pcmdmessagefld->cmdmessage.ReturnCode =
2023 ARCMSR_MESSAGE_RETURNCODE_3F;
Erich Chen1c57e862006-07-12 08:59:32 -07002024 }
2025 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002026 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002027 case ARCMSR_MESSAGE_SAY_HELLO: {
2028 int8_t *hello_string = "Hello! I am ARCMSR";
Nick Chengcdd3cb12010-07-13 20:03:04 +08002029 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002030 pcmdmessagefld->cmdmessage.ReturnCode =
2031 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002032 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002033 pcmdmessagefld->cmdmessage.ReturnCode =
2034 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08002035 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002036 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
2037 , (int16_t)strlen(hello_string));
Erich Chen1c57e862006-07-12 08:59:32 -07002038 }
2039 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002040
Erich Chen1c57e862006-07-12 08:59:32 -07002041 case ARCMSR_MESSAGE_SAY_GOODBYE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08002042 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002043 pcmdmessagefld->cmdmessage.ReturnCode =
2044 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08002045 }
Erich Chen1c57e862006-07-12 08:59:32 -07002046 arcmsr_iop_parking(acb);
2047 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002048
Erich Chen1c57e862006-07-12 08:59:32 -07002049 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08002050 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002051 pcmdmessagefld->cmdmessage.ReturnCode =
2052 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08002053 }
Erich Chen1c57e862006-07-12 08:59:32 -07002054 arcmsr_flush_adapter_cache(acb);
2055 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002056
Erich Chen1c57e862006-07-12 08:59:32 -07002057 default:
2058 retvalue = ARCMSR_MESSAGE_FAIL;
2059 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002060 message_out:
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002061 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002062 kunmap_atomic(buffer - sg->offset);
Erich Chen1c57e862006-07-12 08:59:32 -07002063 return retvalue;
2064}
2065
2066static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2067{
2068 struct list_head *head = &acb->ccb_free_list;
2069 struct CommandControlBlock *ccb = NULL;
Nick Chengae52e7f2010-06-18 15:39:12 +08002070 unsigned long flags;
2071 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002072 if (!list_empty(head)) {
2073 ccb = list_entry(head->next, struct CommandControlBlock, list);
Nick Chengae52e7f2010-06-18 15:39:12 +08002074 list_del_init(&ccb->list);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002075 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002076 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2077 return 0;
Erich Chen1c57e862006-07-12 08:59:32 -07002078 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002079 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002080 return ccb;
2081}
2082
2083static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2084 struct scsi_cmnd *cmd)
2085{
2086 switch (cmd->cmnd[0]) {
2087 case INQUIRY: {
2088 unsigned char inqdata[36];
2089 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002090 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07002091
2092 if (cmd->device->lun) {
2093 cmd->result = (DID_TIME_OUT << 16);
2094 cmd->scsi_done(cmd);
2095 return;
2096 }
2097 inqdata[0] = TYPE_PROCESSOR;
2098 /* Periph Qualifier & Periph Dev Type */
2099 inqdata[1] = 0;
2100 /* rem media bit & Dev Type Modifier */
2101 inqdata[2] = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002102 /* ISO, ECMA, & ANSI versions */
Erich Chen1c57e862006-07-12 08:59:32 -07002103 inqdata[4] = 31;
2104 /* length of additional data */
2105 strncpy(&inqdata[8], "Areca ", 8);
2106 /* Vendor Identification */
2107 strncpy(&inqdata[16], "RAID controller ", 16);
2108 /* Product Identification */
2109 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
Erich Chen1c57e862006-07-12 08:59:32 -07002110
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002111 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002112 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002113
Erich Chen1c57e862006-07-12 08:59:32 -07002114 memcpy(buffer, inqdata, sizeof(inqdata));
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002115 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002116 kunmap_atomic(buffer - sg->offset);
Erich Chen1c57e862006-07-12 08:59:32 -07002117
Erich Chen1c57e862006-07-12 08:59:32 -07002118 cmd->scsi_done(cmd);
2119 }
2120 break;
2121 case WRITE_BUFFER:
2122 case READ_BUFFER: {
2123 if (arcmsr_iop_message_xfer(acb, cmd))
2124 cmd->result = (DID_ERROR << 16);
2125 cmd->scsi_done(cmd);
2126 }
2127 break;
2128 default:
2129 cmd->scsi_done(cmd);
2130 }
2131}
2132
Jeff Garzikf2812332010-11-16 02:10:29 -05002133static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
Erich Chen1c57e862006-07-12 08:59:32 -07002134 void (* done)(struct scsi_cmnd *))
2135{
2136 struct Scsi_Host *host = cmd->device->host;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002137 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07002138 struct CommandControlBlock *ccb;
2139 int target = cmd->device->id;
2140 int lun = cmd->device->lun;
Nick Cheng36b83de2010-05-17 11:22:42 +08002141 uint8_t scsicmd = cmd->cmnd[0];
Erich Chen1c57e862006-07-12 08:59:32 -07002142 cmd->scsi_done = done;
2143 cmd->host_scribble = NULL;
2144 cmd->result = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002145 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2146 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2147 cmd->result = (DID_NO_CONNECT << 16);
Nick Cheng36b83de2010-05-17 11:22:42 +08002148 }
2149 cmd->scsi_done(cmd);
2150 return 0;
2151 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002152 if (target == 16) {
Erich Chen1c57e862006-07-12 08:59:32 -07002153 /* virtual device for iop message transfer */
2154 arcmsr_handle_virtual_command(acb, cmd);
2155 return 0;
2156 }
Erich Chen1c57e862006-07-12 08:59:32 -07002157 ccb = arcmsr_get_freeccb(acb);
2158 if (!ccb)
2159 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002160 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
Nick Cheng76d78302008-02-04 23:53:24 -08002161 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2162 cmd->scsi_done(cmd);
2163 return 0;
2164 }
Erich Chen1c57e862006-07-12 08:59:32 -07002165 arcmsr_post_ccb(acb, ccb);
2166 return 0;
2167}
2168
Jeff Garzikf2812332010-11-16 02:10:29 -05002169static DEF_SCSI_QCMD(arcmsr_queue_command)
2170
Nick Chengae52e7f2010-06-18 15:39:12 +08002171static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002172{
Al Viro80da1ad2007-10-29 05:08:28 +00002173 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002174 char *acb_firm_model = acb->firm_model;
2175 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002176 char *acb_device_map = acb->device_map;
Al Viro80da1ad2007-10-29 05:08:28 +00002177 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2178 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002179 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
Erich Chen1c57e862006-07-12 08:59:32 -07002180 int count;
Erich Chen1c57e862006-07-12 08:59:32 -07002181 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002182 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002183 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2184 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002185 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002186 }
Erich Chen1c57e862006-07-12 08:59:32 -07002187 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002188 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002189 *acb_firm_model = readb(iop_firm_model);
2190 acb_firm_model++;
2191 iop_firm_model++;
2192 count--;
2193 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002194
Erich Chen1c57e862006-07-12 08:59:32 -07002195 count = 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002196 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002197 *acb_firm_version = readb(iop_firm_version);
2198 acb_firm_version++;
2199 iop_firm_version++;
2200 count--;
2201 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002202
Nick Chengcdd3cb12010-07-13 20:03:04 +08002203 count=16;
2204 while(count){
2205 *acb_device_map = readb(iop_device_map);
2206 acb_device_map++;
2207 iop_device_map++;
2208 count--;
2209 }
2210 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengae52e7f2010-06-18 15:39:12 +08002211 acb->host->host_no,
2212 acb->firm_version,
2213 acb->firm_model);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002214 acb->signature = readl(&reg->message_rwbuffer[0]);
Erich Chen1c57e862006-07-12 08:59:32 -07002215 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2216 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2217 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2218 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002219 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2220 return true;
Erich Chen1c57e862006-07-12 08:59:32 -07002221}
Nick Chengae52e7f2010-06-18 15:39:12 +08002222static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002223{
Al Viro80da1ad2007-10-29 05:08:28 +00002224 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002225 struct pci_dev *pdev = acb->pdev;
2226 void *dma_coherent;
2227 dma_addr_t dma_coherent_handle;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002228 char *acb_firm_model = acb->firm_model;
2229 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002230 char *acb_device_map = acb->device_map;
Nick Chengae52e7f2010-06-18 15:39:12 +08002231 char __iomem *iop_firm_model;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002232 /*firm_model,15,60-67*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002233 char __iomem *iop_firm_version;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002234 /*firm_version,17,68-83*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002235 char __iomem *iop_device_map;
Nick Cheng36b83de2010-05-17 11:22:42 +08002236 /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002237 int count;
Nick Chengae52e7f2010-06-18 15:39:12 +08002238 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002239 if (!dma_coherent){
Nick Chengae52e7f2010-06-18 15:39:12 +08002240 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2241 return false;
2242 }
2243 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2244 reg = (struct MessageUnit_B *)dma_coherent;
2245 acb->pmuB = reg;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002246 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
Nick Chengae52e7f2010-06-18 15:39:12 +08002247 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2248 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2249 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2250 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2251 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2252 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2253 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2254 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2255 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002256
Nick Chengae52e7f2010-06-18 15:39:12 +08002257 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002258 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002259 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2260 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002261 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002262 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002263 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002264 while (count){
2265 *acb_firm_model = readb(iop_firm_model);
2266 acb_firm_model++;
2267 iop_firm_model++;
2268 count--;
2269 }
2270 count = 16;
2271 while (count){
2272 *acb_firm_version = readb(iop_firm_version);
2273 acb_firm_version++;
2274 iop_firm_version++;
2275 count--;
2276 }
2277
2278 count = 16;
2279 while(count){
2280 *acb_device_map = readb(iop_device_map);
2281 acb_device_map++;
2282 iop_device_map++;
2283 count--;
2284 }
2285
2286 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2287 acb->host->host_no,
2288 acb->firm_version,
2289 acb->firm_model);
2290
2291 acb->signature = readl(&reg->message_rwbuffer[1]);
2292 /*firm_signature,1,00-03*/
2293 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2294 /*firm_request_len,1,04-07*/
2295 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2296 /*firm_numbers_queue,2,08-11*/
2297 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2298 /*firm_sdram_size,3,12-15*/
2299 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2300 /*firm_ide_channels,4,16-19*/
2301 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2302 /*firm_ide_channels,4,16-19*/
2303 return true;
2304}
2305
2306static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2307{
2308 uint32_t intmask_org, Index, firmware_state = 0;
2309 struct MessageUnit_C *reg = pACB->pmuC;
2310 char *acb_firm_model = pACB->firm_model;
2311 char *acb_firm_version = pACB->firm_version;
2312 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2313 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2314 int count;
2315 /* disable all outbound interrupt */
2316 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2317 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2318 /* wait firmware ready */
2319 do {
2320 firmware_state = readl(&reg->outbound_msgaddr1);
2321 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2322 /* post "get config" instruction */
2323 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2324 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2325 /* wait message ready */
2326 for (Index = 0; Index < 2000; Index++) {
2327 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2328 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2329 break;
2330 }
2331 udelay(10);
2332 } /*max 1 seconds*/
2333 if (Index >= 2000) {
2334 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2335 miscellaneous data' timeout \n", pACB->host->host_no);
2336 return false;
2337 }
2338 count = 8;
Nick Chengae52e7f2010-06-18 15:39:12 +08002339 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002340 *acb_firm_model = readb(iop_firm_model);
2341 acb_firm_model++;
2342 iop_firm_model++;
2343 count--;
2344 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002345 count = 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002346 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002347 *acb_firm_version = readb(iop_firm_version);
2348 acb_firm_version++;
2349 iop_firm_version++;
2350 count--;
2351 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002352 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002353 pACB->host->host_no,
2354 pACB->firm_version,
2355 pACB->firm_model);
2356 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2357 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2358 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2359 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2360 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2361 /*all interrupt service will be enable at arcmsr_iop_init*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002362 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002363}
Nick Chengae52e7f2010-06-18 15:39:12 +08002364static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002365{
Ching Huang3df824a2014-08-19 14:29:41 +08002366 bool rtn = false;
2367
2368 switch (acb->adapter_type) {
2369 case ACB_ADAPTER_TYPE_A:
2370 rtn = arcmsr_get_hba_config(acb);
2371 break;
2372 case ACB_ADAPTER_TYPE_B:
2373 rtn = arcmsr_get_hbb_config(acb);
2374 break;
2375 case ACB_ADAPTER_TYPE_C:
2376 rtn = arcmsr_get_hbc_config(acb);
2377 break;
2378 default:
2379 break;
2380 }
2381 if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD)
2382 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002383 else
Ching Huang3df824a2014-08-19 14:29:41 +08002384 acb->maxOutstanding = acb->firm_numbers_queue - 1;
2385 acb->host->can_queue = acb->maxOutstanding;
2386 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002387}
2388
Nick Chengae52e7f2010-06-18 15:39:12 +08002389static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07002390 struct CommandControlBlock *poll_ccb)
2391{
Al Viro80da1ad2007-10-29 05:08:28 +00002392 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002393 struct CommandControlBlock *ccb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002394 struct ARCMSR_CDB *arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07002395 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002396 int rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002397 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002398 polling_hba_ccb_retry:
Erich Chen1c57e862006-07-12 08:59:32 -07002399 poll_count++;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002400 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
Erich Chen1c57e862006-07-12 08:59:32 -07002401 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2402 while (1) {
2403 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002404 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002405 rtn = SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07002406 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002407 }else {
2408 msleep(25);
2409 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002410 rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07002411 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002412 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002413 goto polling_hba_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002414 }
2415 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002416 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2417 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Ching Huangcab5aec2014-08-19 14:47:16 +08002418 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002419 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2420 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2421 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
Erich Chen1c57e862006-07-12 08:59:32 -07002422 " poll command abort successfully \n"
2423 , acb->host->host_no
2424 , ccb->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002425 , (u32)ccb->pcmd->device->lun
Erich Chen1c57e862006-07-12 08:59:32 -07002426 , ccb);
2427 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002428 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002429 continue;
2430 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002431 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2432 " command done ccb = '0x%p'"
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002433 "ccboutstandingcount = %d \n"
Erich Chen1c57e862006-07-12 08:59:32 -07002434 , acb->host->host_no
2435 , ccb
2436 , atomic_read(&acb->ccboutstandingcount));
2437 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002438 }
2439 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2440 arcmsr_report_ccb_state(acb, ccb, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002441 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002442 return rtn;
2443}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002444
Nick Chengae52e7f2010-06-18 15:39:12 +08002445static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002446 struct CommandControlBlock *poll_ccb)
2447{
Nick Chengcdd3cb12010-07-13 20:03:04 +08002448 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002449 struct ARCMSR_CDB *arcmsr_cdb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002450 struct CommandControlBlock *ccb;
2451 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002452 int index, rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002453 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002454 polling_hbb_ccb_retry:
NickCheng97b99122011-01-06 17:32:41 +08002455
Nick Chengcdd3cb12010-07-13 20:03:04 +08002456 poll_count++;
2457 /* clear doorbell interrupt */
Nick Chengae52e7f2010-06-18 15:39:12 +08002458 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002459 while(1){
2460 index = reg->doneq_index;
2461 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2462 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002463 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002464 break;
2465 }else {
2466 msleep(25);
2467 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002468 rtn = FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002469 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002470 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002471 goto polling_hbb_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002472 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002473 }
2474 writel(0, &reg->done_qbuffer[index]);
2475 index++;
2476 /*if last index number set it to 0 */
2477 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2478 reg->doneq_index = index;
2479 /* check if command done with no error*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002480 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2481 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Ching Huangcab5aec2014-08-19 14:47:16 +08002482 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002483 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2484 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002485 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2486 " poll command abort successfully \n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08002487 ,acb->host->host_no
2488 ,ccb->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002489 ,(u32)ccb->pcmd->device->lun
Nick Chengcdd3cb12010-07-13 20:03:04 +08002490 ,ccb);
2491 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002492 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002493 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002494 }
2495 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2496 " command done ccb = '0x%p'"
2497 "ccboutstandingcount = %d \n"
2498 , acb->host->host_no
2499 , ccb
2500 , atomic_read(&acb->ccboutstandingcount));
2501 continue;
2502 }
2503 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2504 arcmsr_report_ccb_state(acb, ccb, error);
2505 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002506 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002507}
2508
Nick Chengcdd3cb12010-07-13 20:03:04 +08002509static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2510{
2511 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2512 uint32_t flag_ccb, ccb_cdb_phy;
2513 struct ARCMSR_CDB *arcmsr_cdb;
2514 bool error;
2515 struct CommandControlBlock *pCCB;
2516 uint32_t poll_ccb_done = 0, poll_count = 0;
2517 int rtn;
2518polling_hbc_ccb_retry:
2519 poll_count++;
2520 while (1) {
2521 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2522 if (poll_ccb_done) {
2523 rtn = SUCCESS;
2524 break;
2525 } else {
2526 msleep(25);
2527 if (poll_count > 100) {
2528 rtn = FAILED;
2529 break;
2530 }
2531 goto polling_hbc_ccb_retry;
2532 }
2533 }
2534 flag_ccb = readl(&reg->outbound_queueport_low);
2535 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2536 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
2537 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Ching Huangcab5aec2014-08-19 14:47:16 +08002538 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002539 /* check ifcommand done with no error*/
2540 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2541 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2542 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2543 " poll command abort successfully \n"
2544 , acb->host->host_no
2545 , pCCB->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002546 , (u32)pCCB->pcmd->device->lun
Nick Chengcdd3cb12010-07-13 20:03:04 +08002547 , pCCB);
2548 pCCB->pcmd->result = DID_ABORT << 16;
2549 arcmsr_ccb_complete(pCCB);
2550 continue;
2551 }
2552 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2553 " command done ccb = '0x%p'"
2554 "ccboutstandingcount = %d \n"
2555 , acb->host->host_no
2556 , pCCB
2557 , atomic_read(&acb->ccboutstandingcount));
2558 continue;
2559 }
2560 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2561 arcmsr_report_ccb_state(acb, pCCB, error);
2562 }
2563 return rtn;
2564}
Nick Chengae52e7f2010-06-18 15:39:12 +08002565static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002566 struct CommandControlBlock *poll_ccb)
2567{
Nick Chengae52e7f2010-06-18 15:39:12 +08002568 int rtn = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002569 switch (acb->adapter_type) {
2570
2571 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002572 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002573 }
2574 break;
2575
2576 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002577 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002578 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002579 break;
2580 case ACB_ADAPTER_TYPE_C: {
2581 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2582 }
Erich Chen1c57e862006-07-12 08:59:32 -07002583 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002584 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07002585}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002586
2587static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002588{
Nick Chengae52e7f2010-06-18 15:39:12 +08002589 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
Dan Carpentere2c70422014-02-11 19:06:33 +03002590
Nick Cheng1a4f5502007-09-13 17:26:40 +08002591 /*
2592 ********************************************************************
2593 ** here we need to tell iop 331 our freeccb.HighPart
2594 ** if freeccb.HighPart is not zero
2595 ********************************************************************
2596 */
Dan Carpentere2c70422014-02-11 19:06:33 +03002597 cdb_phyaddr = lower_32_bits(acb->dma_coherent_handle);
2598 cdb_phyaddr_hi32 = upper_32_bits(acb->dma_coherent_handle);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002599 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002600 /*
2601 ***********************************************************************
2602 ** if adapter type B, set window of "post command Q"
2603 ***********************************************************************
2604 */
2605 switch (acb->adapter_type) {
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002606
Nick Cheng1a4f5502007-09-13 17:26:40 +08002607 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002608 if (cdb_phyaddr_hi32 != 0) {
Al Viro80da1ad2007-10-29 05:08:28 +00002609 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002610 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2611 &reg->message_rwbuffer[0]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002612 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002613 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2614 &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002615 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002616 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2617 part physical address timeout\n",
2618 acb->host->host_no);
2619 return 1;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002620 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002621 }
2622 }
2623 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002624
Nick Cheng1a4f5502007-09-13 17:26:40 +08002625 case ACB_ADAPTER_TYPE_B: {
2626 unsigned long post_queue_phyaddr;
Al Viro80da1ad2007-10-29 05:08:28 +00002627 uint32_t __iomem *rwbuffer;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002628
Al Viro80da1ad2007-10-29 05:08:28 +00002629 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002630 reg->postq_index = 0;
2631 reg->doneq_index = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002632 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002633 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002634 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2635 acb->host->host_no);
2636 return 1;
2637 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002638 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2639 rwbuffer = reg->message_rwbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002640 /* driver "set config" signature */
2641 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2642 /* normal should be zero */
Nick Chengae52e7f2010-06-18 15:39:12 +08002643 writel(cdb_phyaddr_hi32, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002644 /* postQ size (256 + 8)*4 */
2645 writel(post_queue_phyaddr, rwbuffer++);
2646 /* doneQ size (256 + 8)*4 */
2647 writel(post_queue_phyaddr + 1056, rwbuffer++);
2648 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2649 writel(1056, rwbuffer);
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002650
Nick Chengae52e7f2010-06-18 15:39:12 +08002651 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002652 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002653 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2654 timeout \n",acb->host->host_no);
2655 return 1;
2656 }
Ching Huanga5849722014-08-19 15:01:28 +08002657 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
2658 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2659 pr_err("arcmsr%d: can't set driver mode.\n",
2660 acb->host->host_no);
2661 return 1;
2662 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002663 }
2664 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002665 case ACB_ADAPTER_TYPE_C: {
2666 if (cdb_phyaddr_hi32 != 0) {
2667 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2668
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002669 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
2670 acb->adapter_index, cdb_phyaddr_hi32);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002671 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
2672 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
2673 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
2674 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2675 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2676 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2677 timeout \n", acb->host->host_no);
2678 return 1;
2679 }
2680 }
2681 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002682 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002683 return 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002684}
2685
Nick Cheng1a4f5502007-09-13 17:26:40 +08002686static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2687{
2688 uint32_t firmware_state = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002689 switch (acb->adapter_type) {
2690
2691 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002692 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002693 do {
2694 firmware_state = readl(&reg->outbound_msgaddr1);
2695 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2696 }
2697 break;
2698
2699 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002700 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002701 do {
Nick Chengae52e7f2010-06-18 15:39:12 +08002702 firmware_state = readl(reg->iop2drv_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002703 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
Nick Chengae52e7f2010-06-18 15:39:12 +08002704 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002705 }
2706 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002707 case ACB_ADAPTER_TYPE_C: {
2708 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2709 do {
2710 firmware_state = readl(&reg->outbound_msgaddr1);
2711 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2712 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002713 }
2714}
2715
Nick Cheng36b83de2010-05-17 11:22:42 +08002716static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2717{
2718 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002719 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002720 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002721 return;
2722 } else {
2723 acb->fw_flag = FW_NORMAL;
2724 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2725 atomic_set(&acb->rq_map_token, 16);
2726 }
2727 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002728 if (atomic_dec_and_test(&acb->rq_map_token)) {
2729 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002730 return;
NickCheng97b99122011-01-06 17:32:41 +08002731 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002732 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2733 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2734 }
2735 return;
2736}
2737
2738static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2739{
2740 struct MessageUnit_B __iomem *reg = acb->pmuB;
2741 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002742 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002743 return;
2744 } else {
2745 acb->fw_flag = FW_NORMAL;
2746 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
NickCheng97b99122011-01-06 17:32:41 +08002747 atomic_set(&acb->rq_map_token, 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002748 }
2749 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002750 if (atomic_dec_and_test(&acb->rq_map_token)) {
2751 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002752 return;
NickCheng97b99122011-01-06 17:32:41 +08002753 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002754 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2755 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2756 }
2757 return;
2758}
2759
2760static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2761{
2762 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengae52e7f2010-06-18 15:39:12 +08002763 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
NickCheng97b99122011-01-06 17:32:41 +08002764 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002765 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08002766 } else {
Nick Chengae52e7f2010-06-18 15:39:12 +08002767 acb->fw_flag = FW_NORMAL;
2768 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002769 atomic_set(&acb->rq_map_token, 16);
2770 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002771 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002772 if (atomic_dec_and_test(&acb->rq_map_token)) {
2773 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002774 return;
NickCheng97b99122011-01-06 17:32:41 +08002775 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002776 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002777 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2778 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Cheng36b83de2010-05-17 11:22:42 +08002779 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002780 return;
2781}
2782
2783static void arcmsr_request_device_map(unsigned long pacb)
2784{
2785 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
Nick Cheng36b83de2010-05-17 11:22:42 +08002786 switch (acb->adapter_type) {
2787 case ACB_ADAPTER_TYPE_A: {
2788 arcmsr_request_hba_device_map(acb);
2789 }
2790 break;
2791 case ACB_ADAPTER_TYPE_B: {
2792 arcmsr_request_hbb_device_map(acb);
2793 }
2794 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002795 case ACB_ADAPTER_TYPE_C: {
2796 arcmsr_request_hbc_device_map(acb);
2797 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002798 }
2799}
2800
Nick Cheng1a4f5502007-09-13 17:26:40 +08002801static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2802{
Al Viro80da1ad2007-10-29 05:08:28 +00002803 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002804 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2805 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002806 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002807 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2808 rebulid' timeout \n", acb->host->host_no);
2809 }
2810}
2811
2812static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2813{
Al Viro80da1ad2007-10-29 05:08:28 +00002814 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002815 acb->acb_flags |= ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002816 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002817 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002818 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2819 rebulid' timeout \n",acb->host->host_no);
2820 }
2821}
2822
Nick Chengcdd3cb12010-07-13 20:03:04 +08002823static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2824{
2825 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2826 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2827 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2828 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2829 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2830 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2831 rebulid' timeout \n", pACB->host->host_no);
2832 }
2833 return;
2834}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002835static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2836{
2837 switch (acb->adapter_type) {
2838 case ACB_ADAPTER_TYPE_A:
2839 arcmsr_start_hba_bgrb(acb);
2840 break;
2841 case ACB_ADAPTER_TYPE_B:
2842 arcmsr_start_hbb_bgrb(acb);
2843 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002844 case ACB_ADAPTER_TYPE_C:
2845 arcmsr_start_hbc_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002846 }
2847}
2848
2849static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2850{
2851 switch (acb->adapter_type) {
2852 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002853 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002854 uint32_t outbound_doorbell;
2855 /* empty doorbell Qbuffer if door bell ringed */
2856 outbound_doorbell = readl(&reg->outbound_doorbell);
2857 /*clear doorbell interrupt */
2858 writel(outbound_doorbell, &reg->outbound_doorbell);
2859 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2860 }
2861 break;
2862
2863 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002864 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002865 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002866 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2867 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002868 /* let IOP know data has been read */
2869 }
2870 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002871 case ACB_ADAPTER_TYPE_C: {
2872 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2873 uint32_t outbound_doorbell;
2874 /* empty doorbell Qbuffer if door bell ringed */
2875 outbound_doorbell = readl(&reg->outbound_doorbell);
2876 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2877 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2878 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002879 }
2880}
Erich Chen1c57e862006-07-12 08:59:32 -07002881
Nick Cheng76d78302008-02-04 23:53:24 -08002882static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2883{
2884 switch (acb->adapter_type) {
2885 case ACB_ADAPTER_TYPE_A:
2886 return;
2887 case ACB_ADAPTER_TYPE_B:
2888 {
2889 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002890 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002891 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng76d78302008-02-04 23:53:24 -08002892 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2893 return;
2894 }
2895 }
2896 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002897 case ACB_ADAPTER_TYPE_C:
2898 return;
Nick Cheng76d78302008-02-04 23:53:24 -08002899 }
2900 return;
2901}
2902
Nick Cheng36b83de2010-05-17 11:22:42 +08002903static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2904{
2905 uint8_t value[64];
Nick Chengcdd3cb12010-07-13 20:03:04 +08002906 int i, count = 0;
2907 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2908 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
Dan Carpenter6ad819b2012-06-09 12:10:19 +03002909
Nick Cheng36b83de2010-05-17 11:22:42 +08002910 /* backup pci config data */
Nick Chengcdd3cb12010-07-13 20:03:04 +08002911 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
Nick Cheng36b83de2010-05-17 11:22:42 +08002912 for (i = 0; i < 64; i++) {
2913 pci_read_config_byte(acb->pdev, i, &value[i]);
2914 }
2915 /* hardware reset signal */
Nick Chengae52e7f2010-06-18 15:39:12 +08002916 if ((acb->dev_id == 0x1680)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002917 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2918 } else if ((acb->dev_id == 0x1880)) {
2919 do {
2920 count++;
2921 writel(0xF, &pmuC->write_sequence);
2922 writel(0x4, &pmuC->write_sequence);
2923 writel(0xB, &pmuC->write_sequence);
2924 writel(0x2, &pmuC->write_sequence);
2925 writel(0x7, &pmuC->write_sequence);
2926 writel(0xD, &pmuC->write_sequence);
Dan Carpenter6ad819b2012-06-09 12:10:19 +03002927 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002928 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
Nick Chengae52e7f2010-06-18 15:39:12 +08002929 } else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002930 pci_write_config_byte(acb->pdev, 0x84, 0x20);
Nick Chengae52e7f2010-06-18 15:39:12 +08002931 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002932 msleep(2000);
Nick Cheng36b83de2010-05-17 11:22:42 +08002933 /* write back pci config data */
2934 for (i = 0; i < 64; i++) {
2935 pci_write_config_byte(acb->pdev, i, value[i]);
2936 }
2937 msleep(1000);
2938 return;
2939}
Erich Chen1c57e862006-07-12 08:59:32 -07002940static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2941{
Nick Cheng1a4f5502007-09-13 17:26:40 +08002942 uint32_t intmask_org;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002943 /* disable all outbound interrupt */
2944 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002945 arcmsr_wait_firmware_ready(acb);
2946 arcmsr_iop_confirm(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002947 /*start background rebuild*/
2948 arcmsr_start_adapter_bgrb(acb);
2949 /* empty doorbell Qbuffer if door bell ringed */
2950 arcmsr_clear_doorbell_queue_buffer(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002951 arcmsr_enable_eoi_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002952 /* enable outbound Post Queue,outbound doorbell Interrupt */
2953 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07002954 acb->acb_flags |= ACB_F_IOP_INITED;
2955}
2956
Nick Cheng36b83de2010-05-17 11:22:42 +08002957static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002958{
Erich Chen1c57e862006-07-12 08:59:32 -07002959 struct CommandControlBlock *ccb;
2960 uint32_t intmask_org;
Nick Cheng36b83de2010-05-17 11:22:42 +08002961 uint8_t rtnval = 0x00;
Erich Chen1c57e862006-07-12 08:59:32 -07002962 int i = 0;
NickCheng97b99122011-01-06 17:32:41 +08002963 unsigned long flags;
2964
Erich Chen1c57e862006-07-12 08:59:32 -07002965 if (atomic_read(&acb->ccboutstandingcount) != 0) {
Erich Chen1c57e862006-07-12 08:59:32 -07002966 /* disable all outbound interrupt */
2967 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08002968 /* talk to iop 331 outstanding command aborted */
2969 rtnval = arcmsr_abort_allcmd(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002970 /* clear all outbound posted Q */
Nick Cheng1a4f5502007-09-13 17:26:40 +08002971 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002972 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2973 ccb = acb->pccb_pool[i];
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002974 if (ccb->startdone == ARCMSR_CCB_START) {
NickCheng97b99122011-01-06 17:32:41 +08002975 scsi_dma_unmap(ccb->pcmd);
2976 ccb->startdone = ARCMSR_CCB_DONE;
2977 ccb->ccb_flags = 0;
2978 spin_lock_irqsave(&acb->ccblist_lock, flags);
2979 list_add_tail(&ccb->list, &acb->ccb_free_list);
2980 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002981 }
2982 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002983 atomic_set(&acb->ccboutstandingcount, 0);
Erich Chen1c57e862006-07-12 08:59:32 -07002984 /* enable all outbound interrupt */
2985 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Cheng36b83de2010-05-17 11:22:42 +08002986 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002987 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002988 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002989}
2990
2991static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2992{
NickCheng97b99122011-01-06 17:32:41 +08002993 struct AdapterControlBlock *acb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002994 uint32_t intmask_org, outbound_doorbell;
2995 int retry_count = 0;
2996 int rtn = FAILED;
Nick Chengae52e7f2010-06-18 15:39:12 +08002997 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002998 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
Nick Cheng36b83de2010-05-17 11:22:42 +08002999 acb->num_resets++;
Nick Cheng36b83de2010-05-17 11:22:42 +08003000
Nick Chengcdd3cb12010-07-13 20:03:04 +08003001 switch(acb->adapter_type){
3002 case ACB_ADAPTER_TYPE_A:{
3003 if (acb->acb_flags & ACB_F_BUS_RESET){
Nick Chengae52e7f2010-06-18 15:39:12 +08003004 long timeout;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003005 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
3006 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
Nick Chengae52e7f2010-06-18 15:39:12 +08003007 if (timeout) {
3008 return SUCCESS;
3009 }
3010 }
3011 acb->acb_flags |= ACB_F_BUS_RESET;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003012 if (!arcmsr_iop_reset(acb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003013 struct MessageUnit_A __iomem *reg;
3014 reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003015 arcmsr_hardware_reset(acb);
3016 acb->acb_flags &= ~ACB_F_IOP_INITED;
Nick Cheng36b83de2010-05-17 11:22:42 +08003017sleep_again:
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003018 ssleep(ARCMSR_SLEEPTIME);
Nick Chengae52e7f2010-06-18 15:39:12 +08003019 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003020 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3021 if (retry_count > ARCMSR_RETRYCOUNT) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003022 acb->fw_flag = FW_DEADLOCK;
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003023 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08003024 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003025 }
3026 retry_count++;
3027 goto sleep_again;
3028 }
3029 acb->acb_flags |= ACB_F_IOP_INITED;
3030 /* disable all outbound interrupt */
3031 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +08003032 arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003033 arcmsr_start_adapter_bgrb(acb);
3034 /* clear Qbuffer if door bell ringed */
3035 outbound_doorbell = readl(&reg->outbound_doorbell);
3036 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
3037 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
3038 /* enable outbound Post Queue,outbound doorbell Interrupt */
3039 arcmsr_enable_outbound_ints(acb, intmask_org);
3040 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +08003041 atomic_set(&acb->ante_token_value, 16);
3042 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08003043 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08003044 acb->acb_flags &= ~ACB_F_BUS_RESET;
3045 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003046 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
Nick Chengae52e7f2010-06-18 15:39:12 +08003047 } else {
3048 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003049 atomic_set(&acb->rq_map_token, 16);
3050 atomic_set(&acb->ante_token_value, 16);
3051 acb->fw_flag = FW_NORMAL;
3052 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08003053 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003054 }
3055 break;
3056 }
3057 case ACB_ADAPTER_TYPE_B:{
3058 acb->acb_flags |= ACB_F_BUS_RESET;
3059 if (!arcmsr_iop_reset(acb)) {
3060 acb->acb_flags &= ~ACB_F_BUS_RESET;
3061 rtn = FAILED;
3062 } else {
3063 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003064 atomic_set(&acb->rq_map_token, 16);
3065 atomic_set(&acb->ante_token_value, 16);
3066 acb->fw_flag = FW_NORMAL;
3067 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003068 rtn = SUCCESS;
3069 }
3070 break;
3071 }
3072 case ACB_ADAPTER_TYPE_C:{
3073 if (acb->acb_flags & ACB_F_BUS_RESET) {
3074 long timeout;
3075 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
3076 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
3077 if (timeout) {
3078 return SUCCESS;
3079 }
3080 }
3081 acb->acb_flags |= ACB_F_BUS_RESET;
3082 if (!arcmsr_iop_reset(acb)) {
3083 struct MessageUnit_C __iomem *reg;
3084 reg = acb->pmuC;
3085 arcmsr_hardware_reset(acb);
3086 acb->acb_flags &= ~ACB_F_IOP_INITED;
3087sleep:
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003088 ssleep(ARCMSR_SLEEPTIME);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003089 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003090 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3091 if (retry_count > ARCMSR_RETRYCOUNT) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003092 acb->fw_flag = FW_DEADLOCK;
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003093 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003094 return FAILED;
3095 }
3096 retry_count++;
3097 goto sleep;
3098 }
3099 acb->acb_flags |= ACB_F_IOP_INITED;
3100 /* disable all outbound interrupt */
3101 intmask_org = arcmsr_disable_outbound_ints(acb);
3102 arcmsr_get_firmware_spec(acb);
3103 arcmsr_start_adapter_bgrb(acb);
3104 /* clear Qbuffer if door bell ringed */
3105 outbound_doorbell = readl(&reg->outbound_doorbell);
3106 writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
3107 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3108 /* enable outbound Post Queue,outbound doorbell Interrupt */
3109 arcmsr_enable_outbound_ints(acb, intmask_org);
3110 atomic_set(&acb->rq_map_token, 16);
3111 atomic_set(&acb->ante_token_value, 16);
3112 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08003113 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003114 acb->acb_flags &= ~ACB_F_BUS_RESET;
3115 rtn = SUCCESS;
3116 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3117 } else {
3118 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003119 atomic_set(&acb->rq_map_token, 16);
3120 atomic_set(&acb->ante_token_value, 16);
3121 acb->fw_flag = FW_NORMAL;
3122 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003123 rtn = SUCCESS;
3124 }
3125 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08003126 }
3127 }
3128 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003129}
3130
Nick Chengae52e7f2010-06-18 15:39:12 +08003131static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07003132 struct CommandControlBlock *ccb)
3133{
Nick Chengae52e7f2010-06-18 15:39:12 +08003134 int rtn;
Nick Chengae52e7f2010-06-18 15:39:12 +08003135 rtn = arcmsr_polling_ccbdone(acb, ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +08003136 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003137}
3138
3139static int arcmsr_abort(struct scsi_cmnd *cmd)
3140{
3141 struct AdapterControlBlock *acb =
3142 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3143 int i = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08003144 int rtn = FAILED;
Ching Huangcab5aec2014-08-19 14:47:16 +08003145 uint32_t intmask_org;
3146
Erich Chen1c57e862006-07-12 08:59:32 -07003147 printk(KERN_NOTICE
Ching Huangcab5aec2014-08-19 14:47:16 +08003148 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02003149 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
Nick Chengae52e7f2010-06-18 15:39:12 +08003150 acb->acb_flags |= ACB_F_ABORT;
Erich Chen1c57e862006-07-12 08:59:32 -07003151 acb->num_aborts++;
Erich Chen1c57e862006-07-12 08:59:32 -07003152 /*
3153 ************************************************
3154 ** the all interrupt service routine is locked
3155 ** we need to handle it as soon as possible and exit
3156 ************************************************
3157 */
Ching Huangcab5aec2014-08-19 14:47:16 +08003158 if (!atomic_read(&acb->ccboutstandingcount)) {
3159 acb->acb_flags &= ~ACB_F_ABORT;
Nick Chengae52e7f2010-06-18 15:39:12 +08003160 return rtn;
Ching Huangcab5aec2014-08-19 14:47:16 +08003161 }
Erich Chen1c57e862006-07-12 08:59:32 -07003162
Ching Huangcab5aec2014-08-19 14:47:16 +08003163 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07003164 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3165 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3166 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003167 ccb->startdone = ARCMSR_CCB_ABORTED;
3168 rtn = arcmsr_abort_one_cmd(acb, ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003169 break;
3170 }
3171 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003172 acb->acb_flags &= ~ACB_F_ABORT;
Ching Huangcab5aec2014-08-19 14:47:16 +08003173 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Chengae52e7f2010-06-18 15:39:12 +08003174 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003175}
3176
3177static const char *arcmsr_info(struct Scsi_Host *host)
3178{
3179 struct AdapterControlBlock *acb =
3180 (struct AdapterControlBlock *) host->hostdata;
3181 static char buf[256];
3182 char *type;
3183 int raid6 = 1;
Erich Chen1c57e862006-07-12 08:59:32 -07003184 switch (acb->pdev->device) {
3185 case PCI_DEVICE_ID_ARECA_1110:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003186 case PCI_DEVICE_ID_ARECA_1200:
3187 case PCI_DEVICE_ID_ARECA_1202:
Erich Chen1c57e862006-07-12 08:59:32 -07003188 case PCI_DEVICE_ID_ARECA_1210:
3189 raid6 = 0;
3190 /*FALLTHRU*/
3191 case PCI_DEVICE_ID_ARECA_1120:
3192 case PCI_DEVICE_ID_ARECA_1130:
3193 case PCI_DEVICE_ID_ARECA_1160:
3194 case PCI_DEVICE_ID_ARECA_1170:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003195 case PCI_DEVICE_ID_ARECA_1201:
Erich Chen1c57e862006-07-12 08:59:32 -07003196 case PCI_DEVICE_ID_ARECA_1220:
3197 case PCI_DEVICE_ID_ARECA_1230:
3198 case PCI_DEVICE_ID_ARECA_1260:
3199 case PCI_DEVICE_ID_ARECA_1270:
3200 case PCI_DEVICE_ID_ARECA_1280:
3201 type = "SATA";
3202 break;
3203 case PCI_DEVICE_ID_ARECA_1380:
3204 case PCI_DEVICE_ID_ARECA_1381:
3205 case PCI_DEVICE_ID_ARECA_1680:
3206 case PCI_DEVICE_ID_ARECA_1681:
Nick Chengcdd3cb12010-07-13 20:03:04 +08003207 case PCI_DEVICE_ID_ARECA_1880:
Erich Chen1c57e862006-07-12 08:59:32 -07003208 type = "SAS";
3209 break;
3210 default:
3211 type = "X-TYPE";
3212 break;
3213 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003214 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
Erich Chen1c57e862006-07-12 08:59:32 -07003215 type, raid6 ? "( RAID6 capable)" : "",
3216 ARCMSR_DRIVER_VERSION);
3217 return buf;
3218}