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David Howells607ca462012-10-13 10:46:48 +01001/* ------------------------------------------------------------------------- */
2/* */
3/* i2c.h - definitions for the i2c-bus interface */
4/* */
5/* ------------------------------------------------------------------------- */
6/* Copyright (C) 1995-2000 Simon G. Vogl
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 MA 02110-1301 USA. */
22/* ------------------------------------------------------------------------- */
23
24/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
25 Frodo Looijaard <frodol@dds.nl> */
26
27#ifndef _UAPI_LINUX_I2C_H
28#define _UAPI_LINUX_I2C_H
29
30#include <linux/types.h>
31
32/**
33 * struct i2c_msg - an I2C transaction segment beginning with START
34 * @addr: Slave address, either seven or ten bits. When this is a ten
35 * bit address, I2C_M_TEN must be set in @flags and the adapter
36 * must support I2C_FUNC_10BIT_ADDR.
37 * @flags: I2C_M_RD is handled by all adapters. No other flags may be
38 * provided unless the adapter exported the relevant I2C_FUNC_*
39 * flags through i2c_check_functionality().
40 * @len: Number of data bytes in @buf being read from or written to the
41 * I2C slave address. For read transactions where I2C_M_RECV_LEN
42 * is set, the caller guarantees that this buffer can hold up to
43 * 32 bytes in addition to the initial length byte sent by the
44 * slave (plus, if used, the SMBus PEC); and this value will be
45 * incremented by the number of block data bytes received.
46 * @buf: The buffer into which data is read, or from which it's written.
47 *
48 * An i2c_msg is the low level representation of one segment of an I2C
49 * transaction. It is visible to drivers in the @i2c_transfer() procedure,
50 * to userspace from i2c-dev, and to I2C adapter drivers through the
51 * @i2c_adapter.@master_xfer() method.
52 *
53 * Except when I2C "protocol mangling" is used, all I2C adapters implement
54 * the standard rules for I2C transactions. Each transaction begins with a
55 * START. That is followed by the slave address, and a bit encoding read
56 * versus write. Then follow all the data bytes, possibly including a byte
57 * with SMBus PEC. The transfer terminates with a NAK, or when all those
58 * bytes have been transferred and ACKed. If this is the last message in a
59 * group, it is followed by a STOP. Otherwise it is followed by the next
60 * @i2c_msg transaction segment, beginning with a (repeated) START.
61 *
62 * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then
63 * passing certain @flags may have changed those standard protocol behaviors.
64 * Those flags are only for use with broken/nonconforming slaves, and with
65 * adapters which are known to support the specific mangling options they
66 * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).
67 */
68struct i2c_msg {
69 __u16 addr; /* slave address */
70 __u16 flags;
David Howells607ca462012-10-13 10:46:48 +010071#define I2C_M_RD 0x0001 /* read data, from slave to master */
Wolfram Sange28b1242016-04-03 20:44:44 +020072 /* I2C_M_RD is guaranteed to be 0x0001! */
73#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */
David Howells607ca462012-10-13 10:46:48 +010074#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */
Wolfram Sange28b1242016-04-03 20:44:44 +020075#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */
76#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */
77#define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */
78#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_NOSTART */
79#define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */
David Howells607ca462012-10-13 10:46:48 +010080 __u16 len; /* msg length */
81 __u8 *buf; /* pointer to msg data */
82};
83
84/* To determine what functionality is present */
85
86#define I2C_FUNC_I2C 0x00000001
87#define I2C_FUNC_10BIT_ADDR 0x00000002
88#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_IGNORE_NAK etc. */
89#define I2C_FUNC_SMBUS_PEC 0x00000008
90#define I2C_FUNC_NOSTART 0x00000010 /* I2C_M_NOSTART */
Wolfram Sang83caf982015-05-14 14:40:02 +020091#define I2C_FUNC_SLAVE 0x00000020
David Howells607ca462012-10-13 10:46:48 +010092#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
93#define I2C_FUNC_SMBUS_QUICK 0x00010000
94#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
95#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
96#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
97#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
98#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
99#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
100#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
101#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
102#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
103#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
104#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
Benjamin Tissoirese456cd32016-06-09 16:53:48 +0200105#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000
David Howells607ca462012-10-13 10:46:48 +0100106
107#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
108 I2C_FUNC_SMBUS_WRITE_BYTE)
109#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
110 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
111#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
112 I2C_FUNC_SMBUS_WRITE_WORD_DATA)
113#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
114 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
115#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
116 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
117
118#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
119 I2C_FUNC_SMBUS_BYTE | \
120 I2C_FUNC_SMBUS_BYTE_DATA | \
121 I2C_FUNC_SMBUS_WORD_DATA | \
122 I2C_FUNC_SMBUS_PROC_CALL | \
123 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
124 I2C_FUNC_SMBUS_I2C_BLOCK | \
125 I2C_FUNC_SMBUS_PEC)
126
127/*
128 * Data for SMBus Messages
129 */
130#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
131union i2c_smbus_data {
132 __u8 byte;
133 __u16 word;
134 __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
135 /* and one more for user-space compatibility */
136};
137
138/* i2c_smbus_xfer read or write markers */
139#define I2C_SMBUS_READ 1
140#define I2C_SMBUS_WRITE 0
141
142/* SMBus transaction types (size parameter in the above functions)
143 Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
144#define I2C_SMBUS_QUICK 0
145#define I2C_SMBUS_BYTE 1
146#define I2C_SMBUS_BYTE_DATA 2
147#define I2C_SMBUS_WORD_DATA 3
148#define I2C_SMBUS_PROC_CALL 4
149#define I2C_SMBUS_BLOCK_DATA 5
150#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
151#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
152#define I2C_SMBUS_I2C_BLOCK_DATA 8
153
154#endif /* _UAPI_LINUX_I2C_H */