blob: 44e97265cd7dc59dd4658175ec394e9c0d0a2b23 [file] [log] [blame]
Dong Aishengae75ff82012-04-27 20:26:16 +08001/*
2 * Core driver for the imx pin controller
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/pinctrl/machine.h>
22#include <linux/pinctrl/pinconf.h>
23#include <linux/pinctrl/pinctrl.h>
24#include <linux/pinctrl/pinmux.h>
25#include <linux/slab.h>
26
27#include "core.h"
28#include "pinctrl-imx.h"
29
Devendra Naga3a86a5f2012-06-09 00:52:11 +053030#define IMX_PMX_DUMP(info, p, m, c, n) \
31{ \
32 int i, j; \
33 printk(KERN_DEBUG "Format: Pin Mux Config\n"); \
34 for (i = 0; i < n; i++) { \
35 j = p[i]; \
36 printk(KERN_DEBUG "%s %d 0x%lx\n", \
37 info->pins[j].name, \
38 m[i], c[i]); \
39 } \
Dong Aishengae75ff82012-04-27 20:26:16 +080040}
41
42/* The bits in CONFIG cell defined in binding doc*/
43#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
44#define IMX_PAD_SION 0x40000000 /* set SION */
45
46/**
47 * @dev: a pointer back to containing device
48 * @base: the offset to the controller in virtual memory
49 */
50struct imx_pinctrl {
51 struct device *dev;
52 struct pinctrl_dev *pctl;
53 void __iomem *base;
54 const struct imx_pinctrl_soc_info *info;
55};
56
57static const struct imx_pin_reg *imx_find_pin_reg(
58 const struct imx_pinctrl_soc_info *info,
59 unsigned pin, bool is_mux, unsigned mux)
60{
61 const struct imx_pin_reg *pin_reg = NULL;
62 int i;
63
64 for (i = 0; i < info->npin_regs; i++) {
65 pin_reg = &info->pin_regs[i];
66 if (pin_reg->pid != pin)
67 continue;
68 if (!is_mux)
69 break;
70 else if (pin_reg->mux_mode == (mux & IMX_MUX_MASK))
71 break;
72 }
73
74 if (!pin_reg) {
75 dev_err(info->dev, "Pin(%s): unable to find pin reg map\n",
76 info->pins[pin].name);
77 return NULL;
78 }
79
80 return pin_reg;
81}
82
83static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(
84 const struct imx_pinctrl_soc_info *info,
85 const char *name)
86{
87 const struct imx_pin_group *grp = NULL;
88 int i;
89
90 for (i = 0; i < info->ngroups; i++) {
91 if (!strcmp(info->groups[i].name, name)) {
92 grp = &info->groups[i];
93 break;
94 }
95 }
96
97 return grp;
98}
99
100static int imx_get_groups_count(struct pinctrl_dev *pctldev)
101{
102 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
103 const struct imx_pinctrl_soc_info *info = ipctl->info;
104
105 return info->ngroups;
106}
107
108static const char *imx_get_group_name(struct pinctrl_dev *pctldev,
109 unsigned selector)
110{
111 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
112 const struct imx_pinctrl_soc_info *info = ipctl->info;
113
114 return info->groups[selector].name;
115}
116
117static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
118 const unsigned **pins,
119 unsigned *npins)
120{
121 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
122 const struct imx_pinctrl_soc_info *info = ipctl->info;
123
124 if (selector >= info->ngroups)
125 return -EINVAL;
126
127 *pins = info->groups[selector].pins;
128 *npins = info->groups[selector].npins;
129
130 return 0;
131}
132
133static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
134 unsigned offset)
135{
136 seq_printf(s, "%s", dev_name(pctldev->dev));
137}
138
139static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
140 struct device_node *np,
141 struct pinctrl_map **map, unsigned *num_maps)
142{
143 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
144 const struct imx_pinctrl_soc_info *info = ipctl->info;
145 const struct imx_pin_group *grp;
146 struct pinctrl_map *new_map;
147 struct device_node *parent;
148 int map_num = 1;
Hui Wang18071612012-06-20 18:13:47 +0800149 int i, j;
Dong Aishengae75ff82012-04-27 20:26:16 +0800150
151 /*
152 * first find the group of this node and check if we need create
153 * config maps for pins
154 */
155 grp = imx_pinctrl_find_group_by_name(info, np->name);
156 if (!grp) {
157 dev_err(info->dev, "unable to find group for node %s\n",
158 np->name);
159 return -EINVAL;
160 }
161
162 for (i = 0; i < grp->npins; i++) {
163 if (!(grp->configs[i] & IMX_NO_PAD_CTL))
164 map_num++;
165 }
166
167 new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
168 if (!new_map)
169 return -ENOMEM;
170
171 *map = new_map;
172 *num_maps = map_num;
173
174 /* create mux map */
175 parent = of_get_parent(np);
Devendra Nagac71157c2012-06-07 22:19:26 +0530176 if (!parent) {
177 kfree(new_map);
Dong Aishengae75ff82012-04-27 20:26:16 +0800178 return -EINVAL;
Devendra Nagac71157c2012-06-07 22:19:26 +0530179 }
Dong Aishengae75ff82012-04-27 20:26:16 +0800180 new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
181 new_map[0].data.mux.function = parent->name;
182 new_map[0].data.mux.group = np->name;
183 of_node_put(parent);
184
185 /* create config map */
186 new_map++;
Hui Wang18071612012-06-20 18:13:47 +0800187 for (i = j = 0; i < grp->npins; i++) {
Dong Aishengae75ff82012-04-27 20:26:16 +0800188 if (!(grp->configs[i] & IMX_NO_PAD_CTL)) {
Hui Wang18071612012-06-20 18:13:47 +0800189 new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
190 new_map[j].data.configs.group_or_pin =
Dong Aishengae75ff82012-04-27 20:26:16 +0800191 pin_get_name(pctldev, grp->pins[i]);
Hui Wang18071612012-06-20 18:13:47 +0800192 new_map[j].data.configs.configs = &grp->configs[i];
193 new_map[j].data.configs.num_configs = 1;
194 j++;
Dong Aishengae75ff82012-04-27 20:26:16 +0800195 }
196 }
197
198 dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
Dong Aisheng67695f22012-06-08 21:33:12 +0800199 (*map)->data.mux.function, (*map)->data.mux.group, map_num);
Dong Aishengae75ff82012-04-27 20:26:16 +0800200
201 return 0;
202}
203
204static void imx_dt_free_map(struct pinctrl_dev *pctldev,
205 struct pinctrl_map *map, unsigned num_maps)
206{
Devendra Naga3a86a5f2012-06-09 00:52:11 +0530207 kfree(map);
Dong Aishengae75ff82012-04-27 20:26:16 +0800208}
209
210static struct pinctrl_ops imx_pctrl_ops = {
211 .get_groups_count = imx_get_groups_count,
212 .get_group_name = imx_get_group_name,
213 .get_group_pins = imx_get_group_pins,
214 .pin_dbg_show = imx_pin_dbg_show,
215 .dt_node_to_map = imx_dt_node_to_map,
216 .dt_free_map = imx_dt_free_map,
217
218};
219
220static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
221 unsigned group)
222{
223 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
224 const struct imx_pinctrl_soc_info *info = ipctl->info;
225 const struct imx_pin_reg *pin_reg;
226 const unsigned *pins, *mux;
227 unsigned int npins, pin_id;
228 int i;
229
230 /*
231 * Configure the mux mode for each pin in the group for a specific
232 * function.
233 */
234 pins = info->groups[group].pins;
235 npins = info->groups[group].npins;
236 mux = info->groups[group].mux_mode;
237
238 WARN_ON(!pins || !npins || !mux);
239
240 dev_dbg(ipctl->dev, "enable function %s group %s\n",
241 info->functions[selector].name, info->groups[group].name);
242
243 for (i = 0; i < npins; i++) {
244 pin_id = pins[i];
245
246 pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]);
247 if (!pin_reg)
248 return -EINVAL;
249
250 if (!pin_reg->mux_reg) {
251 dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
252 info->pins[pin_id].name);
253 return -EINVAL;
254 }
255
256 writel(mux[i], ipctl->base + pin_reg->mux_reg);
257 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
258 pin_reg->mux_reg, mux[i]);
259
260 /* some pins also need select input setting, set it if found */
261 if (pin_reg->input_reg) {
262 writel(pin_reg->input_val, ipctl->base + pin_reg->input_reg);
263 dev_dbg(ipctl->dev,
264 "==>select_input: offset 0x%x val 0x%x\n",
265 pin_reg->input_reg, pin_reg->input_val);
266 }
267 }
268
269 return 0;
270}
271
Dong Aishengae75ff82012-04-27 20:26:16 +0800272static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
273{
274 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
275 const struct imx_pinctrl_soc_info *info = ipctl->info;
276
277 return info->nfunctions;
278}
279
280static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev,
281 unsigned selector)
282{
283 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
284 const struct imx_pinctrl_soc_info *info = ipctl->info;
285
286 return info->functions[selector].name;
287}
288
289static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
290 const char * const **groups,
291 unsigned * const num_groups)
292{
293 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
294 const struct imx_pinctrl_soc_info *info = ipctl->info;
295
296 *groups = info->functions[selector].groups;
297 *num_groups = info->functions[selector].num_groups;
298
299 return 0;
300}
301
302static struct pinmux_ops imx_pmx_ops = {
303 .get_functions_count = imx_pmx_get_funcs_count,
304 .get_function_name = imx_pmx_get_func_name,
305 .get_function_groups = imx_pmx_get_groups,
306 .enable = imx_pmx_enable,
Dong Aishengae75ff82012-04-27 20:26:16 +0800307};
308
309static int imx_pinconf_get(struct pinctrl_dev *pctldev,
310 unsigned pin_id, unsigned long *config)
311{
312 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
313 const struct imx_pinctrl_soc_info *info = ipctl->info;
314 const struct imx_pin_reg *pin_reg;
315
316 pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
317 if (!pin_reg)
318 return -EINVAL;
319
320 if (!pin_reg->conf_reg) {
321 dev_err(info->dev, "Pin(%s) does not support config function\n",
322 info->pins[pin_id].name);
323 return -EINVAL;
324 }
325
326 *config = readl(ipctl->base + pin_reg->conf_reg);
327
328 return 0;
329}
330
331static int imx_pinconf_set(struct pinctrl_dev *pctldev,
332 unsigned pin_id, unsigned long config)
333{
334 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
335 const struct imx_pinctrl_soc_info *info = ipctl->info;
336 const struct imx_pin_reg *pin_reg;
337
338 pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
339 if (!pin_reg)
340 return -EINVAL;
341
342 if (!pin_reg->conf_reg) {
343 dev_err(info->dev, "Pin(%s) does not support config function\n",
344 info->pins[pin_id].name);
345 return -EINVAL;
346 }
347
348 dev_dbg(ipctl->dev, "pinconf set pin %s\n",
349 info->pins[pin_id].name);
350
351 writel(config, ipctl->base + pin_reg->conf_reg);
352 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
353 pin_reg->conf_reg, config);
354
355 return 0;
356}
357
358static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
359 struct seq_file *s, unsigned pin_id)
360{
361 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
362 const struct imx_pinctrl_soc_info *info = ipctl->info;
363 const struct imx_pin_reg *pin_reg;
364 unsigned long config;
365
366 pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
367 if (!pin_reg || !pin_reg->conf_reg) {
368 seq_printf(s, "N/A");
369 return;
370 }
371
372 config = readl(ipctl->base + pin_reg->conf_reg);
373 seq_printf(s, "0x%lx", config);
374}
375
376static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
377 struct seq_file *s, unsigned group)
378{
379 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
380 const struct imx_pinctrl_soc_info *info = ipctl->info;
381 struct imx_pin_group *grp;
382 unsigned long config;
383 const char *name;
384 int i, ret;
385
386 if (group > info->ngroups)
387 return;
388
389 seq_printf(s, "\n");
390 grp = &info->groups[group];
391 for (i = 0; i < grp->npins; i++) {
392 name = pin_get_name(pctldev, grp->pins[i]);
393 ret = imx_pinconf_get(pctldev, grp->pins[i], &config);
394 if (ret)
395 return;
396 seq_printf(s, "%s: 0x%lx", name, config);
397 }
398}
399
400struct pinconf_ops imx_pinconf_ops = {
401 .pin_config_get = imx_pinconf_get,
402 .pin_config_set = imx_pinconf_set,
403 .pin_config_dbg_show = imx_pinconf_dbg_show,
404 .pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
405};
406
407static struct pinctrl_desc imx_pinctrl_desc = {
408 .pctlops = &imx_pctrl_ops,
409 .pmxops = &imx_pmx_ops,
410 .confops = &imx_pinconf_ops,
411 .owner = THIS_MODULE,
412};
413
414/* decode pin id and mux from pin function id got from device tree*/
415static int imx_pinctrl_get_pin_id_and_mux(const struct imx_pinctrl_soc_info *info,
416 unsigned int pin_func_id, unsigned int *pin_id,
417 unsigned int *mux)
418{
419 if (pin_func_id > info->npin_regs)
420 return -EINVAL;
421
422 *pin_id = info->pin_regs[pin_func_id].pid;
423 *mux = info->pin_regs[pin_func_id].mux_mode;
424
425 return 0;
426}
427
428static int __devinit imx_pinctrl_parse_groups(struct device_node *np,
429 struct imx_pin_group *grp,
430 struct imx_pinctrl_soc_info *info,
431 u32 index)
432{
433 unsigned int pin_func_id;
434 int ret, size;
435 const const __be32 *list;
436 int i, j;
437 u32 config;
438
439 dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
440
441 /* Initialise group */
442 grp->name = np->name;
443
444 /*
445 * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
446 * do sanity check and calculate pins number
447 */
448 list = of_get_property(np, "fsl,pins", &size);
449 /* we do not check return since it's safe node passed down */
450 size /= sizeof(*list);
451 if (!size || size % 2) {
452 dev_err(info->dev, "wrong pins number or pins and configs should be pairs\n");
453 return -EINVAL;
454 }
455
456 grp->npins = size / 2;
457 grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
458 GFP_KERNEL);
459 grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
460 GFP_KERNEL);
461 grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
462 GFP_KERNEL);
463 for (i = 0, j = 0; i < size; i += 2, j++) {
464 pin_func_id = be32_to_cpu(*list++);
465 ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id,
466 &grp->pins[j], &grp->mux_mode[j]);
467 if (ret) {
468 dev_err(info->dev, "get invalid pin function id\n");
469 return -EINVAL;
470 }
471 /* SION bit is in mux register */
472 config = be32_to_cpu(*list++);
473 if (config & IMX_PAD_SION)
474 grp->mux_mode[j] |= IOMUXC_CONFIG_SION;
475 grp->configs[j] = config & ~IMX_PAD_SION;
476 }
477
Dong Aishenga6e73602012-06-21 18:10:35 +0800478#ifdef DEBUG
Dong Aishengae75ff82012-04-27 20:26:16 +0800479 IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins);
Dong Aishenga6e73602012-06-21 18:10:35 +0800480#endif
Devendra Naga3a86a5f2012-06-09 00:52:11 +0530481
Dong Aishengae75ff82012-04-27 20:26:16 +0800482 return 0;
483}
484
485static int __devinit imx_pinctrl_parse_functions(struct device_node *np,
486 struct imx_pinctrl_soc_info *info, u32 index)
487{
488 struct device_node *child;
489 struct imx_pmx_func *func;
490 struct imx_pin_group *grp;
491 int ret;
492 static u32 grp_index;
493 u32 i = 0;
494
495 dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
496
497 func = &info->functions[index];
498
499 /* Initialise function */
500 func->name = np->name;
501 func->num_groups = of_get_child_count(np);
502 if (func->num_groups <= 0) {
503 dev_err(info->dev, "no groups defined\n");
504 return -EINVAL;
505 }
506 func->groups = devm_kzalloc(info->dev,
507 func->num_groups * sizeof(char *), GFP_KERNEL);
508
509 for_each_child_of_node(np, child) {
510 func->groups[i] = child->name;
511 grp = &info->groups[grp_index++];
512 ret = imx_pinctrl_parse_groups(child, grp, info, i++);
513 if (ret)
514 return ret;
515 }
516
517 return 0;
518}
519
520static int __devinit imx_pinctrl_probe_dt(struct platform_device *pdev,
521 struct imx_pinctrl_soc_info *info)
522{
523 struct device_node *np = pdev->dev.of_node;
524 struct device_node *child;
525 int ret;
526 u32 nfuncs = 0;
527 u32 i = 0;
528
529 if (!np)
530 return -ENODEV;
531
532 nfuncs = of_get_child_count(np);
533 if (nfuncs <= 0) {
534 dev_err(&pdev->dev, "no functions defined\n");
535 return -EINVAL;
536 }
537
538 info->nfunctions = nfuncs;
539 info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func),
540 GFP_KERNEL);
541 if (!info->functions)
542 return -ENOMEM;
543
544 info->ngroups = 0;
545 for_each_child_of_node(np, child)
546 info->ngroups += of_get_child_count(child);
547 info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group),
548 GFP_KERNEL);
549 if (!info->groups)
550 return -ENOMEM;
551
552 for_each_child_of_node(np, child) {
553 ret = imx_pinctrl_parse_functions(child, info, i++);
554 if (ret) {
555 dev_err(&pdev->dev, "failed to parse function\n");
556 return ret;
557 }
558 }
559
560 return 0;
561}
562
563int __devinit imx_pinctrl_probe(struct platform_device *pdev,
564 struct imx_pinctrl_soc_info *info)
565{
566 struct imx_pinctrl *ipctl;
567 struct resource *res;
568 int ret;
569
570 if (!info || !info->pins || !info->npins
571 || !info->pin_regs || !info->npin_regs) {
572 dev_err(&pdev->dev, "wrong pinctrl info\n");
573 return -EINVAL;
574 }
575 info->dev = &pdev->dev;
576
577 /* Create state holders etc for this driver */
578 ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
579 if (!ipctl)
580 return -ENOMEM;
581
582 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
583 if (!res)
584 return -ENOENT;
585
586 ipctl->base = devm_request_and_ioremap(&pdev->dev, res);
587 if (!ipctl->base)
588 return -EBUSY;
589
590 imx_pinctrl_desc.name = dev_name(&pdev->dev);
591 imx_pinctrl_desc.pins = info->pins;
592 imx_pinctrl_desc.npins = info->npins;
593
594 ret = imx_pinctrl_probe_dt(pdev, info);
595 if (ret) {
596 dev_err(&pdev->dev, "fail to probe dt properties\n");
597 return ret;
598 }
599
600 ipctl->info = info;
601 ipctl->dev = info->dev;
602 platform_set_drvdata(pdev, ipctl);
603 ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl);
604 if (!ipctl->pctl) {
605 dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
606 return -EINVAL;
607 }
608
609 dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
610
611 return 0;
612}
613
614int __devexit imx_pinctrl_remove(struct platform_device *pdev)
615{
616 struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);
617
618 pinctrl_unregister(ipctl->pctl);
619
620 return 0;
621}