Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Core driver for the imx pin controller |
| 3 | * |
| 4 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 5 | * Copyright (C) 2012 Linaro Ltd. |
| 6 | * |
| 7 | * Author: Dong Aisheng <dong.aisheng@linaro.org> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/err.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/of_device.h> |
| 21 | #include <linux/pinctrl/machine.h> |
| 22 | #include <linux/pinctrl/pinconf.h> |
| 23 | #include <linux/pinctrl/pinctrl.h> |
| 24 | #include <linux/pinctrl/pinmux.h> |
| 25 | #include <linux/slab.h> |
| 26 | |
| 27 | #include "core.h" |
| 28 | #include "pinctrl-imx.h" |
| 29 | |
Devendra Naga | 3a86a5f | 2012-06-09 00:52:11 +0530 | [diff] [blame] | 30 | #define IMX_PMX_DUMP(info, p, m, c, n) \ |
| 31 | { \ |
| 32 | int i, j; \ |
| 33 | printk(KERN_DEBUG "Format: Pin Mux Config\n"); \ |
| 34 | for (i = 0; i < n; i++) { \ |
| 35 | j = p[i]; \ |
| 36 | printk(KERN_DEBUG "%s %d 0x%lx\n", \ |
| 37 | info->pins[j].name, \ |
| 38 | m[i], c[i]); \ |
| 39 | } \ |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 40 | } |
| 41 | |
| 42 | /* The bits in CONFIG cell defined in binding doc*/ |
| 43 | #define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */ |
| 44 | #define IMX_PAD_SION 0x40000000 /* set SION */ |
| 45 | |
| 46 | /** |
| 47 | * @dev: a pointer back to containing device |
| 48 | * @base: the offset to the controller in virtual memory |
| 49 | */ |
| 50 | struct imx_pinctrl { |
| 51 | struct device *dev; |
| 52 | struct pinctrl_dev *pctl; |
| 53 | void __iomem *base; |
| 54 | const struct imx_pinctrl_soc_info *info; |
| 55 | }; |
| 56 | |
| 57 | static const struct imx_pin_reg *imx_find_pin_reg( |
| 58 | const struct imx_pinctrl_soc_info *info, |
| 59 | unsigned pin, bool is_mux, unsigned mux) |
| 60 | { |
| 61 | const struct imx_pin_reg *pin_reg = NULL; |
| 62 | int i; |
| 63 | |
| 64 | for (i = 0; i < info->npin_regs; i++) { |
| 65 | pin_reg = &info->pin_regs[i]; |
| 66 | if (pin_reg->pid != pin) |
| 67 | continue; |
| 68 | if (!is_mux) |
| 69 | break; |
| 70 | else if (pin_reg->mux_mode == (mux & IMX_MUX_MASK)) |
| 71 | break; |
| 72 | } |
| 73 | |
| 74 | if (!pin_reg) { |
| 75 | dev_err(info->dev, "Pin(%s): unable to find pin reg map\n", |
| 76 | info->pins[pin].name); |
| 77 | return NULL; |
| 78 | } |
| 79 | |
| 80 | return pin_reg; |
| 81 | } |
| 82 | |
| 83 | static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name( |
| 84 | const struct imx_pinctrl_soc_info *info, |
| 85 | const char *name) |
| 86 | { |
| 87 | const struct imx_pin_group *grp = NULL; |
| 88 | int i; |
| 89 | |
| 90 | for (i = 0; i < info->ngroups; i++) { |
| 91 | if (!strcmp(info->groups[i].name, name)) { |
| 92 | grp = &info->groups[i]; |
| 93 | break; |
| 94 | } |
| 95 | } |
| 96 | |
| 97 | return grp; |
| 98 | } |
| 99 | |
| 100 | static int imx_get_groups_count(struct pinctrl_dev *pctldev) |
| 101 | { |
| 102 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 103 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 104 | |
| 105 | return info->ngroups; |
| 106 | } |
| 107 | |
| 108 | static const char *imx_get_group_name(struct pinctrl_dev *pctldev, |
| 109 | unsigned selector) |
| 110 | { |
| 111 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 112 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 113 | |
| 114 | return info->groups[selector].name; |
| 115 | } |
| 116 | |
| 117 | static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, |
| 118 | const unsigned **pins, |
| 119 | unsigned *npins) |
| 120 | { |
| 121 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 122 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 123 | |
| 124 | if (selector >= info->ngroups) |
| 125 | return -EINVAL; |
| 126 | |
| 127 | *pins = info->groups[selector].pins; |
| 128 | *npins = info->groups[selector].npins; |
| 129 | |
| 130 | return 0; |
| 131 | } |
| 132 | |
| 133 | static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, |
| 134 | unsigned offset) |
| 135 | { |
| 136 | seq_printf(s, "%s", dev_name(pctldev->dev)); |
| 137 | } |
| 138 | |
| 139 | static int imx_dt_node_to_map(struct pinctrl_dev *pctldev, |
| 140 | struct device_node *np, |
| 141 | struct pinctrl_map **map, unsigned *num_maps) |
| 142 | { |
| 143 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 144 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 145 | const struct imx_pin_group *grp; |
| 146 | struct pinctrl_map *new_map; |
| 147 | struct device_node *parent; |
| 148 | int map_num = 1; |
| 149 | int i; |
| 150 | |
| 151 | /* |
| 152 | * first find the group of this node and check if we need create |
| 153 | * config maps for pins |
| 154 | */ |
| 155 | grp = imx_pinctrl_find_group_by_name(info, np->name); |
| 156 | if (!grp) { |
| 157 | dev_err(info->dev, "unable to find group for node %s\n", |
| 158 | np->name); |
| 159 | return -EINVAL; |
| 160 | } |
| 161 | |
| 162 | for (i = 0; i < grp->npins; i++) { |
| 163 | if (!(grp->configs[i] & IMX_NO_PAD_CTL)) |
| 164 | map_num++; |
| 165 | } |
| 166 | |
| 167 | new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL); |
| 168 | if (!new_map) |
| 169 | return -ENOMEM; |
| 170 | |
| 171 | *map = new_map; |
| 172 | *num_maps = map_num; |
| 173 | |
| 174 | /* create mux map */ |
| 175 | parent = of_get_parent(np); |
Devendra Naga | c71157c | 2012-06-07 22:19:26 +0530 | [diff] [blame^] | 176 | if (!parent) { |
| 177 | kfree(new_map); |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 178 | return -EINVAL; |
Devendra Naga | c71157c | 2012-06-07 22:19:26 +0530 | [diff] [blame^] | 179 | } |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 180 | new_map[0].type = PIN_MAP_TYPE_MUX_GROUP; |
| 181 | new_map[0].data.mux.function = parent->name; |
| 182 | new_map[0].data.mux.group = np->name; |
| 183 | of_node_put(parent); |
| 184 | |
| 185 | /* create config map */ |
| 186 | new_map++; |
| 187 | for (i = 0; i < grp->npins; i++) { |
| 188 | if (!(grp->configs[i] & IMX_NO_PAD_CTL)) { |
| 189 | new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN; |
| 190 | new_map[i].data.configs.group_or_pin = |
| 191 | pin_get_name(pctldev, grp->pins[i]); |
| 192 | new_map[i].data.configs.configs = &grp->configs[i]; |
| 193 | new_map[i].data.configs.num_configs = 1; |
| 194 | } |
| 195 | } |
| 196 | |
| 197 | dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n", |
| 198 | new_map->data.mux.function, new_map->data.mux.group, map_num); |
| 199 | |
| 200 | return 0; |
| 201 | } |
| 202 | |
| 203 | static void imx_dt_free_map(struct pinctrl_dev *pctldev, |
| 204 | struct pinctrl_map *map, unsigned num_maps) |
| 205 | { |
Devendra Naga | 3a86a5f | 2012-06-09 00:52:11 +0530 | [diff] [blame] | 206 | kfree(map); |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 207 | } |
| 208 | |
| 209 | static struct pinctrl_ops imx_pctrl_ops = { |
| 210 | .get_groups_count = imx_get_groups_count, |
| 211 | .get_group_name = imx_get_group_name, |
| 212 | .get_group_pins = imx_get_group_pins, |
| 213 | .pin_dbg_show = imx_pin_dbg_show, |
| 214 | .dt_node_to_map = imx_dt_node_to_map, |
| 215 | .dt_free_map = imx_dt_free_map, |
| 216 | |
| 217 | }; |
| 218 | |
| 219 | static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, |
| 220 | unsigned group) |
| 221 | { |
| 222 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 223 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 224 | const struct imx_pin_reg *pin_reg; |
| 225 | const unsigned *pins, *mux; |
| 226 | unsigned int npins, pin_id; |
| 227 | int i; |
| 228 | |
| 229 | /* |
| 230 | * Configure the mux mode for each pin in the group for a specific |
| 231 | * function. |
| 232 | */ |
| 233 | pins = info->groups[group].pins; |
| 234 | npins = info->groups[group].npins; |
| 235 | mux = info->groups[group].mux_mode; |
| 236 | |
| 237 | WARN_ON(!pins || !npins || !mux); |
| 238 | |
| 239 | dev_dbg(ipctl->dev, "enable function %s group %s\n", |
| 240 | info->functions[selector].name, info->groups[group].name); |
| 241 | |
| 242 | for (i = 0; i < npins; i++) { |
| 243 | pin_id = pins[i]; |
| 244 | |
| 245 | pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]); |
| 246 | if (!pin_reg) |
| 247 | return -EINVAL; |
| 248 | |
| 249 | if (!pin_reg->mux_reg) { |
| 250 | dev_err(ipctl->dev, "Pin(%s) does not support mux function\n", |
| 251 | info->pins[pin_id].name); |
| 252 | return -EINVAL; |
| 253 | } |
| 254 | |
| 255 | writel(mux[i], ipctl->base + pin_reg->mux_reg); |
| 256 | dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n", |
| 257 | pin_reg->mux_reg, mux[i]); |
| 258 | |
| 259 | /* some pins also need select input setting, set it if found */ |
| 260 | if (pin_reg->input_reg) { |
| 261 | writel(pin_reg->input_val, ipctl->base + pin_reg->input_reg); |
| 262 | dev_dbg(ipctl->dev, |
| 263 | "==>select_input: offset 0x%x val 0x%x\n", |
| 264 | pin_reg->input_reg, pin_reg->input_val); |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | return 0; |
| 269 | } |
| 270 | |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 271 | static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev) |
| 272 | { |
| 273 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 274 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 275 | |
| 276 | return info->nfunctions; |
| 277 | } |
| 278 | |
| 279 | static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev, |
| 280 | unsigned selector) |
| 281 | { |
| 282 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 283 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 284 | |
| 285 | return info->functions[selector].name; |
| 286 | } |
| 287 | |
| 288 | static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector, |
| 289 | const char * const **groups, |
| 290 | unsigned * const num_groups) |
| 291 | { |
| 292 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 293 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 294 | |
| 295 | *groups = info->functions[selector].groups; |
| 296 | *num_groups = info->functions[selector].num_groups; |
| 297 | |
| 298 | return 0; |
| 299 | } |
| 300 | |
| 301 | static struct pinmux_ops imx_pmx_ops = { |
| 302 | .get_functions_count = imx_pmx_get_funcs_count, |
| 303 | .get_function_name = imx_pmx_get_func_name, |
| 304 | .get_function_groups = imx_pmx_get_groups, |
| 305 | .enable = imx_pmx_enable, |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 306 | }; |
| 307 | |
| 308 | static int imx_pinconf_get(struct pinctrl_dev *pctldev, |
| 309 | unsigned pin_id, unsigned long *config) |
| 310 | { |
| 311 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 312 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 313 | const struct imx_pin_reg *pin_reg; |
| 314 | |
| 315 | pin_reg = imx_find_pin_reg(info, pin_id, 0, 0); |
| 316 | if (!pin_reg) |
| 317 | return -EINVAL; |
| 318 | |
| 319 | if (!pin_reg->conf_reg) { |
| 320 | dev_err(info->dev, "Pin(%s) does not support config function\n", |
| 321 | info->pins[pin_id].name); |
| 322 | return -EINVAL; |
| 323 | } |
| 324 | |
| 325 | *config = readl(ipctl->base + pin_reg->conf_reg); |
| 326 | |
| 327 | return 0; |
| 328 | } |
| 329 | |
| 330 | static int imx_pinconf_set(struct pinctrl_dev *pctldev, |
| 331 | unsigned pin_id, unsigned long config) |
| 332 | { |
| 333 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 334 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 335 | const struct imx_pin_reg *pin_reg; |
| 336 | |
| 337 | pin_reg = imx_find_pin_reg(info, pin_id, 0, 0); |
| 338 | if (!pin_reg) |
| 339 | return -EINVAL; |
| 340 | |
| 341 | if (!pin_reg->conf_reg) { |
| 342 | dev_err(info->dev, "Pin(%s) does not support config function\n", |
| 343 | info->pins[pin_id].name); |
| 344 | return -EINVAL; |
| 345 | } |
| 346 | |
| 347 | dev_dbg(ipctl->dev, "pinconf set pin %s\n", |
| 348 | info->pins[pin_id].name); |
| 349 | |
| 350 | writel(config, ipctl->base + pin_reg->conf_reg); |
| 351 | dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n", |
| 352 | pin_reg->conf_reg, config); |
| 353 | |
| 354 | return 0; |
| 355 | } |
| 356 | |
| 357 | static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev, |
| 358 | struct seq_file *s, unsigned pin_id) |
| 359 | { |
| 360 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 361 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 362 | const struct imx_pin_reg *pin_reg; |
| 363 | unsigned long config; |
| 364 | |
| 365 | pin_reg = imx_find_pin_reg(info, pin_id, 0, 0); |
| 366 | if (!pin_reg || !pin_reg->conf_reg) { |
| 367 | seq_printf(s, "N/A"); |
| 368 | return; |
| 369 | } |
| 370 | |
| 371 | config = readl(ipctl->base + pin_reg->conf_reg); |
| 372 | seq_printf(s, "0x%lx", config); |
| 373 | } |
| 374 | |
| 375 | static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, |
| 376 | struct seq_file *s, unsigned group) |
| 377 | { |
| 378 | struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 379 | const struct imx_pinctrl_soc_info *info = ipctl->info; |
| 380 | struct imx_pin_group *grp; |
| 381 | unsigned long config; |
| 382 | const char *name; |
| 383 | int i, ret; |
| 384 | |
| 385 | if (group > info->ngroups) |
| 386 | return; |
| 387 | |
| 388 | seq_printf(s, "\n"); |
| 389 | grp = &info->groups[group]; |
| 390 | for (i = 0; i < grp->npins; i++) { |
| 391 | name = pin_get_name(pctldev, grp->pins[i]); |
| 392 | ret = imx_pinconf_get(pctldev, grp->pins[i], &config); |
| 393 | if (ret) |
| 394 | return; |
| 395 | seq_printf(s, "%s: 0x%lx", name, config); |
| 396 | } |
| 397 | } |
| 398 | |
| 399 | struct pinconf_ops imx_pinconf_ops = { |
| 400 | .pin_config_get = imx_pinconf_get, |
| 401 | .pin_config_set = imx_pinconf_set, |
| 402 | .pin_config_dbg_show = imx_pinconf_dbg_show, |
| 403 | .pin_config_group_dbg_show = imx_pinconf_group_dbg_show, |
| 404 | }; |
| 405 | |
| 406 | static struct pinctrl_desc imx_pinctrl_desc = { |
| 407 | .pctlops = &imx_pctrl_ops, |
| 408 | .pmxops = &imx_pmx_ops, |
| 409 | .confops = &imx_pinconf_ops, |
| 410 | .owner = THIS_MODULE, |
| 411 | }; |
| 412 | |
| 413 | /* decode pin id and mux from pin function id got from device tree*/ |
| 414 | static int imx_pinctrl_get_pin_id_and_mux(const struct imx_pinctrl_soc_info *info, |
| 415 | unsigned int pin_func_id, unsigned int *pin_id, |
| 416 | unsigned int *mux) |
| 417 | { |
| 418 | if (pin_func_id > info->npin_regs) |
| 419 | return -EINVAL; |
| 420 | |
| 421 | *pin_id = info->pin_regs[pin_func_id].pid; |
| 422 | *mux = info->pin_regs[pin_func_id].mux_mode; |
| 423 | |
| 424 | return 0; |
| 425 | } |
| 426 | |
| 427 | static int __devinit imx_pinctrl_parse_groups(struct device_node *np, |
| 428 | struct imx_pin_group *grp, |
| 429 | struct imx_pinctrl_soc_info *info, |
| 430 | u32 index) |
| 431 | { |
| 432 | unsigned int pin_func_id; |
| 433 | int ret, size; |
| 434 | const const __be32 *list; |
| 435 | int i, j; |
| 436 | u32 config; |
| 437 | |
| 438 | dev_dbg(info->dev, "group(%d): %s\n", index, np->name); |
| 439 | |
| 440 | /* Initialise group */ |
| 441 | grp->name = np->name; |
| 442 | |
| 443 | /* |
| 444 | * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>, |
| 445 | * do sanity check and calculate pins number |
| 446 | */ |
| 447 | list = of_get_property(np, "fsl,pins", &size); |
| 448 | /* we do not check return since it's safe node passed down */ |
| 449 | size /= sizeof(*list); |
| 450 | if (!size || size % 2) { |
| 451 | dev_err(info->dev, "wrong pins number or pins and configs should be pairs\n"); |
| 452 | return -EINVAL; |
| 453 | } |
| 454 | |
| 455 | grp->npins = size / 2; |
| 456 | grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), |
| 457 | GFP_KERNEL); |
| 458 | grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), |
| 459 | GFP_KERNEL); |
| 460 | grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long), |
| 461 | GFP_KERNEL); |
| 462 | for (i = 0, j = 0; i < size; i += 2, j++) { |
| 463 | pin_func_id = be32_to_cpu(*list++); |
| 464 | ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id, |
| 465 | &grp->pins[j], &grp->mux_mode[j]); |
| 466 | if (ret) { |
| 467 | dev_err(info->dev, "get invalid pin function id\n"); |
| 468 | return -EINVAL; |
| 469 | } |
| 470 | /* SION bit is in mux register */ |
| 471 | config = be32_to_cpu(*list++); |
| 472 | if (config & IMX_PAD_SION) |
| 473 | grp->mux_mode[j] |= IOMUXC_CONFIG_SION; |
| 474 | grp->configs[j] = config & ~IMX_PAD_SION; |
| 475 | } |
| 476 | |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 477 | IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins); |
Devendra Naga | 3a86a5f | 2012-06-09 00:52:11 +0530 | [diff] [blame] | 478 | |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 479 | return 0; |
| 480 | } |
| 481 | |
| 482 | static int __devinit imx_pinctrl_parse_functions(struct device_node *np, |
| 483 | struct imx_pinctrl_soc_info *info, u32 index) |
| 484 | { |
| 485 | struct device_node *child; |
| 486 | struct imx_pmx_func *func; |
| 487 | struct imx_pin_group *grp; |
| 488 | int ret; |
| 489 | static u32 grp_index; |
| 490 | u32 i = 0; |
| 491 | |
| 492 | dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name); |
| 493 | |
| 494 | func = &info->functions[index]; |
| 495 | |
| 496 | /* Initialise function */ |
| 497 | func->name = np->name; |
| 498 | func->num_groups = of_get_child_count(np); |
| 499 | if (func->num_groups <= 0) { |
| 500 | dev_err(info->dev, "no groups defined\n"); |
| 501 | return -EINVAL; |
| 502 | } |
| 503 | func->groups = devm_kzalloc(info->dev, |
| 504 | func->num_groups * sizeof(char *), GFP_KERNEL); |
| 505 | |
| 506 | for_each_child_of_node(np, child) { |
| 507 | func->groups[i] = child->name; |
| 508 | grp = &info->groups[grp_index++]; |
| 509 | ret = imx_pinctrl_parse_groups(child, grp, info, i++); |
| 510 | if (ret) |
| 511 | return ret; |
| 512 | } |
| 513 | |
| 514 | return 0; |
| 515 | } |
| 516 | |
| 517 | static int __devinit imx_pinctrl_probe_dt(struct platform_device *pdev, |
| 518 | struct imx_pinctrl_soc_info *info) |
| 519 | { |
| 520 | struct device_node *np = pdev->dev.of_node; |
| 521 | struct device_node *child; |
| 522 | int ret; |
| 523 | u32 nfuncs = 0; |
| 524 | u32 i = 0; |
| 525 | |
| 526 | if (!np) |
| 527 | return -ENODEV; |
| 528 | |
| 529 | nfuncs = of_get_child_count(np); |
| 530 | if (nfuncs <= 0) { |
| 531 | dev_err(&pdev->dev, "no functions defined\n"); |
| 532 | return -EINVAL; |
| 533 | } |
| 534 | |
| 535 | info->nfunctions = nfuncs; |
| 536 | info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func), |
| 537 | GFP_KERNEL); |
| 538 | if (!info->functions) |
| 539 | return -ENOMEM; |
| 540 | |
| 541 | info->ngroups = 0; |
| 542 | for_each_child_of_node(np, child) |
| 543 | info->ngroups += of_get_child_count(child); |
| 544 | info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group), |
| 545 | GFP_KERNEL); |
| 546 | if (!info->groups) |
| 547 | return -ENOMEM; |
| 548 | |
| 549 | for_each_child_of_node(np, child) { |
| 550 | ret = imx_pinctrl_parse_functions(child, info, i++); |
| 551 | if (ret) { |
| 552 | dev_err(&pdev->dev, "failed to parse function\n"); |
| 553 | return ret; |
| 554 | } |
| 555 | } |
| 556 | |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | int __devinit imx_pinctrl_probe(struct platform_device *pdev, |
| 561 | struct imx_pinctrl_soc_info *info) |
| 562 | { |
| 563 | struct imx_pinctrl *ipctl; |
| 564 | struct resource *res; |
| 565 | int ret; |
| 566 | |
| 567 | if (!info || !info->pins || !info->npins |
| 568 | || !info->pin_regs || !info->npin_regs) { |
| 569 | dev_err(&pdev->dev, "wrong pinctrl info\n"); |
| 570 | return -EINVAL; |
| 571 | } |
| 572 | info->dev = &pdev->dev; |
| 573 | |
| 574 | /* Create state holders etc for this driver */ |
| 575 | ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL); |
| 576 | if (!ipctl) |
| 577 | return -ENOMEM; |
| 578 | |
| 579 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 580 | if (!res) |
| 581 | return -ENOENT; |
| 582 | |
| 583 | ipctl->base = devm_request_and_ioremap(&pdev->dev, res); |
| 584 | if (!ipctl->base) |
| 585 | return -EBUSY; |
| 586 | |
| 587 | imx_pinctrl_desc.name = dev_name(&pdev->dev); |
| 588 | imx_pinctrl_desc.pins = info->pins; |
| 589 | imx_pinctrl_desc.npins = info->npins; |
| 590 | |
| 591 | ret = imx_pinctrl_probe_dt(pdev, info); |
| 592 | if (ret) { |
| 593 | dev_err(&pdev->dev, "fail to probe dt properties\n"); |
| 594 | return ret; |
| 595 | } |
| 596 | |
| 597 | ipctl->info = info; |
| 598 | ipctl->dev = info->dev; |
| 599 | platform_set_drvdata(pdev, ipctl); |
| 600 | ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl); |
| 601 | if (!ipctl->pctl) { |
| 602 | dev_err(&pdev->dev, "could not register IMX pinctrl driver\n"); |
| 603 | return -EINVAL; |
| 604 | } |
| 605 | |
| 606 | dev_info(&pdev->dev, "initialized IMX pinctrl driver\n"); |
| 607 | |
| 608 | return 0; |
| 609 | } |
| 610 | |
| 611 | int __devexit imx_pinctrl_remove(struct platform_device *pdev) |
| 612 | { |
| 613 | struct imx_pinctrl *ipctl = platform_get_drvdata(pdev); |
| 614 | |
| 615 | pinctrl_unregister(ipctl->pctl); |
| 616 | |
| 617 | return 0; |
| 618 | } |