blob: 01d5f8f1c71dfdaeee322b08fe463f3b3e73eb34 [file] [log] [blame]
Marc Gonzalezcad008b2015-12-15 10:39:19 +01001#include <dt-bindings/interrupt-controller/arm-gic.h>
2
3/ {
4 cpus {
5 #address-cells = <1>;
6 #size-cells = <0>;
7 enable-method = "sigma,tango4-smp";
8
9 cpu0: cpu@0 {
10 compatible = "arm,cortex-a9";
11 next-level-cache = <&l2cc>;
12 device_type = "cpu";
13 reg = <0>;
14 };
15
16 cpu1: cpu@1 {
17 compatible = "arm,cortex-a9";
18 next-level-cache = <&l2cc>;
19 device_type = "cpu";
20 reg = <1>;
21 };
22 };
23
24 pmu {
25 compatible = "arm,cortex-a9-pmu";
26 interrupt-affinity = <&cpu0>, <&cpu1>;
27 interrupts =
28 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
29 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
30 };
Marc Gonzaleza6e81882016-05-04 12:47:02 +020031
32 soc {
33 cpu_temp: thermal@920100 {
34 #thermal-sensor-cells = <0>;
35 compatible = "sigma,smp8758-thermal";
36 reg = <0x920100 12>;
37 };
38 };
39
40 thermal-zones {
41 cpu_thermal: cpu-thermal {
42 polling-delay = <997>; /* milliseconds */
43 polling-delay-passive = <499>; /* milliseconds */
44 thermal-sensors = <&cpu_temp>;
45 trips {
46 cpu_critical {
47 temperature = <120000>;
48 hysteresis = <2500>;
49 type = "critical";
50 };
51 };
52 };
53 };
Marc Gonzalezcad008b2015-12-15 10:39:19 +010054};