blob: 754fa3960f8331813aede79d855bf57bbf49730c [file] [log] [blame]
Josh Boyer8852ab72007-09-07 07:50:50 -05001/*
2 * Device Tree Source for IBM Walnut
3 *
4 * Copyright 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
12/ {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 model = "ibm,walnut";
16 compatible = "ibm,walnut";
17 dcr-parent = <&/cpus/PowerPC,405GP@0>;
18
19 cpus {
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 PowerPC,405GP@0 {
24 device_type = "cpu";
25 reg = <0>;
26 clock-frequency = <bebc200>; /* Filled in by zImage */
27 timebase-frequency = <0>; /* Filled in by zImage */
28 i-cache-line-size = <20>;
29 d-cache-line-size = <20>;
30 i-cache-size = <4000>;
31 d-cache-size = <4000>;
32 dcr-controller;
33 dcr-access-method = "native";
34 };
35 };
36
37 memory {
38 device_type = "memory";
39 reg = <0 0>; /* Filled in by zImage */
40 };
41
42 UIC0: interrupt-controller {
43 compatible = "ibm,uic";
44 interrupt-controller;
45 cell-index = <0>;
46 dcr-reg = <0c0 9>;
47 #address-cells = <0>;
48 #size-cells = <0>;
49 #interrupt-cells = <2>;
50 };
51
52 plb {
53 compatible = "ibm,plb3";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges;
57 clock-frequency = <0>; /* Filled in by zImage */
58
59 SDRAM0: memory-controller {
60 compatible = "ibm,sdram-405gp";
61 dcr-reg = <010 2>;
62 };
63
64 MAL: mcmal {
65 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
66 dcr-reg = <180 62>;
Josh Boyerb3af7a52007-10-20 00:53:11 +100067 num-tx-chans = <1>;
Josh Boyer8852ab72007-09-07 07:50:50 -050068 num-rx-chans = <1>;
69 interrupt-parent = <&UIC0>;
Josh Boyerb3af7a52007-10-20 00:53:11 +100070 interrupts = <
71 b 4 /* TXEOB */
72 c 4 /* RXEOB */
73 a 4 /* SERR */
74 d 4 /* TXDE */
75 e 4 /* RXDE */>;
Josh Boyer8852ab72007-09-07 07:50:50 -050076 };
77
78 POB0: opb {
79 compatible = "ibm,opb-405gp", "ibm,opb";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 ranges = <ef600000 ef600000 a00000>;
83 dcr-reg = <0a0 5>;
84 clock-frequency = <0>; /* Filled in by zImage */
85
86 UART0: serial@ef600300 {
87 device_type = "serial";
88 compatible = "ns16550";
89 reg = <ef600300 8>;
90 virtual-reg = <ef600300>;
91 clock-frequency = <0>; /* Filled in by zImage */
92 current-speed = <2580>;
93 interrupt-parent = <&UIC0>;
94 interrupts = <0 4>;
95 };
96
97 UART1: serial@ef600400 {
98 device_type = "serial";
99 compatible = "ns16550";
100 reg = <ef600400 8>;
101 virtual-reg = <ef600400>;
102 clock-frequency = <0>; /* Filled in by zImage */
103 current-speed = <2580>;
104 interrupt-parent = <&UIC0>;
105 interrupts = <1 4>;
106 };
107
108 IIC: i2c@ef600500 {
109 compatible = "ibm,iic-405gp", "ibm,iic";
110 reg = <ef600500 11>;
111 interrupt-parent = <&UIC0>;
112 interrupts = <2 4>;
113 };
114
115 GPIO: gpio@ef600700 {
116 compatible = "ibm,gpio-405gp";
117 reg = <ef600700 20>;
118 };
119
120 EMAC: ethernet@ef600800 {
121 linux,network-index = <0>;
122 device_type = "network";
123 compatible = "ibm,emac-405gp", "ibm,emac";
124 interrupt-parent = <&UIC0>;
Steven A. Falco29273152007-11-01 04:52:53 +1100125 interrupts = <
126 f 4 /* Ethernet */
127 9 4 /* Ethernet Wake Up */>;
Josh Boyerb3af7a52007-10-20 00:53:11 +1000128 local-mac-address = [000000000000]; /* Filled in by zImage */
Josh Boyer8852ab72007-09-07 07:50:50 -0500129 reg = <ef600800 70>;
130 mal-device = <&MAL>;
Josh Boyerb3af7a52007-10-20 00:53:11 +1000131 mal-tx-channel = <0>;
Josh Boyer8852ab72007-09-07 07:50:50 -0500132 mal-rx-channel = <0>;
133 cell-index = <0>;
134 max-frame-size = <5dc>;
135 rx-fifo-size = <1000>;
136 tx-fifo-size = <800>;
137 phy-mode = "rmii";
138 phy-map = <00000001>;
139 };
140
141 };
142
143 EBC0: ebc {
144 compatible = "ibm,ebc-405gp", "ibm,ebc";
145 dcr-reg = <012 2>;
146 #address-cells = <2>;
147 #size-cells = <1>;
Josh Boyerbf07f322007-09-15 04:54:13 +1000148 /* The ranges property is supplied by the bootwrapper
149 * and is based on the firmware's configuration of the
150 * EBC bridge
151 */
Josh Boyer8852ab72007-09-07 07:50:50 -0500152 clock-frequency = <0>; /* Filled in by zImage */
153
154 sram@0,0 {
155 reg = <0 0 80000>;
156 };
157
158 flash@0,80000 {
Josh Boyerbf07f322007-09-15 04:54:13 +1000159 compatible = "jedec-flash";
Josh Boyer8852ab72007-09-07 07:50:50 -0500160 bank-width = <1>;
Josh Boyer8852ab72007-09-07 07:50:50 -0500161 reg = <0 80000 80000>;
Josh Boyerbf07f322007-09-15 04:54:13 +1000162 #address-cells = <1>;
163 #size-cells = <1>;
164 partition@0 {
165 label = "OpenBIOS";
166 reg = <0 80000>;
167 read-only;
168 };
Josh Boyer8852ab72007-09-07 07:50:50 -0500169 };
170
171 ds1743@1,0 {
172 /* NVRAM and RTC */
173 compatible = "ds1743";
174 reg = <1 0 2000>;
175 };
176
177 keyboard@2,0 {
178 compatible = "intel,82C42PC";
179 reg = <2 0 2>;
180 };
181
182 ir@3,0 {
183 compatible = "ti,TIR2000PAG";
184 reg = <3 0 10>;
185 };
186
187 fpga@7,0 {
188 compatible = "Walnut-FPGA";
189 reg = <7 0 10>;
190 virtual-reg = <f0300005>;
191 };
192 };
193 };
194
195 chosen {
196 linux,stdout-path = "/plb/opb/serial@ef600300";
197 };
198};