blob: 88bfd767c51c2e7be9f2fa757b5e2362c8f9b720 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * DO NOT EDIT - This file is automatically generated
3 * from the following source files:
4 *
James Bottomley79778a22005-08-04 17:33:22 -05005 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
6 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 */
8
9#include "aic7xxx_osm.h"
10
11static ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
12 { "SCSIRSTO", 0x01, 0x01 },
13 { "ENAUTOATNP", 0x02, 0x02 },
14 { "ENAUTOATNI", 0x04, 0x04 },
15 { "ENAUTOATNO", 0x08, 0x08 },
16 { "ENRSELI", 0x10, 0x10 },
17 { "ENSELI", 0x20, 0x20 },
18 { "ENSELO", 0x40, 0x40 },
19 { "TEMODE", 0x80, 0x80 }
20};
21
22int
23ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
24{
25 return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
26 0x00, regvalue, cur_col, wrap));
27}
28
29static ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
30 { "CLRCHN", 0x02, 0x02 },
31 { "SCAMEN", 0x04, 0x04 },
32 { "SPIOEN", 0x08, 0x08 },
33 { "CLRSTCNT", 0x10, 0x10 },
34 { "FAST20", 0x20, 0x20 },
35 { "DFPEXP", 0x40, 0x40 },
36 { "DFON", 0x80, 0x80 }
37};
38
39int
40ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
41{
42 return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
43 0x01, regvalue, cur_col, wrap));
44}
45
46static ahc_reg_parse_entry_t SXFRCTL1_parse_table[] = {
47 { "STPWEN", 0x01, 0x01 },
48 { "ACTNEGEN", 0x02, 0x02 },
49 { "ENSTIMER", 0x04, 0x04 },
50 { "ENSPCHK", 0x20, 0x20 },
51 { "SWRAPEN", 0x40, 0x40 },
52 { "BITBUCKET", 0x80, 0x80 },
53 { "STIMESEL", 0x18, 0x18 }
54};
55
56int
57ahc_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
58{
59 return (ahc_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
60 0x02, regvalue, cur_col, wrap));
61}
62
63static ahc_reg_parse_entry_t SCSISIGO_parse_table[] = {
64 { "ACKO", 0x01, 0x01 },
65 { "REQO", 0x02, 0x02 },
66 { "BSYO", 0x04, 0x04 },
67 { "SELO", 0x08, 0x08 },
68 { "ATNO", 0x10, 0x10 },
69 { "MSGO", 0x20, 0x20 },
70 { "IOO", 0x40, 0x40 },
71 { "CDO", 0x80, 0x80 },
72 { "P_DATAOUT", 0x00, 0x00 },
73 { "P_DATAIN", 0x40, 0x40 },
74 { "P_COMMAND", 0x80, 0x80 },
75 { "P_MESGOUT", 0xa0, 0xa0 },
76 { "P_STATUS", 0xc0, 0xc0 },
77 { "PHASE_MASK", 0xe0, 0xe0 },
78 { "P_MESGIN", 0xe0, 0xe0 }
79};
80
81int
82ahc_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
83{
84 return (ahc_print_register(SCSISIGO_parse_table, 15, "SCSISIGO",
85 0x03, regvalue, cur_col, wrap));
86}
87
88static ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
89 { "ACKI", 0x01, 0x01 },
90 { "REQI", 0x02, 0x02 },
91 { "BSYI", 0x04, 0x04 },
92 { "SELI", 0x08, 0x08 },
93 { "ATNI", 0x10, 0x10 },
94 { "MSGI", 0x20, 0x20 },
95 { "IOI", 0x40, 0x40 },
96 { "CDI", 0x80, 0x80 },
97 { "P_DATAOUT", 0x00, 0x00 },
98 { "P_DATAOUT_DT", 0x20, 0x20 },
99 { "P_DATAIN", 0x40, 0x40 },
100 { "P_DATAIN_DT", 0x60, 0x60 },
101 { "P_COMMAND", 0x80, 0x80 },
102 { "P_MESGOUT", 0xa0, 0xa0 },
103 { "P_STATUS", 0xc0, 0xc0 },
104 { "PHASE_MASK", 0xe0, 0xe0 },
105 { "P_MESGIN", 0xe0, 0xe0 }
106};
107
108int
109ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
110{
111 return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
112 0x03, regvalue, cur_col, wrap));
113}
114
115static ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
116 { "SINGLE_EDGE", 0x10, 0x10 },
117 { "ENABLE_CRC", 0x40, 0x40 },
118 { "WIDEXFER", 0x80, 0x80 },
119 { "SXFR_ULTRA2", 0x0f, 0x0f },
120 { "SOFS", 0x0f, 0x0f },
121 { "SXFR", 0x70, 0x70 }
122};
123
124int
125ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
126{
127 return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
128 0x04, regvalue, cur_col, wrap));
129}
130
131static ahc_reg_parse_entry_t SCSIID_parse_table[] = {
132 { "TWIN_CHNLB", 0x80, 0x80 },
133 { "OID", 0x0f, 0x0f },
134 { "TWIN_TID", 0x70, 0x70 },
135 { "SOFS_ULTRA2", 0x7f, 0x7f },
136 { "TID", 0xf0, 0xf0 }
137};
138
139int
140ahc_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
141{
142 return (ahc_print_register(SCSIID_parse_table, 5, "SCSIID",
143 0x05, regvalue, cur_col, wrap));
144}
145
146int
147ahc_scsidatl_print(u_int regvalue, u_int *cur_col, u_int wrap)
148{
149 return (ahc_print_register(NULL, 0, "SCSIDATL",
150 0x06, regvalue, cur_col, wrap));
151}
152
153int
154ahc_scsidath_print(u_int regvalue, u_int *cur_col, u_int wrap)
155{
156 return (ahc_print_register(NULL, 0, "SCSIDATH",
157 0x07, regvalue, cur_col, wrap));
158}
159
160int
161ahc_stcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
162{
163 return (ahc_print_register(NULL, 0, "STCNT",
164 0x08, regvalue, cur_col, wrap));
165}
166
167static ahc_reg_parse_entry_t OPTIONMODE_parse_table[] = {
168 { "DIS_MSGIN_DUALEDGE", 0x01, 0x01 },
169 { "AUTO_MSGOUT_DE", 0x02, 0x02 },
170 { "SCSIDATL_IMGEN", 0x04, 0x04 },
171 { "EXPPHASEDIS", 0x08, 0x08 },
172 { "BUSFREEREV", 0x10, 0x10 },
173 { "ATNMGMNTEN", 0x20, 0x20 },
174 { "AUTOACKEN", 0x40, 0x40 },
175 { "AUTORATEEN", 0x80, 0x80 },
176 { "OPTIONMODE_DEFAULTS",0x03, 0x03 }
177};
178
179int
180ahc_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
181{
182 return (ahc_print_register(OPTIONMODE_parse_table, 9, "OPTIONMODE",
183 0x08, regvalue, cur_col, wrap));
184}
185
186int
187ahc_targcrccnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
188{
189 return (ahc_print_register(NULL, 0, "TARGCRCCNT",
190 0x0a, regvalue, cur_col, wrap));
191}
192
193static ahc_reg_parse_entry_t CLRSINT0_parse_table[] = {
194 { "CLRSPIORDY", 0x02, 0x02 },
195 { "CLRSWRAP", 0x08, 0x08 },
196 { "CLRIOERR", 0x08, 0x08 },
197 { "CLRSELINGO", 0x10, 0x10 },
198 { "CLRSELDI", 0x20, 0x20 },
199 { "CLRSELDO", 0x40, 0x40 }
200};
201
202int
203ahc_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
204{
205 return (ahc_print_register(CLRSINT0_parse_table, 6, "CLRSINT0",
206 0x0b, regvalue, cur_col, wrap));
207}
208
209static ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
210 { "DMADONE", 0x01, 0x01 },
211 { "SPIORDY", 0x02, 0x02 },
212 { "SDONE", 0x04, 0x04 },
213 { "SWRAP", 0x08, 0x08 },
214 { "IOERR", 0x08, 0x08 },
215 { "SELINGO", 0x10, 0x10 },
216 { "SELDI", 0x20, 0x20 },
217 { "SELDO", 0x40, 0x40 },
218 { "TARGET", 0x80, 0x80 }
219};
220
221int
222ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
223{
224 return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
225 0x0b, regvalue, cur_col, wrap));
226}
227
228static ahc_reg_parse_entry_t CLRSINT1_parse_table[] = {
229 { "CLRREQINIT", 0x01, 0x01 },
230 { "CLRPHASECHG", 0x02, 0x02 },
231 { "CLRSCSIPERR", 0x04, 0x04 },
232 { "CLRBUSFREE", 0x08, 0x08 },
233 { "CLRSCSIRSTI", 0x20, 0x20 },
234 { "CLRATNO", 0x40, 0x40 },
235 { "CLRSELTIMEO", 0x80, 0x80 }
236};
237
238int
239ahc_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
240{
241 return (ahc_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
242 0x0c, regvalue, cur_col, wrap));
243}
244
245static ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
246 { "REQINIT", 0x01, 0x01 },
247 { "PHASECHG", 0x02, 0x02 },
248 { "SCSIPERR", 0x04, 0x04 },
249 { "BUSFREE", 0x08, 0x08 },
250 { "PHASEMIS", 0x10, 0x10 },
251 { "SCSIRSTI", 0x20, 0x20 },
252 { "ATNTARG", 0x40, 0x40 },
253 { "SELTO", 0x80, 0x80 }
254};
255
256int
257ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
258{
259 return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
260 0x0c, regvalue, cur_col, wrap));
261}
262
263static ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
264 { "DUAL_EDGE_ERR", 0x01, 0x01 },
265 { "CRCREQERR", 0x02, 0x02 },
266 { "CRCENDERR", 0x04, 0x04 },
267 { "CRCVALERR", 0x08, 0x08 },
268 { "EXP_ACTIVE", 0x10, 0x10 },
269 { "SHVALID", 0x40, 0x40 },
270 { "OVERRUN", 0x80, 0x80 },
271 { "SFCNT", 0x1f, 0x1f }
272};
273
274int
275ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
276{
277 return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
278 0x0d, regvalue, cur_col, wrap));
279}
280
281static ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
282 { "OFFCNT", 0x0f, 0x0f },
283 { "U2OFFCNT", 0x7f, 0x7f },
284 { "SCSICNT", 0xf0, 0xf0 }
285};
286
287int
288ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
289{
290 return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
291 0x0e, regvalue, cur_col, wrap));
292}
293
294static ahc_reg_parse_entry_t SCSIID_ULTRA2_parse_table[] = {
295 { "OID", 0x0f, 0x0f },
296 { "TID", 0xf0, 0xf0 }
297};
298
299int
300ahc_scsiid_ultra2_print(u_int regvalue, u_int *cur_col, u_int wrap)
301{
302 return (ahc_print_register(SCSIID_ULTRA2_parse_table, 2, "SCSIID_ULTRA2",
303 0x0f, regvalue, cur_col, wrap));
304}
305
306static ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
307 { "ENDMADONE", 0x01, 0x01 },
308 { "ENSPIORDY", 0x02, 0x02 },
309 { "ENSDONE", 0x04, 0x04 },
310 { "ENSWRAP", 0x08, 0x08 },
311 { "ENIOERR", 0x08, 0x08 },
312 { "ENSELINGO", 0x10, 0x10 },
313 { "ENSELDI", 0x20, 0x20 },
314 { "ENSELDO", 0x40, 0x40 }
315};
316
317int
318ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
319{
320 return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
321 0x10, regvalue, cur_col, wrap));
322}
323
324static ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
325 { "ENREQINIT", 0x01, 0x01 },
326 { "ENPHASECHG", 0x02, 0x02 },
327 { "ENSCSIPERR", 0x04, 0x04 },
328 { "ENBUSFREE", 0x08, 0x08 },
329 { "ENPHASEMIS", 0x10, 0x10 },
330 { "ENSCSIRST", 0x20, 0x20 },
331 { "ENATNTARG", 0x40, 0x40 },
332 { "ENSELTIMO", 0x80, 0x80 }
333};
334
335int
336ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
337{
338 return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1",
339 0x11, regvalue, cur_col, wrap));
340}
341
342int
343ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
344{
345 return (ahc_print_register(NULL, 0, "SCSIBUSL",
346 0x12, regvalue, cur_col, wrap));
347}
348
349int
350ahc_scsibush_print(u_int regvalue, u_int *cur_col, u_int wrap)
351{
352 return (ahc_print_register(NULL, 0, "SCSIBUSH",
353 0x13, regvalue, cur_col, wrap));
354}
355
356static ahc_reg_parse_entry_t SXFRCTL2_parse_table[] = {
357 { "CMDDMAEN", 0x08, 0x08 },
358 { "AUTORSTDIS", 0x10, 0x10 },
359 { "ASYNC_SETUP", 0x07, 0x07 }
360};
361
362int
363ahc_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
364{
365 return (ahc_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
366 0x13, regvalue, cur_col, wrap));
367}
368
369int
370ahc_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
371{
372 return (ahc_print_register(NULL, 0, "SHADDR",
373 0x14, regvalue, cur_col, wrap));
374}
375
376static ahc_reg_parse_entry_t SELTIMER_parse_table[] = {
377 { "STAGE1", 0x01, 0x01 },
378 { "STAGE2", 0x02, 0x02 },
379 { "STAGE3", 0x04, 0x04 },
380 { "STAGE4", 0x08, 0x08 },
381 { "STAGE5", 0x10, 0x10 },
382 { "STAGE6", 0x20, 0x20 }
383};
384
385int
386ahc_seltimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
387{
388 return (ahc_print_register(SELTIMER_parse_table, 6, "SELTIMER",
389 0x18, regvalue, cur_col, wrap));
390}
391
392static ahc_reg_parse_entry_t SELID_parse_table[] = {
393 { "ONEBIT", 0x08, 0x08 },
394 { "SELID_MASK", 0xf0, 0xf0 }
395};
396
397int
398ahc_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
399{
400 return (ahc_print_register(SELID_parse_table, 2, "SELID",
401 0x19, regvalue, cur_col, wrap));
402}
403
404static ahc_reg_parse_entry_t SCAMCTL_parse_table[] = {
405 { "DFLTTID", 0x10, 0x10 },
406 { "ALTSTIM", 0x20, 0x20 },
407 { "CLRSCAMSELID", 0x40, 0x40 },
408 { "ENSCAMSELO", 0x80, 0x80 },
409 { "SCAMLVL", 0x03, 0x03 }
410};
411
412int
413ahc_scamctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
414{
415 return (ahc_print_register(SCAMCTL_parse_table, 5, "SCAMCTL",
416 0x1a, regvalue, cur_col, wrap));
417}
418
419int
420ahc_targid_print(u_int regvalue, u_int *cur_col, u_int wrap)
421{
422 return (ahc_print_register(NULL, 0, "TARGID",
423 0x1b, regvalue, cur_col, wrap));
424}
425
426static ahc_reg_parse_entry_t SPIOCAP_parse_table[] = {
427 { "SSPIOCPS", 0x01, 0x01 },
428 { "ROM", 0x02, 0x02 },
429 { "EEPROM", 0x04, 0x04 },
430 { "SEEPROM", 0x08, 0x08 },
431 { "EXT_BRDCTL", 0x10, 0x10 },
432 { "SOFTCMDEN", 0x20, 0x20 },
433 { "SOFT0", 0x40, 0x40 },
434 { "SOFT1", 0x80, 0x80 }
435};
436
437int
438ahc_spiocap_print(u_int regvalue, u_int *cur_col, u_int wrap)
439{
440 return (ahc_print_register(SPIOCAP_parse_table, 8, "SPIOCAP",
441 0x1b, regvalue, cur_col, wrap));
442}
443
444static ahc_reg_parse_entry_t BRDCTL_parse_table[] = {
445 { "BRDCTL0", 0x01, 0x01 },
446 { "BRDSTB_ULTRA2", 0x01, 0x01 },
447 { "BRDCTL1", 0x02, 0x02 },
448 { "BRDRW_ULTRA2", 0x02, 0x02 },
449 { "BRDRW", 0x04, 0x04 },
450 { "BRDDAT2", 0x04, 0x04 },
451 { "BRDCS", 0x08, 0x08 },
452 { "BRDDAT3", 0x08, 0x08 },
453 { "BRDSTB", 0x10, 0x10 },
454 { "BRDDAT4", 0x10, 0x10 },
455 { "BRDDAT5", 0x20, 0x20 },
456 { "BRDDAT6", 0x40, 0x40 },
457 { "BRDDAT7", 0x80, 0x80 }
458};
459
460int
461ahc_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
462{
463 return (ahc_print_register(BRDCTL_parse_table, 13, "BRDCTL",
464 0x1d, regvalue, cur_col, wrap));
465}
466
467static ahc_reg_parse_entry_t SEECTL_parse_table[] = {
468 { "SEEDI", 0x01, 0x01 },
469 { "SEEDO", 0x02, 0x02 },
470 { "SEECK", 0x04, 0x04 },
471 { "SEECS", 0x08, 0x08 },
472 { "SEERDY", 0x10, 0x10 },
473 { "SEEMS", 0x20, 0x20 },
474 { "EXTARBREQ", 0x40, 0x40 },
475 { "EXTARBACK", 0x80, 0x80 }
476};
477
478int
479ahc_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
480{
481 return (ahc_print_register(SEECTL_parse_table, 8, "SEECTL",
482 0x1e, regvalue, cur_col, wrap));
483}
484
485static ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
486 { "XCVR", 0x01, 0x01 },
487 { "SELWIDE", 0x02, 0x02 },
488 { "ENAB20", 0x04, 0x04 },
489 { "SELBUSB", 0x08, 0x08 },
490 { "ENAB40", 0x08, 0x08 },
491 { "AUTOFLUSHDIS", 0x20, 0x20 },
492 { "DIAGLEDON", 0x40, 0x40 },
493 { "DIAGLEDEN", 0x80, 0x80 }
494};
495
496int
497ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
498{
499 return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL",
500 0x1f, regvalue, cur_col, wrap));
501}
502
503int
504ahc_busy_targets_print(u_int regvalue, u_int *cur_col, u_int wrap)
505{
506 return (ahc_print_register(NULL, 0, "BUSY_TARGETS",
507 0x20, regvalue, cur_col, wrap));
508}
509
510int
511ahc_ultra_enb_print(u_int regvalue, u_int *cur_col, u_int wrap)
512{
513 return (ahc_print_register(NULL, 0, "ULTRA_ENB",
514 0x30, regvalue, cur_col, wrap));
515}
516
517int
518ahc_disc_dsb_print(u_int regvalue, u_int *cur_col, u_int wrap)
519{
520 return (ahc_print_register(NULL, 0, "DISC_DSB",
521 0x32, regvalue, cur_col, wrap));
522}
523
524int
525ahc_cmdsize_table_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
526{
527 return (ahc_print_register(NULL, 0, "CMDSIZE_TABLE_TAIL",
528 0x34, regvalue, cur_col, wrap));
529}
530
531int
532ahc_mwi_residual_print(u_int regvalue, u_int *cur_col, u_int wrap)
533{
534 return (ahc_print_register(NULL, 0, "MWI_RESIDUAL",
535 0x38, regvalue, cur_col, wrap));
536}
537
538int
539ahc_next_queued_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
540{
541 return (ahc_print_register(NULL, 0, "NEXT_QUEUED_SCB",
542 0x39, regvalue, cur_col, wrap));
543}
544
545int
546ahc_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
547{
548 return (ahc_print_register(NULL, 0, "MSG_OUT",
549 0x3a, regvalue, cur_col, wrap));
550}
551
552static ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = {
553 { "FIFORESET", 0x01, 0x01 },
554 { "FIFOFLUSH", 0x02, 0x02 },
555 { "DIRECTION", 0x04, 0x04 },
556 { "HDMAEN", 0x08, 0x08 },
557 { "HDMAENACK", 0x08, 0x08 },
558 { "SDMAEN", 0x10, 0x10 },
559 { "SDMAENACK", 0x10, 0x10 },
560 { "SCSIEN", 0x20, 0x20 },
561 { "WIDEODD", 0x40, 0x40 },
562 { "PRELOADEN", 0x80, 0x80 }
563};
564
565int
566ahc_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
567{
568 return (ahc_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
569 0x3b, regvalue, cur_col, wrap));
570}
571
572static ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
573 { "NO_DISCONNECT", 0x01, 0x01 },
574 { "SPHASE_PENDING", 0x02, 0x02 },
575 { "DPHASE_PENDING", 0x04, 0x04 },
576 { "CMDPHASE_PENDING", 0x08, 0x08 },
577 { "TARG_CMD_PENDING", 0x10, 0x10 },
578 { "DPHASE", 0x20, 0x20 },
579 { "NO_CDB_SENT", 0x40, 0x40 },
580 { "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
581 { "NOT_IDENTIFIED", 0x80, 0x80 }
582};
583
584int
585ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
586{
587 return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
588 0x3c, regvalue, cur_col, wrap));
589}
590
591int
592ahc_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
593{
594 return (ahc_print_register(NULL, 0, "SAVED_SCSIID",
595 0x3d, regvalue, cur_col, wrap));
596}
597
598int
599ahc_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
600{
601 return (ahc_print_register(NULL, 0, "SAVED_LUN",
602 0x3e, regvalue, cur_col, wrap));
603}
604
605static ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
606 { "MSGI", 0x20, 0x20 },
607 { "IOI", 0x40, 0x40 },
608 { "CDI", 0x80, 0x80 },
609 { "P_DATAOUT", 0x00, 0x00 },
610 { "P_BUSFREE", 0x01, 0x01 },
611 { "P_DATAIN", 0x40, 0x40 },
612 { "P_COMMAND", 0x80, 0x80 },
613 { "P_MESGOUT", 0xa0, 0xa0 },
614 { "P_STATUS", 0xc0, 0xc0 },
615 { "PHASE_MASK", 0xe0, 0xe0 },
616 { "P_MESGIN", 0xe0, 0xe0 }
617};
618
619int
620ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
621{
622 return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE",
623 0x3f, regvalue, cur_col, wrap));
624}
625
626int
627ahc_waiting_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
628{
629 return (ahc_print_register(NULL, 0, "WAITING_SCBH",
630 0x40, regvalue, cur_col, wrap));
631}
632
633int
634ahc_disconnected_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
635{
636 return (ahc_print_register(NULL, 0, "DISCONNECTED_SCBH",
637 0x41, regvalue, cur_col, wrap));
638}
639
640int
641ahc_free_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
642{
643 return (ahc_print_register(NULL, 0, "FREE_SCBH",
644 0x42, regvalue, cur_col, wrap));
645}
646
647int
648ahc_complete_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
649{
650 return (ahc_print_register(NULL, 0, "COMPLETE_SCBH",
651 0x43, regvalue, cur_col, wrap));
652}
653
654int
655ahc_hscb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
656{
657 return (ahc_print_register(NULL, 0, "HSCB_ADDR",
658 0x44, regvalue, cur_col, wrap));
659}
660
661int
662ahc_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
663{
664 return (ahc_print_register(NULL, 0, "SHARED_DATA_ADDR",
665 0x48, regvalue, cur_col, wrap));
666}
667
668int
669ahc_kernel_qinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
670{
671 return (ahc_print_register(NULL, 0, "KERNEL_QINPOS",
672 0x4c, regvalue, cur_col, wrap));
673}
674
675int
676ahc_qinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
677{
678 return (ahc_print_register(NULL, 0, "QINPOS",
679 0x4d, regvalue, cur_col, wrap));
680}
681
682int
683ahc_qoutpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
684{
685 return (ahc_print_register(NULL, 0, "QOUTPOS",
686 0x4e, regvalue, cur_col, wrap));
687}
688
689int
690ahc_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
691{
692 return (ahc_print_register(NULL, 0, "KERNEL_TQINPOS",
693 0x4f, regvalue, cur_col, wrap));
694}
695
696int
697ahc_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
698{
699 return (ahc_print_register(NULL, 0, "TQINPOS",
700 0x50, regvalue, cur_col, wrap));
701}
702
703static ahc_reg_parse_entry_t ARG_1_parse_table[] = {
704 { "CONT_TARG_SESSION", 0x02, 0x02 },
705 { "CONT_MSG_LOOP", 0x04, 0x04 },
706 { "EXIT_MSG_LOOP", 0x08, 0x08 },
707 { "MSGOUT_PHASEMIS", 0x10, 0x10 },
708 { "SEND_REJ", 0x20, 0x20 },
709 { "SEND_SENSE", 0x40, 0x40 },
710 { "SEND_MSG", 0x80, 0x80 }
711};
712
713int
714ahc_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
715{
716 return (ahc_print_register(ARG_1_parse_table, 7, "ARG_1",
717 0x51, regvalue, cur_col, wrap));
718}
719
720int
721ahc_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
722{
723 return (ahc_print_register(NULL, 0, "ARG_2",
724 0x52, regvalue, cur_col, wrap));
725}
726
727int
728ahc_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
729{
730 return (ahc_print_register(NULL, 0, "LAST_MSG",
731 0x53, regvalue, cur_col, wrap));
732}
733
734static ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
735 { "ENAUTOATNP", 0x02, 0x02 },
736 { "ENAUTOATNI", 0x04, 0x04 },
737 { "ENAUTOATNO", 0x08, 0x08 },
738 { "ENRSELI", 0x10, 0x10 },
739 { "ENSELI", 0x20, 0x20 },
740 { "ENSELO", 0x40, 0x40 }
741};
742
743int
744ahc_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
745{
746 return (ahc_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
747 0x54, regvalue, cur_col, wrap));
748}
749
750static ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = {
751 { "HA_274_EXTENDED_TRANS",0x01, 0x01 }
752};
753
754int
755ahc_ha_274_biosglobal_print(u_int regvalue, u_int *cur_col, u_int wrap)
756{
757 return (ahc_print_register(HA_274_BIOSGLOBAL_parse_table, 1, "HA_274_BIOSGLOBAL",
758 0x56, regvalue, cur_col, wrap));
759}
760
761static ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
762 { "SCB_DMA", 0x01, 0x01 },
763 { "TARGET_MSG_PENDING", 0x02, 0x02 }
764};
765
766int
767ahc_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
768{
769 return (ahc_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
770 0x57, regvalue, cur_col, wrap));
771}
772
773static ahc_reg_parse_entry_t SCSICONF_parse_table[] = {
774 { "ENSPCHK", 0x20, 0x20 },
775 { "RESET_SCSI", 0x40, 0x40 },
776 { "TERM_ENB", 0x80, 0x80 },
777 { "HSCSIID", 0x07, 0x07 },
778 { "HWSCSIID", 0x0f, 0x0f }
779};
780
781int
782ahc_scsiconf_print(u_int regvalue, u_int *cur_col, u_int wrap)
783{
784 return (ahc_print_register(SCSICONF_parse_table, 5, "SCSICONF",
785 0x5a, regvalue, cur_col, wrap));
786}
787
788static ahc_reg_parse_entry_t INTDEF_parse_table[] = {
789 { "EDGE_TRIG", 0x80, 0x80 },
790 { "VECTOR", 0x0f, 0x0f }
791};
792
793int
794ahc_intdef_print(u_int regvalue, u_int *cur_col, u_int wrap)
795{
796 return (ahc_print_register(INTDEF_parse_table, 2, "INTDEF",
797 0x5c, regvalue, cur_col, wrap));
798}
799
800int
801ahc_hostconf_print(u_int regvalue, u_int *cur_col, u_int wrap)
802{
803 return (ahc_print_register(NULL, 0, "HOSTCONF",
804 0x5d, regvalue, cur_col, wrap));
805}
806
807static ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = {
808 { "CHANNEL_B_PRIMARY", 0x08, 0x08 },
809 { "BIOSMODE", 0x30, 0x30 },
810 { "BIOSDISABLED", 0x30, 0x30 }
811};
812
813int
814ahc_ha_274_biosctrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
815{
816 return (ahc_print_register(HA_274_BIOSCTRL_parse_table, 3, "HA_274_BIOSCTRL",
817 0x5f, regvalue, cur_col, wrap));
818}
819
820static ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
821 { "LOADRAM", 0x01, 0x01 },
822 { "SEQRESET", 0x02, 0x02 },
823 { "STEP", 0x04, 0x04 },
824 { "BRKADRINTEN", 0x08, 0x08 },
825 { "FASTMODE", 0x10, 0x10 },
826 { "FAILDIS", 0x20, 0x20 },
827 { "PAUSEDIS", 0x40, 0x40 },
828 { "PERRORDIS", 0x80, 0x80 }
829};
830
831int
832ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
833{
834 return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL",
835 0x60, regvalue, cur_col, wrap));
836}
837
838int
839ahc_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
840{
841 return (ahc_print_register(NULL, 0, "SEQRAM",
842 0x61, regvalue, cur_col, wrap));
843}
844
845int
846ahc_seqaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
847{
848 return (ahc_print_register(NULL, 0, "SEQADDR0",
849 0x62, regvalue, cur_col, wrap));
850}
851
852static ahc_reg_parse_entry_t SEQADDR1_parse_table[] = {
853 { "SEQADDR1_MASK", 0x01, 0x01 }
854};
855
856int
857ahc_seqaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
858{
859 return (ahc_print_register(SEQADDR1_parse_table, 1, "SEQADDR1",
860 0x63, regvalue, cur_col, wrap));
861}
862
863int
864ahc_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
865{
866 return (ahc_print_register(NULL, 0, "ACCUM",
867 0x64, regvalue, cur_col, wrap));
868}
869
870int
871ahc_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
872{
873 return (ahc_print_register(NULL, 0, "SINDEX",
874 0x65, regvalue, cur_col, wrap));
875}
876
877int
878ahc_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
879{
880 return (ahc_print_register(NULL, 0, "DINDEX",
881 0x66, regvalue, cur_col, wrap));
882}
883
884int
885ahc_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
886{
887 return (ahc_print_register(NULL, 0, "ALLONES",
888 0x69, regvalue, cur_col, wrap));
889}
890
891int
892ahc_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
893{
894 return (ahc_print_register(NULL, 0, "ALLZEROS",
895 0x6a, regvalue, cur_col, wrap));
896}
897
898int
899ahc_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
900{
901 return (ahc_print_register(NULL, 0, "NONE",
902 0x6a, regvalue, cur_col, wrap));
903}
904
905static ahc_reg_parse_entry_t FLAGS_parse_table[] = {
906 { "CARRY", 0x01, 0x01 },
907 { "ZERO", 0x02, 0x02 }
908};
909
910int
911ahc_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
912{
913 return (ahc_print_register(FLAGS_parse_table, 2, "FLAGS",
914 0x6b, regvalue, cur_col, wrap));
915}
916
917int
918ahc_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
919{
920 return (ahc_print_register(NULL, 0, "SINDIR",
921 0x6c, regvalue, cur_col, wrap));
922}
923
924int
925ahc_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
926{
927 return (ahc_print_register(NULL, 0, "DINDIR",
928 0x6d, regvalue, cur_col, wrap));
929}
930
931int
932ahc_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
933{
934 return (ahc_print_register(NULL, 0, "FUNCTION1",
935 0x6e, regvalue, cur_col, wrap));
936}
937
938int
939ahc_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
940{
941 return (ahc_print_register(NULL, 0, "STACK",
942 0x6f, regvalue, cur_col, wrap));
943}
944
945int
946ahc_targ_offset_print(u_int regvalue, u_int *cur_col, u_int wrap)
947{
948 return (ahc_print_register(NULL, 0, "TARG_OFFSET",
949 0x70, regvalue, cur_col, wrap));
950}
951
952int
953ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
954{
955 return (ahc_print_register(NULL, 0, "SRAM_BASE",
956 0x70, regvalue, cur_col, wrap));
957}
958
959static ahc_reg_parse_entry_t BCTL_parse_table[] = {
960 { "ENABLE", 0x01, 0x01 },
961 { "ACE", 0x08, 0x08 }
962};
963
964int
965ahc_bctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
966{
967 return (ahc_print_register(BCTL_parse_table, 2, "BCTL",
968 0x84, regvalue, cur_col, wrap));
969}
970
971static ahc_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
972 { "CIOPARCKEN", 0x01, 0x01 },
973 { "USCBSIZE32", 0x02, 0x02 },
974 { "RAMPS", 0x04, 0x04 },
975 { "INTSCBRAMSEL", 0x08, 0x08 },
976 { "EXTREQLCK", 0x10, 0x10 },
977 { "MPARCKEN", 0x20, 0x20 },
978 { "DPARCKEN", 0x40, 0x40 },
979 { "CACHETHEN", 0x80, 0x80 }
980};
981
982int
983ahc_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
984{
985 return (ahc_print_register(DSCOMMAND0_parse_table, 8, "DSCOMMAND0",
986 0x84, regvalue, cur_col, wrap));
987}
988
989static ahc_reg_parse_entry_t BUSTIME_parse_table[] = {
990 { "BON", 0x0f, 0x0f },
991 { "BOFF", 0xf0, 0xf0 }
992};
993
994int
995ahc_bustime_print(u_int regvalue, u_int *cur_col, u_int wrap)
996{
997 return (ahc_print_register(BUSTIME_parse_table, 2, "BUSTIME",
998 0x85, regvalue, cur_col, wrap));
999}
1000
1001static ahc_reg_parse_entry_t DSCOMMAND1_parse_table[] = {
1002 { "HADDLDSEL0", 0x01, 0x01 },
1003 { "HADDLDSEL1", 0x02, 0x02 },
1004 { "DSLATT", 0xfc, 0xfc }
1005};
1006
1007int
1008ahc_dscommand1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1009{
1010 return (ahc_print_register(DSCOMMAND1_parse_table, 3, "DSCOMMAND1",
1011 0x85, regvalue, cur_col, wrap));
1012}
1013
1014static ahc_reg_parse_entry_t BUSSPD_parse_table[] = {
1015 { "STBON", 0x07, 0x07 },
1016 { "STBOFF", 0x38, 0x38 },
1017 { "DFTHRSH_75", 0x80, 0x80 },
1018 { "DFTHRSH", 0xc0, 0xc0 },
1019 { "DFTHRSH_100", 0xc0, 0xc0 }
1020};
1021
1022int
1023ahc_busspd_print(u_int regvalue, u_int *cur_col, u_int wrap)
1024{
1025 return (ahc_print_register(BUSSPD_parse_table, 5, "BUSSPD",
1026 0x86, regvalue, cur_col, wrap));
1027}
1028
1029static ahc_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
1030 { "SEQ_MAILBOX", 0x0f, 0x0f },
1031 { "HOST_TQINPOS", 0x80, 0x80 },
1032 { "HOST_MAILBOX", 0xf0, 0xf0 }
1033};
1034
1035int
1036ahc_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
1037{
1038 return (ahc_print_register(HS_MAILBOX_parse_table, 3, "HS_MAILBOX",
1039 0x86, regvalue, cur_col, wrap));
1040}
1041
1042static ahc_reg_parse_entry_t DSPCISTATUS_parse_table[] = {
1043 { "DFTHRSH_100", 0xc0, 0xc0 }
1044};
1045
1046int
1047ahc_dspcistatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
1048{
1049 return (ahc_print_register(DSPCISTATUS_parse_table, 1, "DSPCISTATUS",
1050 0x86, regvalue, cur_col, wrap));
1051}
1052
1053static ahc_reg_parse_entry_t HCNTRL_parse_table[] = {
1054 { "CHIPRST", 0x01, 0x01 },
1055 { "CHIPRSTACK", 0x01, 0x01 },
1056 { "INTEN", 0x02, 0x02 },
1057 { "PAUSE", 0x04, 0x04 },
1058 { "IRQMS", 0x08, 0x08 },
1059 { "SWINT", 0x10, 0x10 },
1060 { "POWRDN", 0x40, 0x40 }
1061};
1062
1063int
1064ahc_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1065{
1066 return (ahc_print_register(HCNTRL_parse_table, 7, "HCNTRL",
1067 0x87, regvalue, cur_col, wrap));
1068}
1069
1070int
1071ahc_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1072{
1073 return (ahc_print_register(NULL, 0, "HADDR",
1074 0x88, regvalue, cur_col, wrap));
1075}
1076
1077int
1078ahc_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1079{
1080 return (ahc_print_register(NULL, 0, "HCNT",
1081 0x8c, regvalue, cur_col, wrap));
1082}
1083
1084int
1085ahc_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1086{
1087 return (ahc_print_register(NULL, 0, "SCBPTR",
1088 0x90, regvalue, cur_col, wrap));
1089}
1090
1091static ahc_reg_parse_entry_t INTSTAT_parse_table[] = {
1092 { "SEQINT", 0x01, 0x01 },
1093 { "CMDCMPLT", 0x02, 0x02 },
1094 { "SCSIINT", 0x04, 0x04 },
1095 { "BRKADRINT", 0x08, 0x08 },
1096 { "BAD_PHASE", 0x01, 0x01 },
1097 { "INT_PEND", 0x0f, 0x0f },
1098 { "SEND_REJECT", 0x11, 0x11 },
1099 { "PROTO_VIOLATION", 0x21, 0x21 },
1100 { "NO_MATCH", 0x31, 0x31 },
1101 { "IGN_WIDE_RES", 0x41, 0x41 },
1102 { "PDATA_REINIT", 0x51, 0x51 },
1103 { "HOST_MSG_LOOP", 0x61, 0x61 },
1104 { "BAD_STATUS", 0x71, 0x71 },
1105 { "PERR_DETECTED", 0x81, 0x81 },
1106 { "DATA_OVERRUN", 0x91, 0x91 },
1107 { "MKMSG_FAILED", 0xa1, 0xa1 },
1108 { "MISSED_BUSFREE", 0xb1, 0xb1 },
1109 { "SCB_MISMATCH", 0xc1, 0xc1 },
1110 { "NO_FREE_SCB", 0xd1, 0xd1 },
1111 { "OUT_OF_RANGE", 0xe1, 0xe1 },
1112 { "SEQINT_MASK", 0xf1, 0xf1 }
1113};
1114
1115int
1116ahc_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1117{
1118 return (ahc_print_register(INTSTAT_parse_table, 21, "INTSTAT",
1119 0x91, regvalue, cur_col, wrap));
1120}
1121
1122static ahc_reg_parse_entry_t CLRINT_parse_table[] = {
1123 { "CLRSEQINT", 0x01, 0x01 },
1124 { "CLRCMDINT", 0x02, 0x02 },
1125 { "CLRSCSIINT", 0x04, 0x04 },
1126 { "CLRBRKADRINT", 0x08, 0x08 },
1127 { "CLRPARERR", 0x10, 0x10 }
1128};
1129
1130int
1131ahc_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
1132{
1133 return (ahc_print_register(CLRINT_parse_table, 5, "CLRINT",
1134 0x92, regvalue, cur_col, wrap));
1135}
1136
1137static ahc_reg_parse_entry_t ERROR_parse_table[] = {
1138 { "ILLHADDR", 0x01, 0x01 },
1139 { "ILLSADDR", 0x02, 0x02 },
1140 { "ILLOPCODE", 0x04, 0x04 },
1141 { "SQPARERR", 0x08, 0x08 },
1142 { "DPARERR", 0x10, 0x10 },
1143 { "MPARERR", 0x20, 0x20 },
1144 { "PCIERRSTAT", 0x40, 0x40 },
1145 { "CIOPARERR", 0x80, 0x80 }
1146};
1147
1148int
1149ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
1150{
1151 return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
1152 0x92, regvalue, cur_col, wrap));
1153}
1154
1155static ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
1156 { "FIFORESET", 0x01, 0x01 },
1157 { "FIFOFLUSH", 0x02, 0x02 },
1158 { "DIRECTION", 0x04, 0x04 },
1159 { "HDMAEN", 0x08, 0x08 },
1160 { "HDMAENACK", 0x08, 0x08 },
1161 { "SDMAEN", 0x10, 0x10 },
1162 { "SDMAENACK", 0x10, 0x10 },
1163 { "SCSIEN", 0x20, 0x20 },
1164 { "WIDEODD", 0x40, 0x40 },
1165 { "PRELOADEN", 0x80, 0x80 }
1166};
1167
1168int
1169ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1170{
1171 return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
1172 0x93, regvalue, cur_col, wrap));
1173}
1174
1175static ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
1176 { "FIFOEMP", 0x01, 0x01 },
1177 { "FIFOFULL", 0x02, 0x02 },
1178 { "DFTHRESH", 0x04, 0x04 },
1179 { "HDONE", 0x08, 0x08 },
1180 { "MREQPEND", 0x10, 0x10 },
1181 { "FIFOQWDEMP", 0x20, 0x20 },
1182 { "DFCACHETH", 0x40, 0x40 },
1183 { "PRELOAD_AVAIL", 0x80, 0x80 }
1184};
1185
1186int
1187ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
1188{
1189 return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
1190 0x94, regvalue, cur_col, wrap));
1191}
1192
1193int
1194ahc_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1195{
1196 return (ahc_print_register(NULL, 0, "DFWADDR",
1197 0x95, regvalue, cur_col, wrap));
1198}
1199
1200int
1201ahc_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1202{
1203 return (ahc_print_register(NULL, 0, "DFRADDR",
1204 0x97, regvalue, cur_col, wrap));
1205}
1206
1207int
1208ahc_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1209{
1210 return (ahc_print_register(NULL, 0, "DFDAT",
1211 0x99, regvalue, cur_col, wrap));
1212}
1213
1214static ahc_reg_parse_entry_t SCBCNT_parse_table[] = {
1215 { "SCBAUTO", 0x80, 0x80 },
1216 { "SCBCNT_MASK", 0x1f, 0x1f }
1217};
1218
1219int
1220ahc_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1221{
1222 return (ahc_print_register(SCBCNT_parse_table, 2, "SCBCNT",
1223 0x9a, regvalue, cur_col, wrap));
1224}
1225
1226int
1227ahc_qinfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
1228{
1229 return (ahc_print_register(NULL, 0, "QINFIFO",
1230 0x9b, regvalue, cur_col, wrap));
1231}
1232
1233int
1234ahc_qincnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1235{
1236 return (ahc_print_register(NULL, 0, "QINCNT",
1237 0x9c, regvalue, cur_col, wrap));
1238}
1239
1240int
1241ahc_qoutfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
1242{
1243 return (ahc_print_register(NULL, 0, "QOUTFIFO",
1244 0x9d, regvalue, cur_col, wrap));
1245}
1246
1247static ahc_reg_parse_entry_t CRCCONTROL1_parse_table[] = {
1248 { "TARGCRCCNTEN", 0x04, 0x04 },
1249 { "TARGCRCENDEN", 0x08, 0x08 },
1250 { "CRCREQCHKEN", 0x10, 0x10 },
1251 { "CRCENDCHKEN", 0x20, 0x20 },
1252 { "CRCVALCHKEN", 0x40, 0x40 },
1253 { "CRCONSEEN", 0x80, 0x80 }
1254};
1255
1256int
1257ahc_crccontrol1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1258{
1259 return (ahc_print_register(CRCCONTROL1_parse_table, 6, "CRCCONTROL1",
1260 0x9d, regvalue, cur_col, wrap));
1261}
1262
1263int
1264ahc_qoutcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1265{
1266 return (ahc_print_register(NULL, 0, "QOUTCNT",
1267 0x9e, regvalue, cur_col, wrap));
1268}
1269
1270static ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
1271 { "DATA_OUT_PHASE", 0x01, 0x01 },
1272 { "DATA_IN_PHASE", 0x02, 0x02 },
1273 { "MSG_OUT_PHASE", 0x04, 0x04 },
1274 { "MSG_IN_PHASE", 0x08, 0x08 },
1275 { "COMMAND_PHASE", 0x10, 0x10 },
1276 { "STATUS_PHASE", 0x20, 0x20 },
1277 { "DATA_PHASE_MASK", 0x03, 0x03 }
1278};
1279
1280int
1281ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
1282{
1283 return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
1284 0x9e, regvalue, cur_col, wrap));
1285}
1286
1287static ahc_reg_parse_entry_t SFUNCT_parse_table[] = {
1288 { "ALT_MODE", 0x80, 0x80 }
1289};
1290
1291int
1292ahc_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
1293{
1294 return (ahc_print_register(SFUNCT_parse_table, 1, "SFUNCT",
1295 0x9f, regvalue, cur_col, wrap));
1296}
1297
1298int
1299ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
1300{
1301 return (ahc_print_register(NULL, 0, "SCB_BASE",
1302 0xa0, regvalue, cur_col, wrap));
1303}
1304
1305int
1306ahc_scb_cdb_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1307{
1308 return (ahc_print_register(NULL, 0, "SCB_CDB_PTR",
1309 0xa0, regvalue, cur_col, wrap));
1310}
1311
1312int
1313ahc_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1314{
1315 return (ahc_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR",
1316 0xa4, regvalue, cur_col, wrap));
1317}
1318
1319int
1320ahc_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
1321{
1322 return (ahc_print_register(NULL, 0, "SCB_SCSI_STATUS",
1323 0xa8, regvalue, cur_col, wrap));
1324}
1325
1326int
1327ahc_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap)
1328{
1329 return (ahc_print_register(NULL, 0, "SCB_TARGET_PHASES",
1330 0xa9, regvalue, cur_col, wrap));
1331}
1332
1333int
1334ahc_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap)
1335{
1336 return (ahc_print_register(NULL, 0, "SCB_TARGET_DATA_DIR",
1337 0xaa, regvalue, cur_col, wrap));
1338}
1339
1340int
1341ahc_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap)
1342{
1343 return (ahc_print_register(NULL, 0, "SCB_TARGET_ITAG",
1344 0xab, regvalue, cur_col, wrap));
1345}
1346
1347int
1348ahc_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1349{
1350 return (ahc_print_register(NULL, 0, "SCB_DATAPTR",
1351 0xac, regvalue, cur_col, wrap));
1352}
1353
1354static ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
1355 { "SG_LAST_SEG", 0x80, 0x80 },
1356 { "SG_HIGH_ADDR_BITS", 0x7f, 0x7f }
1357};
1358
1359int
1360ahc_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1361{
1362 return (ahc_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
1363 0xb0, regvalue, cur_col, wrap));
1364}
1365
1366static ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
1367 { "SG_LIST_NULL", 0x01, 0x01 },
1368 { "SG_FULL_RESID", 0x02, 0x02 },
1369 { "SG_RESID_VALID", 0x04, 0x04 }
1370};
1371
1372int
1373ahc_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1374{
1375 return (ahc_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
1376 0xb4, regvalue, cur_col, wrap));
1377}
1378
1379static ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
1380 { "DISCONNECTED", 0x04, 0x04 },
1381 { "ULTRAENB", 0x08, 0x08 },
1382 { "MK_MESSAGE", 0x10, 0x10 },
1383 { "TAG_ENB", 0x20, 0x20 },
1384 { "DISCENB", 0x40, 0x40 },
1385 { "TARGET_SCB", 0x80, 0x80 },
1386 { "STATUS_RCVD", 0x80, 0x80 },
1387 { "SCB_TAG_TYPE", 0x03, 0x03 }
1388};
1389
1390int
1391ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
1392{
1393 return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
1394 0xb8, regvalue, cur_col, wrap));
1395}
1396
1397static ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
1398 { "TWIN_CHNLB", 0x80, 0x80 },
1399 { "OID", 0x0f, 0x0f },
1400 { "TWIN_TID", 0x70, 0x70 },
1401 { "TID", 0xf0, 0xf0 }
1402};
1403
1404int
1405ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1406{
1407 return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
1408 0xb9, regvalue, cur_col, wrap));
1409}
1410
1411static ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
1412 { "SCB_XFERLEN_ODD", 0x80, 0x80 },
1413 { "LID", 0x3f, 0x3f }
1414};
1415
1416int
1417ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
1418{
1419 return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN",
1420 0xba, regvalue, cur_col, wrap));
1421}
1422
1423int
1424ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
1425{
1426 return (ahc_print_register(NULL, 0, "SCB_TAG",
1427 0xbb, regvalue, cur_col, wrap));
1428}
1429
1430int
1431ahc_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap)
1432{
1433 return (ahc_print_register(NULL, 0, "SCB_CDB_LEN",
1434 0xbc, regvalue, cur_col, wrap));
1435}
1436
1437int
1438ahc_scb_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
1439{
1440 return (ahc_print_register(NULL, 0, "SCB_SCSIRATE",
1441 0xbd, regvalue, cur_col, wrap));
1442}
1443
1444int
1445ahc_scb_scsioffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
1446{
1447 return (ahc_print_register(NULL, 0, "SCB_SCSIOFFSET",
1448 0xbe, regvalue, cur_col, wrap));
1449}
1450
1451int
1452ahc_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
1453{
1454 return (ahc_print_register(NULL, 0, "SCB_NEXT",
1455 0xbf, regvalue, cur_col, wrap));
1456}
1457
1458int
1459ahc_scb_64_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
1460{
1461 return (ahc_print_register(NULL, 0, "SCB_64_SPARE",
1462 0xc0, regvalue, cur_col, wrap));
1463}
1464
1465static ahc_reg_parse_entry_t SEECTL_2840_parse_table[] = {
1466 { "DO_2840", 0x01, 0x01 },
1467 { "CK_2840", 0x02, 0x02 },
1468 { "CS_2840", 0x04, 0x04 }
1469};
1470
1471int
1472ahc_seectl_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
1473{
1474 return (ahc_print_register(SEECTL_2840_parse_table, 3, "SEECTL_2840",
1475 0xc0, regvalue, cur_col, wrap));
1476}
1477
1478static ahc_reg_parse_entry_t STATUS_2840_parse_table[] = {
1479 { "DI_2840", 0x01, 0x01 },
1480 { "EEPROM_TF", 0x80, 0x80 },
1481 { "ADSEL", 0x1e, 0x1e },
1482 { "BIOS_SEL", 0x60, 0x60 }
1483};
1484
1485int
1486ahc_status_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
1487{
1488 return (ahc_print_register(STATUS_2840_parse_table, 4, "STATUS_2840",
1489 0xc1, regvalue, cur_col, wrap));
1490}
1491
1492int
1493ahc_scb_64_btt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1494{
1495 return (ahc_print_register(NULL, 0, "SCB_64_BTT",
1496 0xd0, regvalue, cur_col, wrap));
1497}
1498
1499int
1500ahc_cchaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1501{
1502 return (ahc_print_register(NULL, 0, "CCHADDR",
1503 0xe0, regvalue, cur_col, wrap));
1504}
1505
1506int
1507ahc_cchcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1508{
1509 return (ahc_print_register(NULL, 0, "CCHCNT",
1510 0xe8, regvalue, cur_col, wrap));
1511}
1512
1513int
1514ahc_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1515{
1516 return (ahc_print_register(NULL, 0, "CCSGRAM",
1517 0xe9, regvalue, cur_col, wrap));
1518}
1519
1520int
1521ahc_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1522{
1523 return (ahc_print_register(NULL, 0, "CCSGADDR",
1524 0xea, regvalue, cur_col, wrap));
1525}
1526
1527static ahc_reg_parse_entry_t CCSGCTL_parse_table[] = {
1528 { "CCSGRESET", 0x01, 0x01 },
1529 { "SG_FETCH_NEEDED", 0x02, 0x02 },
1530 { "CCSGEN", 0x08, 0x08 },
1531 { "CCSGDONE", 0x80, 0x80 }
1532};
1533
1534int
1535ahc_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1536{
1537 return (ahc_print_register(CCSGCTL_parse_table, 4, "CCSGCTL",
1538 0xeb, regvalue, cur_col, wrap));
1539}
1540
1541int
1542ahc_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1543{
1544 return (ahc_print_register(NULL, 0, "CCSCBRAM",
1545 0xec, regvalue, cur_col, wrap));
1546}
1547
1548int
1549ahc_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1550{
1551 return (ahc_print_register(NULL, 0, "CCSCBADDR",
1552 0xed, regvalue, cur_col, wrap));
1553}
1554
1555static ahc_reg_parse_entry_t CCSCBCTL_parse_table[] = {
1556 { "CCSCBRESET", 0x01, 0x01 },
1557 { "CCSCBDIR", 0x04, 0x04 },
1558 { "CCSCBEN", 0x08, 0x08 },
1559 { "CCARREN", 0x10, 0x10 },
1560 { "ARRDONE", 0x40, 0x40 },
1561 { "CCSCBDONE", 0x80, 0x80 }
1562};
1563
1564int
1565ahc_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1566{
1567 return (ahc_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
1568 0xee, regvalue, cur_col, wrap));
1569}
1570
1571int
1572ahc_ccscbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1573{
1574 return (ahc_print_register(NULL, 0, "CCSCBCNT",
1575 0xef, regvalue, cur_col, wrap));
1576}
1577
1578int
1579ahc_scbbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1580{
1581 return (ahc_print_register(NULL, 0, "SCBBADDR",
1582 0xf0, regvalue, cur_col, wrap));
1583}
1584
1585int
1586ahc_ccscbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1587{
1588 return (ahc_print_register(NULL, 0, "CCSCBPTR",
1589 0xf1, regvalue, cur_col, wrap));
1590}
1591
1592int
1593ahc_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
1594{
1595 return (ahc_print_register(NULL, 0, "HNSCB_QOFF",
1596 0xf4, regvalue, cur_col, wrap));
1597}
1598
1599int
1600ahc_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
1601{
1602 return (ahc_print_register(NULL, 0, "SNSCB_QOFF",
1603 0xf6, regvalue, cur_col, wrap));
1604}
1605
1606int
1607ahc_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
1608{
1609 return (ahc_print_register(NULL, 0, "SDSCB_QOFF",
1610 0xf8, regvalue, cur_col, wrap));
1611}
1612
1613static ahc_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
1614 { "SDSCB_ROLLOVER", 0x10, 0x10 },
1615 { "SNSCB_ROLLOVER", 0x20, 0x20 },
1616 { "SCB_AVAIL", 0x40, 0x40 },
1617 { "SCB_QSIZE_256", 0x06, 0x06 },
1618 { "SCB_QSIZE", 0x07, 0x07 }
1619};
1620
1621int
1622ahc_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
1623{
1624 return (ahc_print_register(QOFF_CTLSTA_parse_table, 5, "QOFF_CTLSTA",
1625 0xfa, regvalue, cur_col, wrap));
1626}
1627
1628static ahc_reg_parse_entry_t DFF_THRSH_parse_table[] = {
1629 { "RD_DFTHRSH_MIN", 0x00, 0x00 },
1630 { "WR_DFTHRSH_MIN", 0x00, 0x00 },
1631 { "RD_DFTHRSH_25", 0x01, 0x01 },
1632 { "RD_DFTHRSH_50", 0x02, 0x02 },
1633 { "RD_DFTHRSH_63", 0x03, 0x03 },
1634 { "RD_DFTHRSH_75", 0x04, 0x04 },
1635 { "RD_DFTHRSH_85", 0x05, 0x05 },
1636 { "RD_DFTHRSH_90", 0x06, 0x06 },
1637 { "RD_DFTHRSH", 0x07, 0x07 },
1638 { "RD_DFTHRSH_MAX", 0x07, 0x07 },
1639 { "WR_DFTHRSH_25", 0x10, 0x10 },
1640 { "WR_DFTHRSH_50", 0x20, 0x20 },
1641 { "WR_DFTHRSH_63", 0x30, 0x30 },
1642 { "WR_DFTHRSH_75", 0x40, 0x40 },
1643 { "WR_DFTHRSH_85", 0x50, 0x50 },
1644 { "WR_DFTHRSH_90", 0x60, 0x60 },
1645 { "WR_DFTHRSH", 0x70, 0x70 },
1646 { "WR_DFTHRSH_MAX", 0x70, 0x70 }
1647};
1648
1649int
1650ahc_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
1651{
1652 return (ahc_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
1653 0xfb, regvalue, cur_col, wrap));
1654}
1655
1656static ahc_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
1657 { "LAST_SEG_DONE", 0x01, 0x01 },
1658 { "LAST_SEG", 0x02, 0x02 },
1659 { "SG_ADDR_MASK", 0xf8, 0xf8 }
1660};
1661
1662int
1663ahc_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
1664{
1665 return (ahc_print_register(SG_CACHE_SHADOW_parse_table, 3, "SG_CACHE_SHADOW",
1666 0xfc, regvalue, cur_col, wrap));
1667}
1668
1669static ahc_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
1670 { "LAST_SEG_DONE", 0x01, 0x01 },
1671 { "LAST_SEG", 0x02, 0x02 },
1672 { "SG_ADDR_MASK", 0xf8, 0xf8 }
1673};
1674
1675int
1676ahc_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
1677{
1678 return (ahc_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
1679 0xfc, regvalue, cur_col, wrap));
1680}
1681