| Stefan Roese | ab9367e | 2007-02-12 11:29:04 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/ppc/platforms/4xx/taishan.h |
| 3 | * |
| 4 | * AMCC Taishan board definitions |
| 5 | * |
| 6 | * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #ifdef __KERNEL__ |
| 16 | #ifndef __ASM_TAISHAN_H__ |
| 17 | #define __ASM_TAISHAN_H__ |
| 18 | |
| 19 | #include <platforms/4xx/ibm440gx.h> |
| 20 | |
| 21 | /* External timer clock frequency */ |
| 22 | #define TAISHAN_TMR_CLK 25000000 |
| 23 | |
| 24 | /* Flash */ |
| 25 | #define TAISHAN_FPGA_ADDR 0x0000000141000000ULL |
| 26 | #define TAISHAN_LCM_ADDR 0x0000000142000000ULL |
| 27 | #define TAISHAN_FLASH_ADDR 0x00000001fc000000ULL |
| 28 | #define TAISHAN_FLASH_SIZE 0x4000000 |
| 29 | |
| 30 | /* |
| 31 | * Serial port defines |
| 32 | */ |
| 33 | #define RS_TABLE_SIZE 2 |
| 34 | |
| 35 | /* head_44x.S created UART mapping, used before early_serial_setup. |
| 36 | * We cannot use default OpenBIOS UART mappings because they |
| 37 | * don't work for configurations with more than 512M RAM. --ebs |
| 38 | */ |
| 39 | #define UART0_IO_BASE 0xF0000200 |
| 40 | #define UART1_IO_BASE 0xF0000300 |
| 41 | |
| 42 | #define BASE_BAUD 11059200/16 |
| 43 | #define STD_UART_OP(num) \ |
| 44 | { 0, BASE_BAUD, 0, UART##num##_INT, \ |
| 45 | (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ |
| 46 | iomem_base: (void*)UART##num##_IO_BASE, \ |
| 47 | io_type: SERIAL_IO_MEM}, |
| 48 | |
| 49 | #define SERIAL_PORT_DFNS \ |
| 50 | STD_UART_OP(0) \ |
| 51 | STD_UART_OP(1) |
| 52 | |
| 53 | /* PCI support */ |
| 54 | #define TAISHAN_PCI_LOWER_IO 0x00000000 |
| 55 | #define TAISHAN_PCI_UPPER_IO 0x0000ffff |
| 56 | #define TAISHAN_PCI_LOWER_MEM 0x80000000 |
| 57 | #define TAISHAN_PCI_UPPER_MEM 0xffffefff |
| 58 | |
| 59 | #define TAISHAN_PCI_CFGA_PLB32 0x0ec00000 |
| 60 | #define TAISHAN_PCI_CFGD_PLB32 0x0ec00004 |
| 61 | |
| 62 | #define TAISHAN_PCI_IO_BASE 0x0000000208000000ULL |
| 63 | #define TAISHAN_PCI_IO_SIZE 0x00010000 |
| 64 | #define TAISHAN_PCI_MEM_OFFSET 0x00000000 |
| 65 | |
| 66 | #endif /* __ASM_TAISHAN_H__ */ |
| 67 | #endif /* __KERNEL__ */ |