Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Architecture- / platform-specific boot-time initialization code for |
| 3 | * IBM PowerPC 4xx based boards. Adapted from original |
| 4 | * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek |
| 5 | * <dan@net4x.com>. |
| 6 | * |
| 7 | * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu> |
| 8 | * |
| 9 | * 2002 (c) MontaVista, Software, Inc. This file is licensed under |
| 10 | * the terms of the GNU General Public License version 2. This program |
| 11 | * is licensed "as is" without any warranty of any kind, whether express |
| 12 | * or implied. |
| 13 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/init.h> |
| 15 | #include <linux/smp.h> |
| 16 | #include <linux/threads.h> |
| 17 | #include <linux/param.h> |
| 18 | #include <linux/string.h> |
| 19 | #include <linux/pci.h> |
| 20 | #include <linux/rtc.h> |
| 21 | |
| 22 | #include <asm/system.h> |
| 23 | #include <asm/pci-bridge.h> |
| 24 | #include <asm/machdep.h> |
| 25 | #include <asm/page.h> |
| 26 | #include <asm/time.h> |
| 27 | #include <asm/io.h> |
| 28 | #include <asm/ocp.h> |
| 29 | #include <asm/ibm_ocp_pci.h> |
| 30 | #include <asm/todc.h> |
| 31 | |
| 32 | #undef DEBUG |
| 33 | |
| 34 | #ifdef DEBUG |
| 35 | #define DBG(x...) printk(x) |
| 36 | #else |
| 37 | #define DBG(x...) |
| 38 | #endif |
| 39 | |
| 40 | void *kb_cs; |
| 41 | void *kb_data; |
| 42 | void *walnut_rtc_base; |
| 43 | |
| 44 | /* Some IRQs unique to Walnut. |
| 45 | * Used by the generic 405 PCI setup functions in ppc4xx_pci.c |
| 46 | */ |
| 47 | int __init |
| 48 | ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) |
| 49 | { |
| 50 | static char pci_irq_table[][4] = |
| 51 | /* |
| 52 | * PCI IDSEL/INTPIN->INTLINE |
| 53 | * A B C D |
| 54 | */ |
| 55 | { |
| 56 | {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */ |
| 57 | {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */ |
| 58 | {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */ |
| 59 | {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */ |
| 60 | }; |
| 61 | |
| 62 | const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; |
| 63 | return PCI_IRQ_TABLE_LOOKUP; |
| 64 | }; |
| 65 | |
| 66 | void __init |
| 67 | walnut_setup_arch(void) |
| 68 | { |
| 69 | |
| 70 | void *fpga_brdc; |
| 71 | unsigned char fpga_brdc_data; |
| 72 | void *fpga_enable; |
| 73 | void *fpga_polarity; |
| 74 | void *fpga_status; |
| 75 | void *fpga_trigger; |
| 76 | |
| 77 | ppc4xx_setup_arch(); |
| 78 | |
| 79 | ibm_ocp_set_emac(0, 0); |
| 80 | |
| 81 | kb_data = ioremap(WALNUT_PS2_BASE, 8); |
| 82 | if (!kb_data) { |
| 83 | printk(KERN_CRIT |
| 84 | "walnut_setup_arch() kb_data ioremap failed\n"); |
| 85 | return; |
| 86 | } |
| 87 | |
| 88 | kb_cs = kb_data + 1; |
| 89 | |
Matt Porter | 3e9e7c1 | 2005-11-07 00:58:15 -0800 | [diff] [blame] | 90 | fpga_status = ioremap(PPC40x_FPGA_BASE, 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | if (!fpga_status) { |
| 92 | printk(KERN_CRIT |
| 93 | "walnut_setup_arch() fpga_status ioremap failed\n"); |
| 94 | return; |
| 95 | } |
| 96 | |
| 97 | fpga_enable = fpga_status + 1; |
| 98 | fpga_polarity = fpga_status + 2; |
| 99 | fpga_trigger = fpga_status + 3; |
| 100 | fpga_brdc = fpga_status + 4; |
| 101 | |
| 102 | /* split the keyboard and mouse interrupts */ |
| 103 | fpga_brdc_data = readb(fpga_brdc); |
| 104 | fpga_brdc_data |= 0x80; |
| 105 | writeb(fpga_brdc_data, fpga_brdc); |
| 106 | |
| 107 | writeb(0x3, fpga_enable); |
| 108 | |
| 109 | writeb(0x3, fpga_polarity); |
| 110 | |
| 111 | writeb(0x3, fpga_trigger); |
| 112 | |
| 113 | /* RTC step for the walnut */ |
| 114 | walnut_rtc_base = (void *) WALNUT_RTC_VADDR; |
| 115 | TODC_INIT(TODC_TYPE_DS1743, walnut_rtc_base, walnut_rtc_base, |
| 116 | walnut_rtc_base, 8); |
| 117 | /* Identify the system */ |
| 118 | printk("IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)\n"); |
| 119 | } |
| 120 | |
| 121 | void __init |
| 122 | bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) |
| 123 | { |
| 124 | #ifdef CONFIG_PCI |
| 125 | unsigned int bar_response, bar; |
| 126 | /* |
| 127 | * Expected PCI mapping: |
| 128 | * |
| 129 | * PLB addr PCI memory addr |
| 130 | * --------------------- --------------------- |
| 131 | * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff |
| 132 | * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff |
| 133 | * |
| 134 | * PLB addr PCI io addr |
| 135 | * --------------------- --------------------- |
| 136 | * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 |
| 137 | * |
| 138 | * The following code is simplified by assuming that the bootrom |
| 139 | * has been well behaved in following this mapping. |
| 140 | */ |
| 141 | |
| 142 | #ifdef DEBUG |
| 143 | int i; |
| 144 | |
| 145 | printk("ioremap PCLIO_BASE = 0x%x\n", pcip); |
| 146 | printk("PCI bridge regs before fixup \n"); |
| 147 | for (i = 0; i <= 3; i++) { |
| 148 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); |
| 149 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); |
| 150 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); |
| 151 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); |
| 152 | } |
| 153 | printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); |
| 154 | printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); |
| 155 | printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); |
| 156 | printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); |
| 157 | |
| 158 | #endif |
| 159 | |
| 160 | /* added for IBM boot rom version 1.15 bios bar changes -AK */ |
| 161 | |
| 162 | /* Disable region first */ |
| 163 | out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); |
| 164 | /* PLB starting addr, PCI: 0x80000000 */ |
| 165 | out_le32((void *) &(pcip->pmm[0].la), 0x80000000); |
| 166 | /* PCI start addr, 0x80000000 */ |
| 167 | out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); |
| 168 | /* 512MB range of PLB to PCI */ |
| 169 | out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); |
| 170 | /* Enable no pre-fetch, enable region */ |
| 171 | out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - |
| 172 | (PPC405_PCI_UPPER_MEM - |
| 173 | PPC405_PCI_MEM_BASE)) | 0x01)); |
| 174 | |
| 175 | /* Disable region one */ |
| 176 | out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); |
| 177 | out_le32((void *) &(pcip->pmm[1].la), 0x00000000); |
| 178 | out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); |
| 179 | out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); |
| 180 | out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); |
| 181 | out_le32((void *) &(pcip->ptm1ms), 0x00000000); |
| 182 | |
| 183 | /* Disable region two */ |
| 184 | out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); |
| 185 | out_le32((void *) &(pcip->pmm[2].la), 0x00000000); |
| 186 | out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); |
| 187 | out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); |
| 188 | out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); |
| 189 | out_le32((void *) &(pcip->ptm2ms), 0x00000000); |
| 190 | |
| 191 | /* Zero config bars */ |
| 192 | for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { |
| 193 | early_write_config_dword(hose, hose->first_busno, |
| 194 | PCI_FUNC(hose->first_busno), bar, |
| 195 | 0x00000000); |
| 196 | early_read_config_dword(hose, hose->first_busno, |
| 197 | PCI_FUNC(hose->first_busno), bar, |
| 198 | &bar_response); |
| 199 | DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", |
| 200 | hose->first_busno, PCI_SLOT(hose->first_busno), |
| 201 | PCI_FUNC(hose->first_busno), bar, bar_response); |
| 202 | } |
Simon Arlott | a8de5ce | 2007-05-12 05:42:54 +1000 | [diff] [blame^] | 203 | /* end work around */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | |
| 205 | #ifdef DEBUG |
| 206 | printk("PCI bridge regs after fixup \n"); |
| 207 | for (i = 0; i <= 3; i++) { |
| 208 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); |
| 209 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); |
| 210 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); |
| 211 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); |
| 212 | } |
| 213 | printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); |
| 214 | printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); |
| 215 | printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); |
| 216 | printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); |
| 217 | |
| 218 | #endif |
| 219 | #endif |
| 220 | } |
| 221 | |
| 222 | void __init |
| 223 | walnut_map_io(void) |
| 224 | { |
| 225 | ppc4xx_map_io(); |
| 226 | io_block_mapping(WALNUT_RTC_VADDR, |
| 227 | WALNUT_RTC_PADDR, WALNUT_RTC_SIZE, _PAGE_IO); |
| 228 | } |
| 229 | |
| 230 | void __init |
| 231 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, |
| 232 | unsigned long r6, unsigned long r7) |
| 233 | { |
| 234 | ppc4xx_init(r3, r4, r5, r6, r7); |
| 235 | |
| 236 | ppc_md.setup_arch = walnut_setup_arch; |
| 237 | ppc_md.setup_io_mappings = walnut_map_io; |
| 238 | |
| 239 | #ifdef CONFIG_GEN_RTC |
| 240 | ppc_md.time_init = todc_time_init; |
| 241 | ppc_md.set_rtc_time = todc_set_rtc_time; |
| 242 | ppc_md.get_rtc_time = todc_get_rtc_time; |
| 243 | ppc_md.nvram_read_val = todc_direct_read_val; |
| 244 | ppc_md.nvram_write_val = todc_direct_write_val; |
| 245 | #endif |
| 246 | } |