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Wai Yew CHAY8cc72362009-05-14 08:05:58 +02001/**
2 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
3 *
4 * This source file is released under GPL v2 license (no other versions).
5 * See the COPYING file included in the main directory of this source
6 * distribution for the license terms and conditions.
7 *
8 * @File cthardware.h
9 *
10 * @Brief
11 * This file contains the definition of hardware access methord.
12 *
13 * @Author Liu Chun
14 * @Date May 13 2008
15 *
16 */
17
18#ifndef CTHARDWARE_H
19#define CTHARDWARE_H
20
21#include <linux/types.h>
22#include <linux/pci.h>
23
24enum CHIPTYP {
25 ATC20K1,
26 ATC20K2,
27 ATCNONE
28};
29
Takashi Iwai94701952009-06-08 18:10:32 +020030enum CTCARDS {
31 /* 20k1 models */
32 CTSB055X,
Takashi Iwaia8f43102009-06-22 07:36:52 +020033 CT20K1_MODEL_FIRST = CTSB055X,
Takashi Iwai94701952009-06-08 18:10:32 +020034 CTSB073X,
35 CTUAA,
36 CT20K1_UNKNOWN,
37 /* 20k2 models */
38 CTSB0760,
Takashi Iwaia8f43102009-06-22 07:36:52 +020039 CT20K2_MODEL_FIRST = CTSB0760,
Takashi Iwai94701952009-06-08 18:10:32 +020040 CTHENDRIX,
41 CTSB0880,
Takashi Iwaia8f43102009-06-22 07:36:52 +020042 CT20K2_UNKNOWN,
Takashi Iwai94701952009-06-08 18:10:32 +020043 NUM_CTCARDS /* This should always be the last */
44};
45
Wai Yew CHAY8cc72362009-05-14 08:05:58 +020046/* Type of input source for ADC */
47enum ADCSRC{
48 ADC_MICIN,
49 ADC_LINEIN,
50 ADC_VIDEO,
51 ADC_AUX,
52 ADC_NONE /* Switch to digital input */
53};
54
55struct card_conf {
56 /* device virtual mem page table page physical addr
57 * (supporting one page table page now) */
58 unsigned long vm_pgt_phys;
59 unsigned int rsr; /* reference sample rate in Hzs*/
60 unsigned int msr; /* master sample rate in rsrs */
61};
62
63struct hw {
64 int (*card_init)(struct hw *hw, struct card_conf *info);
65 int (*card_stop)(struct hw *hw);
66 int (*pll_init)(struct hw *hw, unsigned int rsr);
Wai Yew CHAY8cc72362009-05-14 08:05:58 +020067 int (*is_adc_source_selected)(struct hw *hw, enum ADCSRC source);
68 int (*select_adc_source)(struct hw *hw, enum ADCSRC source);
69 int (*have_digit_io_switch)(struct hw *hw);
70
71 /* SRC operations */
72 int (*src_rsc_get_ctrl_blk)(void **rblk);
73 int (*src_rsc_put_ctrl_blk)(void *blk);
74 int (*src_set_state)(void *blk, unsigned int state);
75 int (*src_set_bm)(void *blk, unsigned int bm);
76 int (*src_set_rsr)(void *blk, unsigned int rsr);
77 int (*src_set_sf)(void *blk, unsigned int sf);
78 int (*src_set_wr)(void *blk, unsigned int wr);
79 int (*src_set_pm)(void *blk, unsigned int pm);
80 int (*src_set_rom)(void *blk, unsigned int rom);
81 int (*src_set_vo)(void *blk, unsigned int vo);
82 int (*src_set_st)(void *blk, unsigned int st);
83 int (*src_set_ie)(void *blk, unsigned int ie);
84 int (*src_set_ilsz)(void *blk, unsigned int ilsz);
85 int (*src_set_bp)(void *blk, unsigned int bp);
86 int (*src_set_cisz)(void *blk, unsigned int cisz);
87 int (*src_set_ca)(void *blk, unsigned int ca);
88 int (*src_set_sa)(void *blk, unsigned int sa);
89 int (*src_set_la)(void *blk, unsigned int la);
90 int (*src_set_pitch)(void *blk, unsigned int pitch);
91 int (*src_set_clear_zbufs)(void *blk, unsigned int clear);
92 int (*src_set_dirty)(void *blk, unsigned int flags);
93 int (*src_set_dirty_all)(void *blk);
94 int (*src_commit_write)(struct hw *hw, unsigned int idx, void *blk);
95 int (*src_get_ca)(struct hw *hw, unsigned int idx, void *blk);
96 unsigned int (*src_get_dirty)(void *blk);
97 unsigned int (*src_dirty_conj_mask)(void);
98 int (*src_mgr_get_ctrl_blk)(void **rblk);
99 int (*src_mgr_put_ctrl_blk)(void *blk);
100 /* syncly enable src @idx */
101 int (*src_mgr_enbs_src)(void *blk, unsigned int idx);
102 /* enable src @idx */
103 int (*src_mgr_enb_src)(void *blk, unsigned int idx);
104 /* disable src @idx */
105 int (*src_mgr_dsb_src)(void *blk, unsigned int idx);
106 int (*src_mgr_commit_write)(struct hw *hw, void *blk);
107
108 /* SRC Input Mapper operations */
109 int (*srcimp_mgr_get_ctrl_blk)(void **rblk);
110 int (*srcimp_mgr_put_ctrl_blk)(void *blk);
111 int (*srcimp_mgr_set_imaparc)(void *blk, unsigned int slot);
112 int (*srcimp_mgr_set_imapuser)(void *blk, unsigned int user);
113 int (*srcimp_mgr_set_imapnxt)(void *blk, unsigned int next);
114 int (*srcimp_mgr_set_imapaddr)(void *blk, unsigned int addr);
115 int (*srcimp_mgr_commit_write)(struct hw *hw, void *blk);
116
117 /* AMIXER operations */
118 int (*amixer_rsc_get_ctrl_blk)(void **rblk);
119 int (*amixer_rsc_put_ctrl_blk)(void *blk);
120 int (*amixer_mgr_get_ctrl_blk)(void **rblk);
121 int (*amixer_mgr_put_ctrl_blk)(void *blk);
122 int (*amixer_set_mode)(void *blk, unsigned int mode);
123 int (*amixer_set_iv)(void *blk, unsigned int iv);
124 int (*amixer_set_x)(void *blk, unsigned int x);
125 int (*amixer_set_y)(void *blk, unsigned int y);
126 int (*amixer_set_sadr)(void *blk, unsigned int sadr);
127 int (*amixer_set_se)(void *blk, unsigned int se);
128 int (*amixer_set_dirty)(void *blk, unsigned int flags);
129 int (*amixer_set_dirty_all)(void *blk);
130 int (*amixer_commit_write)(struct hw *hw, unsigned int idx, void *blk);
131 int (*amixer_get_y)(void *blk);
132 unsigned int (*amixer_get_dirty)(void *blk);
133
134 /* DAIO operations */
135 int (*dai_get_ctrl_blk)(void **rblk);
136 int (*dai_put_ctrl_blk)(void *blk);
137 int (*dai_srt_set_srco)(void *blk, unsigned int src);
138 int (*dai_srt_set_srcm)(void *blk, unsigned int src);
139 int (*dai_srt_set_rsr)(void *blk, unsigned int rsr);
140 int (*dai_srt_set_drat)(void *blk, unsigned int drat);
141 int (*dai_srt_set_ec)(void *blk, unsigned int ec);
142 int (*dai_srt_set_et)(void *blk, unsigned int et);
143 int (*dai_commit_write)(struct hw *hw, unsigned int idx, void *blk);
144 int (*dao_get_ctrl_blk)(void **rblk);
145 int (*dao_put_ctrl_blk)(void *blk);
146 int (*dao_set_spos)(void *blk, unsigned int spos);
147 int (*dao_commit_write)(struct hw *hw, unsigned int idx, void *blk);
148 int (*dao_get_spos)(void *blk, unsigned int *spos);
149
150 int (*daio_mgr_get_ctrl_blk)(struct hw *hw, void **rblk);
151 int (*daio_mgr_put_ctrl_blk)(void *blk);
152 int (*daio_mgr_enb_dai)(void *blk, unsigned int idx);
153 int (*daio_mgr_dsb_dai)(void *blk, unsigned int idx);
154 int (*daio_mgr_enb_dao)(void *blk, unsigned int idx);
155 int (*daio_mgr_dsb_dao)(void *blk, unsigned int idx);
156 int (*daio_mgr_dao_init)(void *blk, unsigned int idx,
157 unsigned int conf);
158 int (*daio_mgr_set_imaparc)(void *blk, unsigned int slot);
159 int (*daio_mgr_set_imapnxt)(void *blk, unsigned int next);
160 int (*daio_mgr_set_imapaddr)(void *blk, unsigned int addr);
161 int (*daio_mgr_commit_write)(struct hw *hw, void *blk);
162
Takashi Iwaib7bbf872009-06-05 16:11:07 +0200163 int (*set_timer_irq)(struct hw *hw, int enable);
164 int (*set_timer_tick)(struct hw *hw, unsigned int tick);
Takashi Iwai54de6bc2009-06-08 10:21:07 +0200165 unsigned int (*get_wc)(struct hw *hw);
Takashi Iwaib7bbf872009-06-05 16:11:07 +0200166
167 void (*irq_callback)(void *data, unsigned int bit);
168 void *irq_callback_data;
169
Wai Yew CHAY8cc72362009-05-14 08:05:58 +0200170 struct pci_dev *pci; /* the pci kernel structure of this card */
171 int irq;
172 unsigned long io_base;
173 unsigned long mem_base;
Takashi Iwai94701952009-06-08 18:10:32 +0200174
175 enum CHIPTYP chip_type;
176 enum CTCARDS model;
Wai Yew CHAY8cc72362009-05-14 08:05:58 +0200177};
178
Takashi Iwai94701952009-06-08 18:10:32 +0200179int create_hw_obj(struct pci_dev *pci, enum CHIPTYP chip_type,
180 enum CTCARDS model, struct hw **rhw);
Wai Yew CHAY8cc72362009-05-14 08:05:58 +0200181int destroy_hw_obj(struct hw *hw);
182
183unsigned int get_field(unsigned int data, unsigned int field);
184void set_field(unsigned int *data, unsigned int field, unsigned int value);
185
Takashi Iwaib7bbf872009-06-05 16:11:07 +0200186/* IRQ bits */
187#define PLL_INT (1 << 10) /* PLL input-clock out-of-range */
188#define FI_INT (1 << 9) /* forced interrupt */
189#define IT_INT (1 << 8) /* timer interrupt */
190#define PCI_INT (1 << 7) /* PCI bus error pending */
191#define URT_INT (1 << 6) /* UART Tx/Rx */
192#define GPI_INT (1 << 5) /* GPI pin */
193#define MIX_INT (1 << 4) /* mixer parameter segment FIFO channels */
194#define DAI_INT (1 << 3) /* DAI (SR-tracker or SPDIF-receiver) */
195#define TP_INT (1 << 2) /* transport priority queue */
196#define DSP_INT (1 << 1) /* DSP */
197#define SRC_INT (1 << 0) /* SRC channels */
198
Wai Yew CHAY8cc72362009-05-14 08:05:58 +0200199#endif /* CTHARDWARE_H */