Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap3isp.h |
| 3 | * |
Laurent Pinchart | 78c66fb | 2015-05-20 04:08:30 -0300 | [diff] [blame] | 4 | * TI OMAP3 ISP - Bus Configuration |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 5 | * |
| 6 | * Copyright (C) 2011 Nokia Corporation |
| 7 | * |
| 8 | * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| 9 | * Sakari Ailus <sakari.ailus@iki.fi> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, but |
| 16 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 18 | * General Public License for more details. |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 19 | */ |
| 20 | |
Laurent Pinchart | 78c66fb | 2015-05-20 04:08:30 -0300 | [diff] [blame] | 21 | #ifndef __OMAP3ISP_H__ |
| 22 | #define __OMAP3ISP_H__ |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 23 | |
| 24 | enum isp_interface_type { |
| 25 | ISP_INTERFACE_PARALLEL, |
| 26 | ISP_INTERFACE_CSI2A_PHY2, |
| 27 | ISP_INTERFACE_CCP2B_PHY1, |
| 28 | ISP_INTERFACE_CCP2B_PHY2, |
| 29 | ISP_INTERFACE_CSI2C_PHY1, |
| 30 | }; |
| 31 | |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 32 | /** |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 33 | * struct isp_parallel_cfg - Parallel interface configuration |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 34 | * @data_lane_shift: Data lane shifter |
Laurent Pinchart | 78c66fb | 2015-05-20 04:08:30 -0300 | [diff] [blame] | 35 | * 0 - CAMEXT[13:0] -> CAM[13:0] |
Laurent Pinchart | 74d1e7c | 2015-12-29 12:03:19 -0200 | [diff] [blame] | 36 | * 2 - CAMEXT[13:2] -> CAM[11:0] |
| 37 | * 4 - CAMEXT[13:4] -> CAM[9:0] |
| 38 | * 6 - CAMEXT[13:6] -> CAM[7:0] |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 39 | * @clk_pol: Pixel clock polarity |
Laurent Pinchart | c1026c58 | 2011-11-16 16:59:05 -0300 | [diff] [blame] | 40 | * 0 - Sample on rising edge, 1 - Sample on falling edge |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 41 | * @hs_pol: Horizontal synchronization polarity |
| 42 | * 0 - Active high, 1 - Active low |
| 43 | * @vs_pol: Vertical synchronization polarity |
| 44 | * 0 - Active high, 1 - Active low |
Laurent Pinchart | 9a36d8e | 2014-05-19 16:37:38 -0300 | [diff] [blame] | 45 | * @fld_pol: Field signal polarity |
| 46 | * 0 - Positive, 1 - Negative |
Laurent Pinchart | 73ea57e | 2011-08-31 10:53:41 -0300 | [diff] [blame] | 47 | * @data_pol: Data polarity |
| 48 | * 0 - Normal, 1 - One's complement |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 49 | */ |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 50 | struct isp_parallel_cfg { |
Laurent Pinchart | 74d1e7c | 2015-12-29 12:03:19 -0200 | [diff] [blame] | 51 | unsigned int data_lane_shift:3; |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 52 | unsigned int clk_pol:1; |
| 53 | unsigned int hs_pol:1; |
| 54 | unsigned int vs_pol:1; |
Laurent Pinchart | 9a36d8e | 2014-05-19 16:37:38 -0300 | [diff] [blame] | 55 | unsigned int fld_pol:1; |
Laurent Pinchart | 73ea57e | 2011-08-31 10:53:41 -0300 | [diff] [blame] | 56 | unsigned int data_pol:1; |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 57 | }; |
| 58 | |
| 59 | enum { |
| 60 | ISP_CCP2_PHY_DATA_CLOCK = 0, |
| 61 | ISP_CCP2_PHY_DATA_STROBE = 1, |
| 62 | }; |
| 63 | |
| 64 | enum { |
| 65 | ISP_CCP2_MODE_MIPI = 0, |
| 66 | ISP_CCP2_MODE_CCP2 = 1, |
| 67 | }; |
| 68 | |
| 69 | /** |
Sakari Ailus | fe6adc1 | 2011-10-10 14:13:26 -0300 | [diff] [blame] | 70 | * struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity |
| 71 | * @pos: position of the lane |
| 72 | * @pol: polarity of the lane |
| 73 | */ |
| 74 | struct isp_csiphy_lane { |
| 75 | u8 pos; |
| 76 | u8 pol; |
| 77 | }; |
| 78 | |
| 79 | #define ISP_CSIPHY1_NUM_DATA_LANES 1 |
| 80 | #define ISP_CSIPHY2_NUM_DATA_LANES 2 |
| 81 | |
| 82 | /** |
| 83 | * struct isp_csiphy_lanes_cfg - CCP2/CSI2 lane configuration |
| 84 | * @data: Configuration of one or two data lanes |
| 85 | * @clk: Clock lane configuration |
| 86 | */ |
| 87 | struct isp_csiphy_lanes_cfg { |
| 88 | struct isp_csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES]; |
| 89 | struct isp_csiphy_lane clk; |
| 90 | }; |
| 91 | |
| 92 | /** |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 93 | * struct isp_ccp2_cfg - CCP2 interface configuration |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 94 | * @strobe_clk_pol: Strobe/clock polarity |
| 95 | * 0 - Non Inverted, 1 - Inverted |
| 96 | * @crc: Enable the cyclic redundancy check |
| 97 | * @ccp2_mode: Enable CCP2 compatibility mode |
| 98 | * ISP_CCP2_MODE_MIPI - MIPI-CSI1 mode |
| 99 | * ISP_CCP2_MODE_CCP2 - CCP2 mode |
| 100 | * @phy_layer: Physical layer selection |
| 101 | * ISP_CCP2_PHY_DATA_CLOCK - Data/clock physical layer |
| 102 | * ISP_CCP2_PHY_DATA_STROBE - Data/strobe physical layer |
| 103 | * @vpclk_div: Video port output clock control |
| 104 | */ |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 105 | struct isp_ccp2_cfg { |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 106 | unsigned int strobe_clk_pol:1; |
| 107 | unsigned int crc:1; |
| 108 | unsigned int ccp2_mode:1; |
| 109 | unsigned int phy_layer:1; |
| 110 | unsigned int vpclk_div:2; |
Sakari Ailus | fe6adc1 | 2011-10-10 14:13:26 -0300 | [diff] [blame] | 111 | struct isp_csiphy_lanes_cfg lanecfg; |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 112 | }; |
| 113 | |
| 114 | /** |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 115 | * struct isp_csi2_cfg - CSI2 interface configuration |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 116 | * @crc: Enable the cyclic redundancy check |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 117 | */ |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 118 | struct isp_csi2_cfg { |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 119 | unsigned crc:1; |
Sakari Ailus | fe6adc1 | 2011-10-10 14:13:26 -0300 | [diff] [blame] | 120 | struct isp_csiphy_lanes_cfg lanecfg; |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 121 | }; |
| 122 | |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 123 | struct isp_bus_cfg { |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 124 | enum isp_interface_type interface; |
| 125 | union { |
Sakari Ailus | 68908747 | 2015-03-25 19:57:30 -0300 | [diff] [blame] | 126 | struct isp_parallel_cfg parallel; |
| 127 | struct isp_ccp2_cfg ccp2; |
| 128 | struct isp_csi2_cfg csi2; |
Laurent Pinchart | b98d32f | 2011-08-12 19:09:34 +0200 | [diff] [blame] | 129 | } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */ |
| 130 | }; |
| 131 | |
Laurent Pinchart | 78c66fb | 2015-05-20 04:08:30 -0300 | [diff] [blame] | 132 | #endif /* __OMAP3ISP_H__ */ |