Auke Kok | 9a799d7 | 2007-09-15 14:07:45 -0700 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel 10 Gigabit PCI Express Linux driver |
| 4 | Copyright(c) 1999 - 2007 Intel Corporation. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | Linux NICS <linux.nics@intel.com> |
| 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 26 | |
| 27 | *******************************************************************************/ |
| 28 | |
| 29 | #include <linux/pci.h> |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/sched.h> |
| 32 | |
| 33 | #include "ixgbe_type.h" |
| 34 | #include "ixgbe_common.h" |
| 35 | #include "ixgbe_phy.h" |
| 36 | |
| 37 | #define IXGBE_82598_MAX_TX_QUEUES 32 |
| 38 | #define IXGBE_82598_MAX_RX_QUEUES 64 |
| 39 | #define IXGBE_82598_RAR_ENTRIES 16 |
| 40 | |
| 41 | static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw); |
| 42 | static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed, |
| 43 | bool *autoneg); |
| 44 | static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw, |
| 45 | u32 *speed, bool *autoneg); |
| 46 | static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw); |
| 47 | static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw); |
| 48 | static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed, |
| 49 | bool *link_up); |
| 50 | static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed, |
| 51 | bool autoneg, |
| 52 | bool autoneg_wait_to_complete); |
| 53 | static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw); |
| 54 | static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed, |
| 55 | bool *link_up); |
| 56 | static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed, |
| 57 | bool autoneg, |
| 58 | bool autoneg_wait_to_complete); |
| 59 | static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw); |
| 60 | |
| 61 | |
| 62 | static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) |
| 63 | { |
| 64 | hw->mac.num_rx_queues = IXGBE_82598_MAX_TX_QUEUES; |
| 65 | hw->mac.num_tx_queues = IXGBE_82598_MAX_RX_QUEUES; |
| 66 | hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES; |
| 67 | |
| 68 | return 0; |
| 69 | } |
| 70 | |
| 71 | /** |
| 72 | * ixgbe_get_link_settings_82598 - Determines default link settings |
| 73 | * @hw: pointer to hardware structure |
| 74 | * @speed: pointer to link speed |
| 75 | * @autoneg: boolean auto-negotiation value |
| 76 | * |
| 77 | * Determines the default link settings by reading the AUTOC register. |
| 78 | **/ |
| 79 | static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed, |
| 80 | bool *autoneg) |
| 81 | { |
| 82 | s32 status = 0; |
| 83 | s32 autoc_reg; |
| 84 | |
| 85 | autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); |
| 86 | |
| 87 | if (hw->mac.link_settings_loaded) { |
| 88 | autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE; |
| 89 | autoc_reg &= ~IXGBE_AUTOC_LMS_MASK; |
| 90 | autoc_reg |= hw->mac.link_attach_type; |
| 91 | autoc_reg |= hw->mac.link_mode_select; |
| 92 | } |
| 93 | |
| 94 | switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) { |
| 95 | case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: |
| 96 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
| 97 | *autoneg = false; |
| 98 | break; |
| 99 | |
| 100 | case IXGBE_AUTOC_LMS_10G_LINK_NO_AN: |
| 101 | *speed = IXGBE_LINK_SPEED_10GB_FULL; |
| 102 | *autoneg = false; |
| 103 | break; |
| 104 | |
| 105 | case IXGBE_AUTOC_LMS_1G_AN: |
| 106 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
| 107 | *autoneg = true; |
| 108 | break; |
| 109 | |
| 110 | case IXGBE_AUTOC_LMS_KX4_AN: |
| 111 | case IXGBE_AUTOC_LMS_KX4_AN_1G_AN: |
| 112 | *speed = IXGBE_LINK_SPEED_UNKNOWN; |
| 113 | if (autoc_reg & IXGBE_AUTOC_KX4_SUPP) |
| 114 | *speed |= IXGBE_LINK_SPEED_10GB_FULL; |
| 115 | if (autoc_reg & IXGBE_AUTOC_KX_SUPP) |
| 116 | *speed |= IXGBE_LINK_SPEED_1GB_FULL; |
| 117 | *autoneg = true; |
| 118 | break; |
| 119 | |
| 120 | default: |
| 121 | status = IXGBE_ERR_LINK_SETUP; |
| 122 | break; |
| 123 | } |
| 124 | |
| 125 | return status; |
| 126 | } |
| 127 | |
| 128 | /** |
| 129 | * ixgbe_get_copper_link_settings_82598 - Determines default link settings |
| 130 | * @hw: pointer to hardware structure |
| 131 | * @speed: pointer to link speed |
| 132 | * @autoneg: boolean auto-negotiation value |
| 133 | * |
| 134 | * Determines the default link settings by reading the AUTOC register. |
| 135 | **/ |
| 136 | static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw, |
| 137 | u32 *speed, bool *autoneg) |
| 138 | { |
| 139 | s32 status = IXGBE_ERR_LINK_SETUP; |
| 140 | u16 speed_ability; |
| 141 | |
| 142 | *speed = 0; |
| 143 | *autoneg = true; |
| 144 | |
| 145 | status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY, |
| 146 | IXGBE_MDIO_PMA_PMD_DEV_TYPE, |
| 147 | &speed_ability); |
| 148 | |
| 149 | if (status == 0) { |
| 150 | if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G) |
| 151 | *speed |= IXGBE_LINK_SPEED_10GB_FULL; |
| 152 | if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G) |
| 153 | *speed |= IXGBE_LINK_SPEED_1GB_FULL; |
| 154 | } |
| 155 | |
| 156 | return status; |
| 157 | } |
| 158 | |
| 159 | /** |
| 160 | * ixgbe_get_media_type_82598 - Determines media type |
| 161 | * @hw: pointer to hardware structure |
| 162 | * |
| 163 | * Returns the media type (fiber, copper, backplane) |
| 164 | **/ |
| 165 | static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw) |
| 166 | { |
| 167 | enum ixgbe_media_type media_type; |
| 168 | |
| 169 | /* Media type for I82598 is based on device ID */ |
| 170 | switch (hw->device_id) { |
| 171 | case IXGBE_DEV_ID_82598AF_DUAL_PORT: |
| 172 | case IXGBE_DEV_ID_82598AF_SINGLE_PORT: |
| 173 | case IXGBE_DEV_ID_82598EB_CX4: |
| 174 | media_type = ixgbe_media_type_fiber; |
| 175 | break; |
| 176 | case IXGBE_DEV_ID_82598AT_DUAL_PORT: |
| 177 | media_type = ixgbe_media_type_copper; |
| 178 | break; |
| 179 | default: |
| 180 | media_type = ixgbe_media_type_unknown; |
| 181 | break; |
| 182 | } |
| 183 | |
| 184 | return media_type; |
| 185 | } |
| 186 | |
| 187 | /** |
| 188 | * ixgbe_setup_mac_link_82598 - Configures MAC link settings |
| 189 | * @hw: pointer to hardware structure |
| 190 | * |
| 191 | * Configures link settings based on values in the ixgbe_hw struct. |
| 192 | * Restarts the link. Performs autonegotiation if needed. |
| 193 | **/ |
| 194 | static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw) |
| 195 | { |
| 196 | u32 autoc_reg; |
| 197 | u32 links_reg; |
| 198 | u32 i; |
| 199 | s32 status = 0; |
| 200 | |
| 201 | autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); |
| 202 | |
| 203 | if (hw->mac.link_settings_loaded) { |
| 204 | autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE; |
| 205 | autoc_reg &= ~IXGBE_AUTOC_LMS_MASK; |
| 206 | autoc_reg |= hw->mac.link_attach_type; |
| 207 | autoc_reg |= hw->mac.link_mode_select; |
| 208 | |
| 209 | IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); |
| 210 | msleep(50); |
| 211 | } |
| 212 | |
| 213 | /* Restart link */ |
| 214 | autoc_reg |= IXGBE_AUTOC_AN_RESTART; |
| 215 | IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); |
| 216 | |
| 217 | /* Only poll for autoneg to complete if specified to do so */ |
| 218 | if (hw->phy.autoneg_wait_to_complete) { |
| 219 | if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN || |
| 220 | hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) { |
| 221 | links_reg = 0; /* Just in case Autoneg time = 0 */ |
| 222 | for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) { |
| 223 | links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); |
| 224 | if (links_reg & IXGBE_LINKS_KX_AN_COMP) |
| 225 | break; |
| 226 | msleep(100); |
| 227 | } |
| 228 | if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) { |
| 229 | status = IXGBE_ERR_AUTONEG_NOT_COMPLETE; |
| 230 | hw_dbg(hw, |
| 231 | "Autonegotiation did not complete.\n"); |
| 232 | } |
| 233 | } |
| 234 | } |
| 235 | |
| 236 | /* |
| 237 | * We want to save off the original Flow Control configuration just in |
| 238 | * case we get disconnected and then reconnected into a different hub |
| 239 | * or switch with different Flow Control capabilities. |
| 240 | */ |
| 241 | hw->fc.type = hw->fc.original_type; |
| 242 | ixgbe_setup_fc(hw, 0); |
| 243 | |
| 244 | /* Add delay to filter out noises during initial link setup */ |
| 245 | msleep(50); |
| 246 | |
| 247 | return status; |
| 248 | } |
| 249 | |
| 250 | /** |
| 251 | * ixgbe_check_mac_link_82598 - Get link/speed status |
| 252 | * @hw: pointer to hardware structure |
| 253 | * @speed: pointer to link speed |
| 254 | * @link_up: true is link is up, false otherwise |
| 255 | * |
| 256 | * Reads the links register to determine if link is up and the current speed |
| 257 | **/ |
| 258 | static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed, |
| 259 | bool *link_up) |
| 260 | { |
| 261 | u32 links_reg; |
| 262 | |
| 263 | links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); |
| 264 | |
| 265 | if (links_reg & IXGBE_LINKS_UP) |
| 266 | *link_up = true; |
| 267 | else |
| 268 | *link_up = false; |
| 269 | |
| 270 | if (links_reg & IXGBE_LINKS_SPEED) |
| 271 | *speed = IXGBE_LINK_SPEED_10GB_FULL; |
| 272 | else |
| 273 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
| 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | /** |
| 279 | * ixgbe_setup_mac_link_speed_82598 - Set MAC link speed |
| 280 | * @hw: pointer to hardware structure |
| 281 | * @speed: new link speed |
| 282 | * @autoneg: true if auto-negotiation enabled |
| 283 | * @autoneg_wait_to_complete: true if waiting is needed to complete |
| 284 | * |
| 285 | * Set the link speed in the AUTOC register and restarts link. |
| 286 | **/ |
| 287 | static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, |
| 288 | u32 speed, bool autoneg, |
| 289 | bool autoneg_wait_to_complete) |
| 290 | { |
| 291 | s32 status = 0; |
| 292 | |
| 293 | /* If speed is 10G, then check for CX4 or XAUI. */ |
| 294 | if ((speed == IXGBE_LINK_SPEED_10GB_FULL) && |
| 295 | (!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4))) |
| 296 | hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN; |
| 297 | else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg)) |
| 298 | hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN; |
| 299 | else if (autoneg) { |
| 300 | /* BX mode - Autonegotiate 1G */ |
| 301 | if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD)) |
| 302 | hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN; |
| 303 | else /* KX/KX4 mode */ |
| 304 | hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN; |
| 305 | } else { |
| 306 | status = IXGBE_ERR_LINK_SETUP; |
| 307 | } |
| 308 | |
| 309 | if (status == 0) { |
| 310 | hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete; |
| 311 | |
| 312 | hw->mac.link_settings_loaded = true; |
| 313 | /* |
| 314 | * Setup and restart the link based on the new values in |
| 315 | * ixgbe_hw This will write the AUTOC register based on the new |
| 316 | * stored values |
| 317 | */ |
| 318 | hw->phy.ops.setup(hw); |
| 319 | } |
| 320 | |
| 321 | return status; |
| 322 | } |
| 323 | |
| 324 | |
| 325 | /** |
| 326 | * ixgbe_setup_copper_link_82598 - Setup copper link settings |
| 327 | * @hw: pointer to hardware structure |
| 328 | * |
| 329 | * Configures link settings based on values in the ixgbe_hw struct. |
| 330 | * Restarts the link. Performs autonegotiation if needed. Restart |
| 331 | * phy and wait for autonegotiate to finish. Then synchronize the |
| 332 | * MAC and PHY. |
| 333 | **/ |
| 334 | static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw) |
| 335 | { |
| 336 | s32 status; |
| 337 | u32 speed = 0; |
| 338 | bool link_up = false; |
| 339 | |
| 340 | /* Set up MAC */ |
| 341 | hw->phy.ops.setup(hw); |
| 342 | |
| 343 | /* Restart autonegotiation on PHY */ |
| 344 | status = hw->phy.ops.setup(hw); |
| 345 | |
| 346 | /* Synchronize MAC to PHY speed */ |
| 347 | if (status == 0) |
| 348 | status = hw->phy.ops.check(hw, &speed, &link_up); |
| 349 | |
| 350 | return status; |
| 351 | } |
| 352 | |
| 353 | /** |
| 354 | * ixgbe_check_copper_link_82598 - Syncs MAC & PHY link settings |
| 355 | * @hw: pointer to hardware structure |
| 356 | * @speed: pointer to link speed |
| 357 | * @link_up: true if link is up, false otherwise |
| 358 | * |
| 359 | * Reads the mac link, phy link, and synchronizes the MAC to PHY. |
| 360 | **/ |
| 361 | static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed, |
| 362 | bool *link_up) |
| 363 | { |
| 364 | s32 status; |
| 365 | u32 phy_speed = 0; |
| 366 | bool phy_link = false; |
| 367 | |
| 368 | /* This is the speed and link the MAC is set at */ |
| 369 | hw->phy.ops.check(hw, speed, link_up); |
| 370 | |
| 371 | /* |
| 372 | * Check current speed and link status of the PHY register. |
| 373 | * This is a vendor specific register and may have to |
| 374 | * be changed for other copper PHYs. |
| 375 | */ |
| 376 | status = hw->phy.ops.check(hw, &phy_speed, &phy_link); |
| 377 | |
| 378 | if ((status == 0) && (phy_link)) { |
| 379 | /* |
| 380 | * Check current link status of the MACs link's register |
| 381 | * matches that of the speed in the PHY register |
| 382 | */ |
| 383 | if (*speed != phy_speed) { |
| 384 | /* |
| 385 | * The copper PHY requires 82598 attach type to be XAUI |
| 386 | * for 10G and BX for 1G |
| 387 | */ |
| 388 | hw->mac.link_attach_type = |
| 389 | (IXGBE_AUTOC_10G_XAUI | IXGBE_AUTOC_1G_BX); |
| 390 | |
| 391 | /* Synchronize the MAC speed to the PHY speed */ |
| 392 | status = hw->phy.ops.setup_speed(hw, phy_speed, false, |
| 393 | false); |
| 394 | if (status == 0) |
| 395 | hw->phy.ops.check(hw, speed, link_up); |
| 396 | else |
| 397 | status = IXGBE_ERR_LINK_SETUP; |
| 398 | } |
| 399 | } else { |
| 400 | *link_up = phy_link; |
| 401 | } |
| 402 | |
| 403 | return status; |
| 404 | } |
| 405 | |
| 406 | /** |
| 407 | * ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field |
| 408 | * @hw: pointer to hardware structure |
| 409 | * @speed: new link speed |
| 410 | * @autoneg: true if autonegotiation enabled |
| 411 | * @autoneg_wait_to_complete: true if waiting is needed to complete |
| 412 | * |
| 413 | * Sets the link speed in the AUTOC register in the MAC and restarts link. |
| 414 | **/ |
| 415 | static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed, |
| 416 | bool autoneg, |
| 417 | bool autoneg_wait_to_complete) |
| 418 | { |
| 419 | s32 status; |
| 420 | bool link_up = 0; |
| 421 | |
| 422 | /* Setup the PHY according to input speed */ |
| 423 | status = hw->phy.ops.setup_speed(hw, speed, autoneg, |
| 424 | autoneg_wait_to_complete); |
| 425 | |
| 426 | /* Synchronize MAC to PHY speed */ |
| 427 | if (status == 0) |
| 428 | status = hw->phy.ops.check(hw, &speed, &link_up); |
| 429 | |
| 430 | return status; |
| 431 | } |
| 432 | |
| 433 | /** |
| 434 | * ixgbe_reset_hw_82598 - Performs hardware reset |
| 435 | * @hw: pointer to hardware structure |
| 436 | * |
| 437 | * Resets the hardware by reseting the transmit and receive units, masks and |
| 438 | * clears all interrupts, performing a PHY reset, and performing a link (MAC) |
| 439 | * reset. |
| 440 | **/ |
| 441 | static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw) |
| 442 | { |
| 443 | s32 status = 0; |
| 444 | u32 ctrl; |
| 445 | u32 gheccr; |
| 446 | u32 i; |
| 447 | u32 autoc; |
| 448 | u8 analog_val; |
| 449 | |
| 450 | /* Call adapter stop to disable tx/rx and clear interrupts */ |
| 451 | ixgbe_stop_adapter(hw); |
| 452 | |
| 453 | /* |
| 454 | * Power up the Atlas TX lanes if they are currently powered down. |
| 455 | * Atlas TX lanes are powered down for MAC loopback tests, but |
| 456 | * they are not automatically restored on reset. |
| 457 | */ |
| 458 | ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val); |
| 459 | if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) { |
| 460 | /* Enable TX Atlas so packets can be transmitted again */ |
| 461 | ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val); |
| 462 | analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN; |
| 463 | ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, analog_val); |
| 464 | |
| 465 | ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &analog_val); |
| 466 | analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL; |
| 467 | ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, analog_val); |
| 468 | |
| 469 | ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &analog_val); |
| 470 | analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL; |
| 471 | ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, analog_val); |
| 472 | |
| 473 | ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &analog_val); |
| 474 | analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL; |
| 475 | ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, analog_val); |
| 476 | } |
| 477 | |
| 478 | /* Reset PHY */ |
| 479 | ixgbe_reset_phy(hw); |
| 480 | |
| 481 | /* |
| 482 | * Prevent the PCI-E bus from from hanging by disabling PCI-E master |
| 483 | * access and verify no pending requests before reset |
| 484 | */ |
| 485 | if (ixgbe_disable_pcie_master(hw) != 0) { |
| 486 | status = IXGBE_ERR_MASTER_REQUESTS_PENDING; |
| 487 | hw_dbg(hw, "PCI-E Master disable polling has failed.\n"); |
| 488 | } |
| 489 | |
| 490 | /* |
| 491 | * Issue global reset to the MAC. This needs to be a SW reset. |
| 492 | * If link reset is used, it might reset the MAC when mng is using it |
| 493 | */ |
| 494 | ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); |
| 495 | IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST)); |
| 496 | IXGBE_WRITE_FLUSH(hw); |
| 497 | |
| 498 | /* Poll for reset bit to self-clear indicating reset is complete */ |
| 499 | for (i = 0; i < 10; i++) { |
| 500 | udelay(1); |
| 501 | ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); |
| 502 | if (!(ctrl & IXGBE_CTRL_RST)) |
| 503 | break; |
| 504 | } |
| 505 | if (ctrl & IXGBE_CTRL_RST) { |
| 506 | status = IXGBE_ERR_RESET_FAILED; |
| 507 | hw_dbg(hw, "Reset polling failed to complete.\n"); |
| 508 | } |
| 509 | |
| 510 | msleep(50); |
| 511 | |
| 512 | gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR); |
| 513 | gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6)); |
| 514 | IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr); |
| 515 | |
| 516 | /* |
| 517 | * AUTOC register which stores link settings gets cleared |
| 518 | * and reloaded from EEPROM after reset. We need to restore |
| 519 | * our stored value from init in case SW changed the attach |
| 520 | * type or speed. If this is the first time and link settings |
| 521 | * have not been stored, store default settings from AUTOC. |
| 522 | */ |
| 523 | autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); |
| 524 | if (hw->mac.link_settings_loaded) { |
| 525 | autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE); |
| 526 | autoc &= ~(IXGBE_AUTOC_LMS_MASK); |
| 527 | autoc |= hw->mac.link_attach_type; |
| 528 | autoc |= hw->mac.link_mode_select; |
| 529 | IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); |
| 530 | } else { |
| 531 | hw->mac.link_attach_type = |
| 532 | (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE); |
| 533 | hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK); |
| 534 | hw->mac.link_settings_loaded = true; |
| 535 | } |
| 536 | |
| 537 | /* Store the permanent mac address */ |
| 538 | ixgbe_get_mac_addr(hw, hw->mac.perm_addr); |
| 539 | |
| 540 | return status; |
| 541 | } |
| 542 | |
| 543 | static struct ixgbe_mac_operations mac_ops_82598 = { |
| 544 | .reset = &ixgbe_reset_hw_82598, |
| 545 | .get_media_type = &ixgbe_get_media_type_82598, |
| 546 | }; |
| 547 | |
| 548 | static struct ixgbe_phy_operations phy_ops_82598EB = { |
| 549 | .setup = &ixgbe_setup_copper_link_82598, |
| 550 | .check = &ixgbe_check_copper_link_82598, |
| 551 | .setup_speed = &ixgbe_setup_copper_link_speed_82598, |
| 552 | .get_settings = &ixgbe_get_copper_link_settings_82598, |
| 553 | }; |
| 554 | |
| 555 | struct ixgbe_info ixgbe_82598EB_info = { |
| 556 | .mac = ixgbe_mac_82598EB, |
| 557 | .get_invariants = &ixgbe_get_invariants_82598, |
| 558 | .mac_ops = &mac_ops_82598, |
| 559 | .phy_ops = &phy_ops_82598EB, |
| 560 | }; |
| 561 | |
| 562 | static struct ixgbe_phy_operations phy_ops_82598AT = { |
| 563 | .setup = &ixgbe_setup_tnx_phy_link, |
| 564 | .check = &ixgbe_check_tnx_phy_link, |
| 565 | .setup_speed = &ixgbe_setup_tnx_phy_link_speed, |
| 566 | .get_settings = &ixgbe_get_copper_link_settings_82598, |
| 567 | }; |
| 568 | |
| 569 | struct ixgbe_info ixgbe_82598AT_info = { |
| 570 | .mac = ixgbe_mac_82598EB, |
| 571 | .get_invariants = &ixgbe_get_invariants_82598, |
| 572 | .mac_ops = &mac_ops_82598, |
| 573 | .phy_ops = &phy_ops_82598AT, |
| 574 | }; |
| 575 | |
| 576 | static struct ixgbe_phy_operations phy_ops_82598AF = { |
| 577 | .setup = &ixgbe_setup_mac_link_82598, |
| 578 | .check = &ixgbe_check_mac_link_82598, |
| 579 | .setup_speed = &ixgbe_setup_mac_link_speed_82598, |
| 580 | .get_settings = &ixgbe_get_link_settings_82598, |
| 581 | }; |
| 582 | |
| 583 | struct ixgbe_info ixgbe_82598AF_info = { |
| 584 | .mac = ixgbe_mac_82598EB, |
| 585 | .get_invariants = &ixgbe_get_invariants_82598, |
| 586 | .mac_ops = &mac_ops_82598, |
| 587 | .phy_ops = &phy_ops_82598AF, |
| 588 | }; |
| 589 | |