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Masakazu Mokuno02c18892007-07-05 20:11:16 +09001/*
2 * PS3 Platfom gelic network driver.
3 *
4 * Copyright (C) 2007 Sony Computer Entertainment Inc.
5 * Copyright 2006, 2007 Sony Corporation.
6 *
7 * This file is based on: spider_net.h
8 *
9 * (C) Copyright IBM Corp. 2005
10 *
11 * Authors : Utz Bacher <utz.bacher@de.ibm.com>
12 * Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28#ifndef _GELIC_NET_H
29#define _GELIC_NET_H
30
Masakazu Mokuno02c18892007-07-05 20:11:16 +090031/* descriptors */
32#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */
33#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */
34
Masakazu Mokunofe6d3a42007-07-20 17:39:25 +090035#define GELIC_NET_MAX_MTU VLAN_ETH_FRAME_LEN
36#define GELIC_NET_MIN_MTU VLAN_ETH_ZLEN
Masakazu Mokuno02c18892007-07-05 20:11:16 +090037#define GELIC_NET_RXBUF_ALIGN 128
38#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */
39#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ
40#define GELIC_NET_NAPI_WEIGHT (GELIC_NET_RX_DESCRIPTORS)
41#define GELIC_NET_BROADCAST_ADDR 0xffffffffffffL
42#define GELIC_NET_VLAN_POS (VLAN_ETH_ALEN * 2)
43#define GELIC_NET_VLAN_MAX 4
44#define GELIC_NET_MC_COUNT_MAX 32 /* multicast address list */
45
46enum gelic_net_int0_status {
47 GELIC_NET_GDTDCEINT = 24,
48 GELIC_NET_GRFANMINT = 28,
49};
50
51/* GHIINT1STS bits */
52enum gelic_net_int1_status {
53 GELIC_NET_GDADCEINT = 14,
54};
55
56/* interrupt mask */
57#define GELIC_NET_TXINT (1L << (GELIC_NET_GDTDCEINT + 32))
58
59#define GELIC_NET_RXINT0 (1L << (GELIC_NET_GRFANMINT + 32))
60#define GELIC_NET_RXINT1 (1L << GELIC_NET_GDADCEINT)
61#define GELIC_NET_RXINT (GELIC_NET_RXINT0 | GELIC_NET_RXINT1)
62
63 /* RX descriptor data_status bits */
64#define GELIC_NET_RXDMADU 0x80000000 /* destination MAC addr unknown */
65#define GELIC_NET_RXLSTFBF 0x40000000 /* last frame buffer */
66#define GELIC_NET_RXIPCHK 0x20000000 /* IP checksum performed */
67#define GELIC_NET_RXTCPCHK 0x10000000 /* TCP/UDP checksup performed */
68#define GELIC_NET_RXIPSPKT 0x08000000 /* IPsec packet */
69#define GELIC_NET_RXIPSAHPRT 0x04000000 /* IPsec AH protocol performed */
70#define GELIC_NET_RXIPSESPPRT 0x02000000 /* IPsec ESP protocol performed */
71#define GELIC_NET_RXSESPAH 0x01000000 /*
72 * IPsec ESP protocol auth
73 * performed
74 */
75
76#define GELIC_NET_RXWTPKT 0x00C00000 /*
77 * wakeup trigger packet
78 * 01: Magic Packet (TM)
79 * 10: ARP packet
80 * 11: Multicast MAC addr
81 */
82#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */
83/* bit 20..16 reserved */
Masakazu Mokunofe6d3a42007-07-20 17:39:25 +090084#define GELIC_NET_RXRRECNUM 0x0000ff00 /* reception receipt number */
85#define GELIC_NET_RXRRECNUM_SHIFT 8
Masakazu Mokuno02c18892007-07-05 20:11:16 +090086/* bit 7..0 reserved */
87
88#define GELIC_NET_TXDESC_TAIL 0
89#define GELIC_NET_DATA_STATUS_CHK_MASK (GELIC_NET_RXIPCHK | GELIC_NET_RXTCPCHK)
90
91/* RX descriptor data_error bits */
92/* bit 31 reserved */
93#define GELIC_NET_RXALNERR 0x40000000 /* alignement error 10/100M */
94#define GELIC_NET_RXOVERERR 0x20000000 /* oversize error */
95#define GELIC_NET_RXRNTERR 0x10000000 /* Runt error */
96#define GELIC_NET_RXIPCHKERR 0x08000000 /* IP checksum error */
97#define GELIC_NET_RXTCPCHKERR 0x04000000 /* TCP/UDP checksum error */
98#define GELIC_NET_RXUMCHSP 0x02000000 /* unmatched sp on sp */
99#define GELIC_NET_RXUMCHSPI 0x01000000 /* unmatched SPI on SAD */
100#define GELIC_NET_RXUMCHSAD 0x00800000 /* unmatched SAD */
101#define GELIC_NET_RXIPSAHERR 0x00400000 /* auth error on AH protocol
102 * processing */
103#define GELIC_NET_RXIPSESPAHERR 0x00200000 /* auth error on ESP protocol
104 * processing */
105#define GELIC_NET_RXDRPPKT 0x00100000 /* drop packet */
106#define GELIC_NET_RXIPFMTERR 0x00080000 /* IP packet format error */
107/* bit 18 reserved */
108#define GELIC_NET_RXDATAERR 0x00020000 /* IP packet format error */
109#define GELIC_NET_RXCALERR 0x00010000 /* cariier extension length
110 * error */
111#define GELIC_NET_RXCREXERR 0x00008000 /* carrier extention error */
112#define GELIC_NET_RXMLTCST 0x00004000 /* multicast address frame */
113/* bit 13..0 reserved */
114#define GELIC_NET_DATA_ERROR_CHK_MASK \
115 (GELIC_NET_RXIPCHKERR | GELIC_NET_RXTCPCHKERR)
116
117
118/* tx descriptor command and status */
119#define GELIC_NET_DMAC_CMDSTAT_NOCS 0xa0080000 /* middle of frame */
120#define GELIC_NET_DMAC_CMDSTAT_TCPCS 0xa00a0000
121#define GELIC_NET_DMAC_CMDSTAT_UDPCS 0xa00b0000
122#define GELIC_NET_DMAC_CMDSTAT_END_FRAME 0x00040000 /* end of frame */
123
124#define GELIC_NET_DMAC_CMDSTAT_RXDCEIS 0x00000002 /* descriptor chain end
125 * interrupt status */
126
127#define GELIC_NET_DMAC_CMDSTAT_CHAIN_END 0x00000002 /* RXDCEIS:DMA stopped */
Masakazu Mokuno02c18892007-07-05 20:11:16 +0900128#define GELIC_NET_DESCR_IND_PROC_SHIFT 28
129#define GELIC_NET_DESCR_IND_PROC_MASKO 0x0fffffff
130
131
132enum gelic_net_descr_status {
Masakazu Mokunofe6d3a42007-07-20 17:39:25 +0900133 GELIC_NET_DESCR_COMPLETE = 0x00, /* used in tx */
134 GELIC_NET_DESCR_BUFFER_FULL = 0x00, /* used in rx */
Masakazu Mokuno02c18892007-07-05 20:11:16 +0900135 GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
136 GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
137 GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */
138 GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
139 GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
Masakazu Mokunofe6d3a42007-07-20 17:39:25 +0900140 GELIC_NET_DESCR_NOT_IN_USE = 0x0b /* any other value */
Masakazu Mokuno02c18892007-07-05 20:11:16 +0900141};
142/* for lv1_net_control */
143#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001
144#define GELIC_NET_GET_ETH_PORT_STATUS 0x0000000000000002
145#define GELIC_NET_SET_NEGOTIATION_MODE 0x0000000000000003
146#define GELIC_NET_GET_VLAN_ID 0x0000000000000004
147
148#define GELIC_NET_LINK_UP 0x0000000000000001
149#define GELIC_NET_FULL_DUPLEX 0x0000000000000002
150#define GELIC_NET_AUTO_NEG 0x0000000000000004
151#define GELIC_NET_SPEED_10 0x0000000000000010
152#define GELIC_NET_SPEED_100 0x0000000000000020
153#define GELIC_NET_SPEED_1000 0x0000000000000040
154
155#define GELIC_NET_VLAN_ALL 0x0000000000000001
156#define GELIC_NET_VLAN_WIRED 0x0000000000000002
157#define GELIC_NET_VLAN_WIRELESS 0x0000000000000003
158#define GELIC_NET_VLAN_PSP 0x0000000000000004
159#define GELIC_NET_VLAN_PORT0 0x0000000000000010
160#define GELIC_NET_VLAN_PORT1 0x0000000000000011
161#define GELIC_NET_VLAN_PORT2 0x0000000000000012
162#define GELIC_NET_VLAN_DAEMON_CLIENT_BSS 0x0000000000000013
163#define GELIC_NET_VLAN_LIBERO_CLIENT_BSS 0x0000000000000014
164#define GELIC_NET_VLAN_NO_ENTRY -6
165
166#define GELIC_NET_PORT 2 /* for port status */
167
168/* size of hardware part of gelic descriptor */
169#define GELIC_NET_DESCR_SIZE (32)
170struct gelic_net_descr {
171 /* as defined by the hardware */
172 u32 buf_addr;
173 u32 buf_size;
174 u32 next_descr_addr;
175 u32 dmac_cmd_status;
176 u32 result_size;
177 u32 valid_size; /* all zeroes for tx */
178 u32 data_status;
179 u32 data_error; /* all zeroes for tx */
180
181 /* used in the driver */
182 struct sk_buff *skb;
183 dma_addr_t bus_addr;
184 struct gelic_net_descr *next;
185 struct gelic_net_descr *prev;
186 struct vlan_ethhdr vlan;
187} __attribute__((aligned(32)));
188
189struct gelic_net_descr_chain {
190 /* we walk from tail to head */
191 struct gelic_net_descr *head;
192 struct gelic_net_descr *tail;
193};
194
195struct gelic_net_card {
196 struct net_device *netdev;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700197 struct napi_struct napi;
Masakazu Mokuno02c18892007-07-05 20:11:16 +0900198 /*
199 * hypervisor requires irq_status should be
200 * 8 bytes aligned, but u64 member is
201 * always disposed in that manner
202 */
203 u64 irq_status;
204 u64 ghiintmask;
205
206 struct ps3_system_bus_device *dev;
207 u32 vlan_id[GELIC_NET_VLAN_MAX];
208 int vlan_index;
209
210 struct gelic_net_descr_chain tx_chain;
211 struct gelic_net_descr_chain rx_chain;
Masakazu Mokuno583aae12007-07-20 17:35:54 +0900212 int rx_dma_restart_required;
Masakazu Mokuno02c18892007-07-05 20:11:16 +0900213 /* gurad dmac descriptor chain*/
214 spinlock_t chain_lock;
215
Masakazu Mokuno02c18892007-07-05 20:11:16 +0900216 int rx_csum;
217 /* guard tx_dma_progress */
218 spinlock_t tx_dma_lock;
219 int tx_dma_progress;
220
221 struct work_struct tx_timeout_task;
222 atomic_t tx_timeout_task_counter;
223 wait_queue_head_t waitq;
224
225 struct gelic_net_descr *tx_top, *rx_top;
226 struct gelic_net_descr descr[0];
227};
228
229
230extern unsigned long p_to_lp(long pa);
231
232#endif /* _GELIC_NET_H */