Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Pinctrl driver for NXP LPC18xx/LPC43xx System Control Unit (SCU) |
| 3 | * |
| 4 | * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com> |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public |
| 7 | * License version 2. This program is licensed "as is" without any |
| 8 | * warranty of any kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/bitops.h> |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/io.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/of.h> |
| 16 | #include <linux/of_device.h> |
| 17 | #include <linux/pinctrl/pinctrl.h> |
| 18 | #include <linux/pinctrl/pinmux.h> |
| 19 | #include <linux/pinctrl/pinconf-generic.h> |
| 20 | |
| 21 | #include "core.h" |
| 22 | #include "pinctrl-utils.h" |
| 23 | |
| 24 | /* LPC18XX SCU analog function registers */ |
| 25 | #define LPC18XX_SCU_REG_ENAIO0 0xc88 |
| 26 | #define LPC18XX_SCU_REG_ENAIO1 0xc8c |
| 27 | #define LPC18XX_SCU_REG_ENAIO2 0xc90 |
| 28 | #define LPC18XX_SCU_REG_ENAIO2_DAC BIT(0) |
| 29 | |
| 30 | /* LPC18XX SCU pin register definitions */ |
| 31 | #define LPC18XX_SCU_PIN_MODE_MASK 0x7 |
| 32 | #define LPC18XX_SCU_PIN_EPD BIT(3) |
| 33 | #define LPC18XX_SCU_PIN_EPUN BIT(4) |
| 34 | #define LPC18XX_SCU_PIN_EHS BIT(5) |
| 35 | #define LPC18XX_SCU_PIN_EZI BIT(6) |
| 36 | #define LPC18XX_SCU_PIN_ZIF BIT(7) |
| 37 | #define LPC18XX_SCU_PIN_EHD_MASK 0x300 |
| 38 | #define LPC18XX_SCU_PIN_EHD_POS 8 |
| 39 | |
Joachim Eastwood | bd6eab9 | 2015-07-15 00:25:27 +0200 | [diff] [blame] | 40 | #define LPC18XX_SCU_USB1_EPD BIT(2) |
| 41 | #define LPC18XX_SCU_USB1_EPWR BIT(4) |
| 42 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 43 | #define LPC18XX_SCU_I2C0_EFP BIT(0) |
| 44 | #define LPC18XX_SCU_I2C0_EHD BIT(2) |
| 45 | #define LPC18XX_SCU_I2C0_EZI BIT(3) |
| 46 | #define LPC18XX_SCU_I2C0_ZIF BIT(7) |
| 47 | #define LPC18XX_SCU_I2C0_SCL_SHIFT 0 |
| 48 | #define LPC18XX_SCU_I2C0_SDA_SHIFT 8 |
| 49 | |
| 50 | #define LPC18XX_SCU_FUNC_PER_PIN 8 |
| 51 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 52 | /* LPC18xx pin types */ |
| 53 | enum { |
| 54 | TYPE_ND, /* Normal-drive */ |
| 55 | TYPE_HD, /* High-drive */ |
| 56 | TYPE_HS, /* High-speed */ |
| 57 | TYPE_I2C0, |
| 58 | TYPE_USB1, |
| 59 | }; |
| 60 | |
| 61 | /* LPC18xx pin functions */ |
| 62 | enum { |
| 63 | FUNC_R, /* Reserved */ |
| 64 | FUNC_ADC, |
| 65 | FUNC_ADCTRIG, |
| 66 | FUNC_CAN0, |
| 67 | FUNC_CAN1, |
| 68 | FUNC_CGU_OUT, |
| 69 | FUNC_CLKIN, |
| 70 | FUNC_CLKOUT, |
| 71 | FUNC_CTIN, |
| 72 | FUNC_CTOUT, |
| 73 | FUNC_DAC, |
| 74 | FUNC_EMC, |
| 75 | FUNC_EMC_ALT, |
| 76 | FUNC_ENET, |
| 77 | FUNC_ENET_ALT, |
| 78 | FUNC_GPIO, |
| 79 | FUNC_I2C0, |
| 80 | FUNC_I2C1, |
| 81 | FUNC_I2S0_RX_MCLK, |
| 82 | FUNC_I2S0_RX_SCK, |
| 83 | FUNC_I2S0_RX_SDA, |
| 84 | FUNC_I2S0_RX_WS, |
| 85 | FUNC_I2S0_TX_MCLK, |
| 86 | FUNC_I2S0_TX_SCK, |
| 87 | FUNC_I2S0_TX_SDA, |
| 88 | FUNC_I2S0_TX_WS, |
| 89 | FUNC_I2S1, |
| 90 | FUNC_LCD, |
| 91 | FUNC_LCD_ALT, |
| 92 | FUNC_MCTRL, |
| 93 | FUNC_NMI, |
| 94 | FUNC_QEI, |
| 95 | FUNC_SDMMC, |
| 96 | FUNC_SGPIO, |
| 97 | FUNC_SPI, |
| 98 | FUNC_SPIFI, |
| 99 | FUNC_SSP0, |
| 100 | FUNC_SSP0_ALT, |
| 101 | FUNC_SSP1, |
| 102 | FUNC_TIMER0, |
| 103 | FUNC_TIMER1, |
| 104 | FUNC_TIMER2, |
| 105 | FUNC_TIMER3, |
| 106 | FUNC_TRACE, |
| 107 | FUNC_UART0, |
| 108 | FUNC_UART1, |
| 109 | FUNC_UART2, |
| 110 | FUNC_UART3, |
| 111 | FUNC_USB0, |
| 112 | FUNC_USB1, |
Joachim Eastwood | 16a4851 | 2015-05-14 14:45:58 +0200 | [diff] [blame] | 113 | FUNC_MAX |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 114 | }; |
| 115 | |
| 116 | static const char *const lpc18xx_function_names[] = { |
Joachim Eastwood | 16a4851 | 2015-05-14 14:45:58 +0200 | [diff] [blame] | 117 | [FUNC_R] = "reserved", |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 118 | [FUNC_ADC] = "adc", |
| 119 | [FUNC_ADCTRIG] = "adctrig", |
| 120 | [FUNC_CAN0] = "can0", |
| 121 | [FUNC_CAN1] = "can1", |
| 122 | [FUNC_CGU_OUT] = "cgu_out", |
| 123 | [FUNC_CLKIN] = "clkin", |
| 124 | [FUNC_CLKOUT] = "clkout", |
| 125 | [FUNC_CTIN] = "ctin", |
| 126 | [FUNC_CTOUT] = "ctout", |
| 127 | [FUNC_DAC] = "dac", |
| 128 | [FUNC_EMC] = "emc", |
| 129 | [FUNC_EMC_ALT] = "emc_alt", |
| 130 | [FUNC_ENET] = "enet", |
| 131 | [FUNC_ENET_ALT] = "enet_alt", |
| 132 | [FUNC_GPIO] = "gpio", |
| 133 | [FUNC_I2C0] = "i2c0", |
| 134 | [FUNC_I2C1] = "i2c1", |
| 135 | [FUNC_I2S0_RX_MCLK] = "i2s0_rx_mclk", |
| 136 | [FUNC_I2S0_RX_SCK] = "i2s0_rx_sck", |
| 137 | [FUNC_I2S0_RX_SDA] = "i2s0_rx_sda", |
| 138 | [FUNC_I2S0_RX_WS] = "i2s0_rx_ws", |
| 139 | [FUNC_I2S0_TX_MCLK] = "i2s0_tx_mclk", |
| 140 | [FUNC_I2S0_TX_SCK] = "i2s0_tx_sck", |
| 141 | [FUNC_I2S0_TX_SDA] = "i2s0_tx_sda", |
| 142 | [FUNC_I2S0_TX_WS] = "i2s0_tx_ws", |
| 143 | [FUNC_I2S1] = "i2s1", |
| 144 | [FUNC_LCD] = "lcd", |
| 145 | [FUNC_LCD_ALT] = "lcd_alt", |
| 146 | [FUNC_MCTRL] = "mctrl", |
| 147 | [FUNC_NMI] = "nmi", |
| 148 | [FUNC_QEI] = "qei", |
| 149 | [FUNC_SDMMC] = "sdmmc", |
| 150 | [FUNC_SGPIO] = "sgpio", |
| 151 | [FUNC_SPI] = "spi", |
| 152 | [FUNC_SPIFI] = "spifi", |
| 153 | [FUNC_SSP0] = "ssp0", |
| 154 | [FUNC_SSP0_ALT] = "ssp0_alt", |
| 155 | [FUNC_SSP1] = "ssp1", |
| 156 | [FUNC_TIMER0] = "timer0", |
| 157 | [FUNC_TIMER1] = "timer1", |
| 158 | [FUNC_TIMER2] = "timer2", |
| 159 | [FUNC_TIMER3] = "timer3", |
| 160 | [FUNC_TRACE] = "trace", |
| 161 | [FUNC_UART0] = "uart0", |
| 162 | [FUNC_UART1] = "uart1", |
| 163 | [FUNC_UART2] = "uart2", |
| 164 | [FUNC_UART3] = "uart3", |
| 165 | [FUNC_USB0] = "usb0", |
| 166 | [FUNC_USB1] = "usb1", |
| 167 | }; |
| 168 | |
Joachim Eastwood | 16a4851 | 2015-05-14 14:45:58 +0200 | [diff] [blame] | 169 | struct lpc18xx_pmx_func { |
| 170 | const char **groups; |
| 171 | unsigned ngroups; |
| 172 | }; |
| 173 | |
| 174 | struct lpc18xx_scu_data { |
| 175 | struct pinctrl_dev *pctl; |
| 176 | void __iomem *base; |
| 177 | struct clk *clk; |
| 178 | struct lpc18xx_pmx_func func[FUNC_MAX]; |
| 179 | }; |
| 180 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 181 | struct lpc18xx_pin_caps { |
| 182 | unsigned int offset; |
| 183 | unsigned char functions[LPC18XX_SCU_FUNC_PER_PIN]; |
| 184 | unsigned char analog; |
| 185 | unsigned char type; |
| 186 | }; |
| 187 | |
| 188 | /* Analog pins are required to have both bias and input disabled */ |
| 189 | #define LPC18XX_SCU_ANALOG_PIN_CFG 0x10 |
| 190 | |
| 191 | /* Macros to maniupluate analog member in lpc18xx_pin_caps */ |
| 192 | #define LPC18XX_ANALOG_PIN BIT(7) |
| 193 | #define LPC18XX_ANALOG_ADC(a) ((a >> 5) & 0x3) |
| 194 | #define LPC18XX_ANALOG_BIT_MASK 0x1f |
| 195 | #define ADC0 (LPC18XX_ANALOG_PIN | (0x00 << 5)) |
| 196 | #define ADC1 (LPC18XX_ANALOG_PIN | (0x01 << 5)) |
| 197 | #define DAC LPC18XX_ANALOG_PIN |
| 198 | |
| 199 | #define LPC_P(port, pin, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \ |
| 200 | static struct lpc18xx_pin_caps lpc18xx_pin_p##port##_##pin = { \ |
| 201 | .offset = 0x##port * 32 * 4 + pin * 4, \ |
| 202 | .functions = { \ |
| 203 | FUNC_##f0, FUNC_##f1, FUNC_##f2, \ |
| 204 | FUNC_##f3, FUNC_##f4, FUNC_##f5, \ |
| 205 | FUNC_##f6, FUNC_##f7, \ |
| 206 | }, \ |
| 207 | .analog = a, \ |
| 208 | .type = TYPE_##t, \ |
| 209 | } |
| 210 | |
| 211 | #define LPC_N(pname, off, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \ |
| 212 | static struct lpc18xx_pin_caps lpc18xx_pin_##pname = { \ |
| 213 | .offset = off, \ |
| 214 | .functions = { \ |
| 215 | FUNC_##f0, FUNC_##f1, FUNC_##f2, \ |
| 216 | FUNC_##f3, FUNC_##f4, FUNC_##f5, \ |
| 217 | FUNC_##f6, FUNC_##f7, \ |
| 218 | }, \ |
| 219 | .analog = a, \ |
| 220 | .type = TYPE_##t, \ |
| 221 | } |
| 222 | |
| 223 | |
| 224 | /* Pinmuxing table taken from data sheet */ |
| 225 | /* Pin FUNC0 FUNC1 FUNC2 FUNC3 FUNC4 FUNC5 FUNC6 FUNC7 ANALOG TYPE */ |
| 226 | LPC_P(0,0, GPIO, SSP1, ENET, SGPIO, R, R, I2S0_TX_WS,I2S1, 0, ND); |
| 227 | LPC_P(0,1, GPIO, SSP1,ENET_ALT,SGPIO, R, R, ENET, I2S1, 0, ND); |
| 228 | LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND); |
| 229 | LPC_P(1,1, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND); |
| 230 | LPC_P(1,2, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND); |
| 231 | LPC_P(1,3, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND); |
| 232 | LPC_P(1,4, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND); |
| 233 | LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND); |
| 234 | LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND); |
| 235 | LPC_P(1,7, GPIO, UART1, CTOUT, EMC, USB0, R, R, R, 0, ND); |
| 236 | LPC_P(1,8, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND); |
| 237 | LPC_P(1,9, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND); |
| 238 | LPC_P(1,10, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND); |
| 239 | LPC_P(1,11, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND); |
| 240 | LPC_P(1,12, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND); |
| 241 | LPC_P(1,13, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND); |
| 242 | LPC_P(1,14, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, R, 0, ND); |
| 243 | LPC_P(1,15, GPIO, UART2, SGPIO, ENET, TIMER0, R, R, R, 0, ND); |
| 244 | LPC_P(1,16, GPIO, UART2, SGPIO,ENET_ALT,TIMER0, R, R, ENET, 0, ND); |
| 245 | LPC_P(1,17, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, HD); |
| 246 | LPC_P(1,18, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, ND); |
| 247 | LPC_P(1,19, ENET, SSP1, R, R, CLKOUT, R, I2S0_RX_MCLK,I2S1, 0, ND); |
| 248 | LPC_P(1,20, GPIO, SSP1, R, ENET, TIMER0, R, SGPIO, R, 0, ND); |
| 249 | LPC_P(2,0, SGPIO, UART0, EMC, USB0, GPIO, R, TIMER3, ENET, 0, ND); |
| 250 | LPC_P(2,1, SGPIO, UART0, EMC, USB0, GPIO, R, TIMER3, R, 0, ND); |
| 251 | LPC_P(2,2, SGPIO, UART0, EMC, USB0, GPIO, CTIN, TIMER3, R, 0, ND); |
| 252 | LPC_P(2,3, SGPIO, I2C1, UART3, CTIN, GPIO, R, TIMER3, USB0, 0, HD); |
| 253 | LPC_P(2,4, SGPIO, I2C1, UART3, CTIN, GPIO, R, TIMER3, USB0, 0, HD); |
| 254 | LPC_P(2,5, SGPIO, CTIN, USB1, ADCTRIG, GPIO, R, TIMER3, USB0, 0, HD); |
| 255 | LPC_P(2,6, SGPIO, UART0, EMC, USB0, GPIO, CTIN, TIMER3, R, 0, ND); |
| 256 | LPC_P(2,7, GPIO, CTOUT, UART3, EMC, R, R, TIMER3, R, 0, ND); |
| 257 | LPC_P(2,8, SGPIO, CTOUT, UART3, EMC, GPIO, R, R, R, 0, ND); |
| 258 | LPC_P(2,9, GPIO, CTOUT, UART3, EMC, R, R, R, R, 0, ND); |
| 259 | LPC_P(2,10, GPIO, CTOUT, UART2, EMC, R, R, R, R, 0, ND); |
| 260 | LPC_P(2,11, GPIO, CTOUT, UART2, EMC, R, R, R, R, 0, ND); |
| 261 | LPC_P(2,12, GPIO, CTOUT, R, EMC, R, R, R, UART2, 0, ND); |
| 262 | LPC_P(2,13, GPIO, CTIN, R, EMC, R, R, R, UART2, 0, ND); |
| 263 | LPC_P(3,0, I2S0_RX_SCK, I2S0_RX_MCLK, I2S0_TX_SCK, I2S0_TX_MCLK,SSP0,R,R,R, 0, ND); |
| 264 | LPC_P(3,1, I2S0_TX_WS, I2S0_RX_WS,CAN0,USB1,GPIO, R, LCD, R, 0, ND); |
| 265 | LPC_P(3,2, I2S0_TX_SDA, I2S0_RX_SDA,CAN0,USB1,GPIO, R, LCD, R, 0, ND); |
| 266 | LPC_P(3,3, R, SPI, SSP0, SPIFI, CGU_OUT,R, I2S0_TX_MCLK, I2S1, 0, HS); |
| 267 | LPC_P(3,4, GPIO, R, R, SPIFI, UART1, I2S0_TX_WS, I2S1, LCD, 0, ND); |
| 268 | LPC_P(3,5, GPIO, R, R, SPIFI, UART1, I2S0_TX_SDA,I2S1, LCD, 0, ND); |
| 269 | LPC_P(3,6, GPIO, SPI, SSP0, SPIFI, R, SSP0_ALT, R, R, 0, ND); |
| 270 | LPC_P(3,7, R, SPI, SSP0, SPIFI, GPIO, SSP0_ALT, R, R, 0, ND); |
| 271 | LPC_P(3,8, R, SPI, SSP0, SPIFI, GPIO, SSP0_ALT, R, R, 0, ND); |
| 272 | LPC_P(4,0, GPIO, MCTRL, NMI, R, R, LCD, UART3, R, 0, ND); |
| 273 | LPC_P(4,1, GPIO, CTOUT, LCD, R, R, LCD_ALT, UART3, ENET, ADC0|1, ND); |
| 274 | LPC_P(4,2, GPIO, CTOUT, LCD, R, R, LCD_ALT, UART3, SGPIO, 0, ND); |
| 275 | LPC_P(4,3, GPIO, CTOUT, LCD, R, R, LCD_ALT, UART3, SGPIO, ADC0|0, ND); |
| 276 | LPC_P(4,4, GPIO, CTOUT, LCD, R, R, LCD_ALT, UART3, SGPIO, DAC, ND); |
| 277 | LPC_P(4,5, GPIO, CTOUT, LCD, R, R, R, R, SGPIO, 0, ND); |
| 278 | LPC_P(4,6, GPIO, CTOUT, LCD, R, R, R, R, SGPIO, 0, ND); |
| 279 | LPC_P(4,7, LCD, CLKIN, R, R, R, R, I2S1,I2S0_TX_SCK, 0, ND); |
| 280 | LPC_P(4,8, R, CTIN, LCD, R, GPIO, LCD_ALT, CAN1, SGPIO, 0, ND); |
| 281 | LPC_P(4,9, R, CTIN, LCD, R, GPIO, LCD_ALT, CAN1, SGPIO, 0, ND); |
| 282 | LPC_P(4,10, R, CTIN, LCD, R, GPIO, LCD_ALT, R, SGPIO, 0, ND); |
| 283 | LPC_P(5,0, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 284 | LPC_P(5,1, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 285 | LPC_P(5,2, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 286 | LPC_P(5,3, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 287 | LPC_P(5,4, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 288 | LPC_P(5,5, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 289 | LPC_P(5,6, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 290 | LPC_P(5,7, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND); |
| 291 | LPC_P(6,0, R, I2S0_RX_MCLK,R, R, I2S0_RX_SCK, R, R, R, 0, ND); |
| 292 | LPC_P(6,1, GPIO, EMC, UART0, I2S0_RX_WS, R, TIMER2, R, R, 0, ND); |
| 293 | LPC_P(6,2, GPIO, EMC, UART0, I2S0_RX_SDA, R, TIMER2, R, R, 0, ND); |
| 294 | LPC_P(6,3, GPIO, USB0, SGPIO, EMC, R, TIMER2, R, R, 0, ND); |
| 295 | LPC_P(6,4, GPIO, CTIN, UART0, EMC, R, R, R, R, 0, ND); |
| 296 | LPC_P(6,5, GPIO, CTOUT, UART0, EMC, R, R, R, R, 0, ND); |
| 297 | LPC_P(6,6, GPIO, EMC, SGPIO, USB0, R, TIMER2, R, R, 0, ND); |
| 298 | LPC_P(6,7, R, EMC, SGPIO, USB0, GPIO, TIMER2, R, R, 0, ND); |
| 299 | LPC_P(6,8, R, EMC, SGPIO, USB0, GPIO, TIMER2, R, R, 0, ND); |
| 300 | LPC_P(6,9, GPIO, R, R, EMC, R, TIMER2, R, R, 0, ND); |
| 301 | LPC_P(6,10, GPIO, MCTRL, R, EMC, R, R, R, R, 0, ND); |
| 302 | LPC_P(6,11, GPIO, R, R, EMC, R, TIMER2, R, R, 0, ND); |
| 303 | LPC_P(6,12, GPIO, CTOUT, R, EMC, R, R, R, R, 0, ND); |
| 304 | LPC_P(7,0, GPIO, CTOUT, R, LCD, R, R, R, SGPIO, 0, ND); |
| 305 | LPC_P(7,1, GPIO, CTOUT,I2S0_TX_WS,LCD,LCD_ALT, R, UART2, SGPIO, 0, ND); |
| 306 | LPC_P(7,2, GPIO, CTIN,I2S0_TX_SDA,LCD,LCD_ALT, R, UART2, SGPIO, 0, ND); |
| 307 | LPC_P(7,3, GPIO, CTIN, R, LCD,LCD_ALT, R, R, R, 0, ND); |
| 308 | LPC_P(7,4, GPIO, CTOUT, R, LCD,LCD_ALT, TRACE, R, R, ADC0|4, ND); |
| 309 | LPC_P(7,5, GPIO, CTOUT, R, LCD,LCD_ALT, TRACE, R, R, ADC0|3, ND); |
| 310 | LPC_P(7,6, GPIO, CTOUT, R, LCD, R, TRACE, R, R, 0, ND); |
| 311 | LPC_P(7,7, GPIO, CTOUT, R, LCD, R, TRACE, ENET, SGPIO, ADC1|6, ND); |
| 312 | LPC_P(8,0, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD); |
| 313 | LPC_P(8,1, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD); |
| 314 | LPC_P(8,2, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD); |
| 315 | LPC_P(8,3, GPIO, USB1, R, LCD, LCD_ALT, R, R, TIMER0, 0, ND); |
| 316 | LPC_P(8,4, GPIO, USB1, R, LCD, LCD_ALT, R, R, TIMER0, 0, ND); |
| 317 | LPC_P(8,5, GPIO, USB1, R, LCD, LCD_ALT, R, R, TIMER0, 0, ND); |
| 318 | LPC_P(8,6, GPIO, USB1, R, LCD, LCD_ALT, R, R, TIMER0, 0, ND); |
| 319 | LPC_P(8,7, GPIO, USB1, R, LCD, LCD_ALT, R, R, TIMER0, 0, ND); |
| 320 | LPC_P(8,8, R, USB1, R, R, R, R,CGU_OUT, I2S1, 0, ND); |
| 321 | LPC_P(9,0, GPIO, MCTRL, R, R, R, ENET, SGPIO, SSP0, 0, ND); |
| 322 | LPC_P(9,1, GPIO, MCTRL, R, R, I2S0_TX_WS,ENET, SGPIO, SSP0, 0, ND); |
| 323 | LPC_P(9,2, GPIO, MCTRL, R, R, I2S0_TX_SDA,ENET,SGPIO, SSP0, 0, ND); |
| 324 | LPC_P(9,3, GPIO, MCTRL, USB1, R, R, ENET, SGPIO, UART3, 0, ND); |
| 325 | LPC_P(9,4, R, MCTRL, USB1, R, GPIO, ENET, SGPIO, UART3, 0, ND); |
| 326 | LPC_P(9,5, R, MCTRL, USB1, R, GPIO, ENET, SGPIO, UART0, 0, ND); |
| 327 | LPC_P(9,6, GPIO, MCTRL, USB1, R, R, ENET, SGPIO, UART0, 0, ND); |
| 328 | LPC_P(a,0, R, R, R, R, R, I2S1, CGU_OUT, R, 0, ND); |
| 329 | LPC_P(a,1, GPIO, QEI, R, UART2, R, R, R, R, 0, HD); |
| 330 | LPC_P(a,2, GPIO, QEI, R, UART2, R, R, R, R, 0, HD); |
| 331 | LPC_P(a,3, GPIO, QEI, R, R, R, R, R, R, 0, HD); |
| 332 | LPC_P(a,4, R, CTOUT, R, EMC, GPIO, R, R, R, 0, ND); |
| 333 | LPC_P(b,0, R, CTOUT, LCD, R, GPIO, R, R, R, 0, ND); |
| 334 | LPC_P(b,1, R, USB1, LCD, R, GPIO, CTOUT, R, R, 0, ND); |
| 335 | LPC_P(b,2, R, USB1, LCD, R, GPIO, CTOUT, R, R, 0, ND); |
| 336 | LPC_P(b,3, R, USB1, LCD, R, GPIO, CTOUT, R, R, 0, ND); |
| 337 | LPC_P(b,4, R, USB1, LCD, R, GPIO, CTIN, R, R, 0, ND); |
| 338 | LPC_P(b,5, R, USB1, LCD, R, GPIO, CTIN, LCD_ALT, R, 0, ND); |
| 339 | LPC_P(b,6, R, USB1, LCD, R, GPIO, CTIN, LCD_ALT, R, ADC0|6, ND); |
| 340 | LPC_P(c,0, R, USB1, R, ENET, LCD, R, R, SDMMC, ADC1|1, ND); |
| 341 | LPC_P(c,1, USB1, R, UART1, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 342 | LPC_P(c,2, USB1, R, UART1, ENET, GPIO, R, R, SDMMC, 0, ND); |
| 343 | LPC_P(c,3, USB1, R, UART1, ENET, GPIO, R, R, SDMMC, ADC1|0, ND); |
| 344 | LPC_P(c,4, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 345 | LPC_P(c,5, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 346 | LPC_P(c,6, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 347 | LPC_P(c,7, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 348 | LPC_P(c,8, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 349 | LPC_P(c,9, R, USB1, R, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 350 | LPC_P(c,10, R, USB1, UART1, R, GPIO, R, TIMER3, SDMMC, 0, ND); |
| 351 | LPC_P(c,11, R, USB1, UART1, R, GPIO, R, R, SDMMC, 0, ND); |
| 352 | LPC_P(c,12, R, R, UART1, R, GPIO, SGPIO, I2S0_TX_SDA,SDMMC, 0, ND); |
| 353 | LPC_P(c,13, R, R, UART1, R, GPIO, SGPIO, I2S0_TX_WS, SDMMC, 0, ND); |
| 354 | LPC_P(c,14, R, R, UART1, R, GPIO, SGPIO, ENET, SDMMC, 0, ND); |
| 355 | LPC_P(d,0, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 356 | LPC_P(d,1, R, R, EMC, R, GPIO, SDMMC, R, SGPIO, 0, ND); |
| 357 | LPC_P(d,2, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 358 | LPC_P(d,3, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 359 | LPC_P(d,4, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 360 | LPC_P(d,5, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 361 | LPC_P(d,6, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 362 | LPC_P(d,7, R, CTIN, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 363 | LPC_P(d,8, R, CTIN, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 364 | LPC_P(d,9, R, CTOUT, EMC, R, GPIO, R, R, SGPIO, 0, ND); |
| 365 | LPC_P(d,10, R, CTIN, EMC, R, GPIO, R, R, R, 0, ND); |
| 366 | LPC_P(d,11, R, R, EMC, R, GPIO, USB1, CTOUT, R, 0, ND); |
| 367 | LPC_P(d,12, R, R, EMC, R, GPIO, R, CTOUT, R, 0, ND); |
| 368 | LPC_P(d,13, R, CTIN, EMC, R, GPIO, R, CTOUT, R, 0, ND); |
| 369 | LPC_P(d,14, R, R, EMC, R, GPIO, R, CTOUT, R, 0, ND); |
| 370 | LPC_P(d,15, R, R, EMC, R, GPIO, SDMMC, CTOUT, R, 0, ND); |
| 371 | LPC_P(d,16, R, R, EMC, R, GPIO, SDMMC, CTOUT, R, 0, ND); |
| 372 | LPC_P(e,0, R, R, R, EMC, GPIO, CAN1, R, R, 0, ND); |
| 373 | LPC_P(e,1, R, R, R, EMC, GPIO, CAN1, R, R, 0, ND); |
| 374 | LPC_P(e,2,ADCTRIG, CAN0, R, EMC, GPIO, R, R, R, 0, ND); |
| 375 | LPC_P(e,3, R, CAN0,ADCTRIG, EMC, GPIO, R, R, R, 0, ND); |
| 376 | LPC_P(e,4, R, NMI, R, EMC, GPIO, R, R, R, 0, ND); |
| 377 | LPC_P(e,5, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 378 | LPC_P(e,6, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 379 | LPC_P(e,7, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 380 | LPC_P(e,8, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 381 | LPC_P(e,9, R, CTIN, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 382 | LPC_P(e,10, R, CTIN, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 383 | LPC_P(e,11, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 384 | LPC_P(e,12, R, CTOUT, UART1, EMC, GPIO, R, R, R, 0, ND); |
| 385 | LPC_P(e,13, R, CTOUT, I2C1, EMC, GPIO, R, R, R, 0, ND); |
| 386 | LPC_P(e,14, R, R, R, EMC, GPIO, R, R, R, 0, ND); |
| 387 | LPC_P(e,15, R, CTOUT, I2C1, EMC, GPIO, R, R, R, 0, ND); |
| 388 | LPC_P(f,0, SSP0, CLKIN, R, R, R, R, R, I2S1, 0, ND); |
| 389 | LPC_P(f,1, R, R, SSP0, R, GPIO, R, SGPIO, R, 0, ND); |
| 390 | LPC_P(f,2, R, UART3, SSP0, R, GPIO, R, SGPIO, R, 0, ND); |
| 391 | LPC_P(f,3, R, UART3, SSP0, R, GPIO, R, SGPIO, R, 0, ND); |
| 392 | LPC_P(f,4, SSP1, CLKIN, TRACE, R, R, R, I2S0_TX_MCLK,I2S0_RX_SCK, 0, ND); |
| 393 | LPC_P(f,5, R, UART3, SSP1, TRACE, GPIO, R, SGPIO, R, ADC1|4, ND); |
| 394 | LPC_P(f,6, R, UART3, SSP1, TRACE, GPIO, R, SGPIO, I2S1, ADC1|3, ND); |
| 395 | LPC_P(f,7, R, UART3, SSP1, TRACE, GPIO, R, SGPIO, I2S1, ADC1|7, ND); |
| 396 | LPC_P(f,8, R, UART0, CTIN, TRACE, GPIO, R, SGPIO, R, ADC0|2, ND); |
| 397 | LPC_P(f,9, R, UART0, CTOUT, R, GPIO, R, SGPIO, R, ADC1|2, ND); |
| 398 | LPC_P(f,10, R, UART0, R, R, GPIO, R, SDMMC, R, ADC0|5, ND); |
| 399 | LPC_P(f,11, R, UART0, R, R, GPIO, R, SDMMC, R, ADC1|5, ND); |
| 400 | |
| 401 | /* Pin Offset FUNC0 FUNC1 FUNC2 FUNC3 FUNC4 FUNC5 FUNC6 FUNC7 ANALOG TYPE */ |
| 402 | LPC_N(clk0, 0xc00, EMC, CLKOUT, R, R, SDMMC, EMC_ALT, SSP1, ENET, 0, HS); |
| 403 | LPC_N(clk1, 0xc04, EMC, CLKOUT, R, R, R, CGU_OUT, R, I2S1, 0, HS); |
| 404 | LPC_N(clk2, 0xc08, EMC, CLKOUT, R, R, SDMMC, EMC_ALT,I2S0_TX_MCLK,I2S1, 0, HS); |
| 405 | LPC_N(clk3, 0xc0c, EMC, CLKOUT, R, R, R, CGU_OUT, R, I2S1, 0, HS); |
| 406 | LPC_N(usb1_dm, 0xc80, R, R, R, R, R, R, R, R, 0, USB1); |
| 407 | LPC_N(usb1_dp, 0xc80, R, R, R, R, R, R, R, R, 0, USB1); |
| 408 | LPC_N(i2c0_scl, 0xc84, R, R, R, R, R, R, R, R, 0, I2C0); |
| 409 | LPC_N(i2c0_sda, 0xc84, R, R, R, R, R, R, R, R, 0, I2C0); |
| 410 | |
| 411 | #define LPC18XX_PIN_P(port, pin) { \ |
| 412 | .number = 0x##port * 32 + pin, \ |
| 413 | .name = "p"#port"_"#pin, \ |
| 414 | .drv_data = &lpc18xx_pin_p##port##_##pin \ |
| 415 | } |
| 416 | |
| 417 | /* Pin numbers for special pins */ |
| 418 | enum { |
| 419 | PIN_CLK0 = 600, |
| 420 | PIN_CLK1, |
| 421 | PIN_CLK2, |
| 422 | PIN_CLK3, |
| 423 | PIN_USB1_DM, |
| 424 | PIN_USB1_DP, |
| 425 | PIN_I2C0_SCL, |
| 426 | PIN_I2C0_SDA, |
| 427 | }; |
| 428 | |
| 429 | #define LPC18XX_PIN(pname, n) { \ |
| 430 | .number = n, \ |
| 431 | .name = #pname, \ |
| 432 | .drv_data = &lpc18xx_pin_##pname \ |
| 433 | } |
| 434 | |
| 435 | static const struct pinctrl_pin_desc lpc18xx_pins[] = { |
| 436 | LPC18XX_PIN_P(0,0), |
| 437 | LPC18XX_PIN_P(0,1), |
| 438 | LPC18XX_PIN_P(1,0), |
| 439 | LPC18XX_PIN_P(1,1), |
| 440 | LPC18XX_PIN_P(1,2), |
| 441 | LPC18XX_PIN_P(1,3), |
| 442 | LPC18XX_PIN_P(1,4), |
| 443 | LPC18XX_PIN_P(1,5), |
| 444 | LPC18XX_PIN_P(1,6), |
| 445 | LPC18XX_PIN_P(1,7), |
| 446 | LPC18XX_PIN_P(1,8), |
| 447 | LPC18XX_PIN_P(1,9), |
| 448 | LPC18XX_PIN_P(1,10), |
| 449 | LPC18XX_PIN_P(1,11), |
| 450 | LPC18XX_PIN_P(1,12), |
| 451 | LPC18XX_PIN_P(1,13), |
| 452 | LPC18XX_PIN_P(1,14), |
| 453 | LPC18XX_PIN_P(1,15), |
| 454 | LPC18XX_PIN_P(1,16), |
| 455 | LPC18XX_PIN_P(1,17), |
| 456 | LPC18XX_PIN_P(1,18), |
| 457 | LPC18XX_PIN_P(1,19), |
| 458 | LPC18XX_PIN_P(1,20), |
| 459 | LPC18XX_PIN_P(2,0), |
| 460 | LPC18XX_PIN_P(2,1), |
| 461 | LPC18XX_PIN_P(2,2), |
| 462 | LPC18XX_PIN_P(2,3), |
| 463 | LPC18XX_PIN_P(2,4), |
| 464 | LPC18XX_PIN_P(2,5), |
| 465 | LPC18XX_PIN_P(2,6), |
| 466 | LPC18XX_PIN_P(2,7), |
| 467 | LPC18XX_PIN_P(2,8), |
| 468 | LPC18XX_PIN_P(2,9), |
| 469 | LPC18XX_PIN_P(2,10), |
| 470 | LPC18XX_PIN_P(2,11), |
| 471 | LPC18XX_PIN_P(2,12), |
| 472 | LPC18XX_PIN_P(2,13), |
| 473 | LPC18XX_PIN_P(3,0), |
| 474 | LPC18XX_PIN_P(3,1), |
| 475 | LPC18XX_PIN_P(3,2), |
| 476 | LPC18XX_PIN_P(3,3), |
| 477 | LPC18XX_PIN_P(3,4), |
| 478 | LPC18XX_PIN_P(3,5), |
| 479 | LPC18XX_PIN_P(3,6), |
| 480 | LPC18XX_PIN_P(3,7), |
| 481 | LPC18XX_PIN_P(3,8), |
| 482 | LPC18XX_PIN_P(4,0), |
| 483 | LPC18XX_PIN_P(4,1), |
| 484 | LPC18XX_PIN_P(4,2), |
| 485 | LPC18XX_PIN_P(4,3), |
| 486 | LPC18XX_PIN_P(4,4), |
| 487 | LPC18XX_PIN_P(4,5), |
| 488 | LPC18XX_PIN_P(4,6), |
| 489 | LPC18XX_PIN_P(4,7), |
| 490 | LPC18XX_PIN_P(4,8), |
| 491 | LPC18XX_PIN_P(4,9), |
| 492 | LPC18XX_PIN_P(4,10), |
| 493 | LPC18XX_PIN_P(5,0), |
| 494 | LPC18XX_PIN_P(5,1), |
| 495 | LPC18XX_PIN_P(5,2), |
| 496 | LPC18XX_PIN_P(5,3), |
| 497 | LPC18XX_PIN_P(5,4), |
| 498 | LPC18XX_PIN_P(5,5), |
| 499 | LPC18XX_PIN_P(5,6), |
| 500 | LPC18XX_PIN_P(5,7), |
| 501 | LPC18XX_PIN_P(6,0), |
| 502 | LPC18XX_PIN_P(6,1), |
| 503 | LPC18XX_PIN_P(6,2), |
| 504 | LPC18XX_PIN_P(6,3), |
| 505 | LPC18XX_PIN_P(6,4), |
| 506 | LPC18XX_PIN_P(6,5), |
| 507 | LPC18XX_PIN_P(6,6), |
| 508 | LPC18XX_PIN_P(6,7), |
| 509 | LPC18XX_PIN_P(6,8), |
| 510 | LPC18XX_PIN_P(6,9), |
| 511 | LPC18XX_PIN_P(6,10), |
| 512 | LPC18XX_PIN_P(6,11), |
| 513 | LPC18XX_PIN_P(6,12), |
| 514 | LPC18XX_PIN_P(7,0), |
| 515 | LPC18XX_PIN_P(7,1), |
| 516 | LPC18XX_PIN_P(7,2), |
| 517 | LPC18XX_PIN_P(7,3), |
| 518 | LPC18XX_PIN_P(7,4), |
| 519 | LPC18XX_PIN_P(7,5), |
| 520 | LPC18XX_PIN_P(7,6), |
| 521 | LPC18XX_PIN_P(7,7), |
| 522 | LPC18XX_PIN_P(8,0), |
| 523 | LPC18XX_PIN_P(8,1), |
| 524 | LPC18XX_PIN_P(8,2), |
| 525 | LPC18XX_PIN_P(8,3), |
| 526 | LPC18XX_PIN_P(8,4), |
| 527 | LPC18XX_PIN_P(8,5), |
| 528 | LPC18XX_PIN_P(8,6), |
| 529 | LPC18XX_PIN_P(8,7), |
| 530 | LPC18XX_PIN_P(8,8), |
| 531 | LPC18XX_PIN_P(9,0), |
| 532 | LPC18XX_PIN_P(9,1), |
| 533 | LPC18XX_PIN_P(9,2), |
| 534 | LPC18XX_PIN_P(9,3), |
| 535 | LPC18XX_PIN_P(9,4), |
| 536 | LPC18XX_PIN_P(9,5), |
| 537 | LPC18XX_PIN_P(9,6), |
| 538 | LPC18XX_PIN_P(a,0), |
| 539 | LPC18XX_PIN_P(a,1), |
| 540 | LPC18XX_PIN_P(a,2), |
| 541 | LPC18XX_PIN_P(a,3), |
| 542 | LPC18XX_PIN_P(a,4), |
| 543 | LPC18XX_PIN_P(b,0), |
| 544 | LPC18XX_PIN_P(b,1), |
| 545 | LPC18XX_PIN_P(b,2), |
| 546 | LPC18XX_PIN_P(b,3), |
| 547 | LPC18XX_PIN_P(b,4), |
| 548 | LPC18XX_PIN_P(b,5), |
| 549 | LPC18XX_PIN_P(b,6), |
| 550 | LPC18XX_PIN_P(c,0), |
| 551 | LPC18XX_PIN_P(c,1), |
| 552 | LPC18XX_PIN_P(c,2), |
| 553 | LPC18XX_PIN_P(c,3), |
| 554 | LPC18XX_PIN_P(c,4), |
| 555 | LPC18XX_PIN_P(c,5), |
| 556 | LPC18XX_PIN_P(c,6), |
| 557 | LPC18XX_PIN_P(c,7), |
| 558 | LPC18XX_PIN_P(c,8), |
| 559 | LPC18XX_PIN_P(c,9), |
| 560 | LPC18XX_PIN_P(c,10), |
| 561 | LPC18XX_PIN_P(c,11), |
| 562 | LPC18XX_PIN_P(c,12), |
| 563 | LPC18XX_PIN_P(c,13), |
| 564 | LPC18XX_PIN_P(c,14), |
| 565 | LPC18XX_PIN_P(d,0), |
| 566 | LPC18XX_PIN_P(d,1), |
| 567 | LPC18XX_PIN_P(d,2), |
| 568 | LPC18XX_PIN_P(d,3), |
| 569 | LPC18XX_PIN_P(d,4), |
| 570 | LPC18XX_PIN_P(d,5), |
| 571 | LPC18XX_PIN_P(d,6), |
| 572 | LPC18XX_PIN_P(d,7), |
| 573 | LPC18XX_PIN_P(d,8), |
| 574 | LPC18XX_PIN_P(d,9), |
| 575 | LPC18XX_PIN_P(d,10), |
| 576 | LPC18XX_PIN_P(d,11), |
| 577 | LPC18XX_PIN_P(d,12), |
| 578 | LPC18XX_PIN_P(d,13), |
| 579 | LPC18XX_PIN_P(d,14), |
| 580 | LPC18XX_PIN_P(d,15), |
| 581 | LPC18XX_PIN_P(d,16), |
| 582 | LPC18XX_PIN_P(e,0), |
| 583 | LPC18XX_PIN_P(e,1), |
| 584 | LPC18XX_PIN_P(e,2), |
| 585 | LPC18XX_PIN_P(e,3), |
| 586 | LPC18XX_PIN_P(e,4), |
| 587 | LPC18XX_PIN_P(e,5), |
| 588 | LPC18XX_PIN_P(e,6), |
| 589 | LPC18XX_PIN_P(e,7), |
| 590 | LPC18XX_PIN_P(e,8), |
| 591 | LPC18XX_PIN_P(e,9), |
| 592 | LPC18XX_PIN_P(e,10), |
| 593 | LPC18XX_PIN_P(e,11), |
| 594 | LPC18XX_PIN_P(e,12), |
| 595 | LPC18XX_PIN_P(e,13), |
| 596 | LPC18XX_PIN_P(e,14), |
| 597 | LPC18XX_PIN_P(e,15), |
| 598 | LPC18XX_PIN_P(f,0), |
| 599 | LPC18XX_PIN_P(f,1), |
| 600 | LPC18XX_PIN_P(f,2), |
| 601 | LPC18XX_PIN_P(f,3), |
| 602 | LPC18XX_PIN_P(f,4), |
| 603 | LPC18XX_PIN_P(f,5), |
| 604 | LPC18XX_PIN_P(f,6), |
| 605 | LPC18XX_PIN_P(f,7), |
| 606 | LPC18XX_PIN_P(f,8), |
| 607 | LPC18XX_PIN_P(f,9), |
| 608 | LPC18XX_PIN_P(f,10), |
| 609 | LPC18XX_PIN_P(f,11), |
| 610 | |
| 611 | LPC18XX_PIN(clk0, PIN_CLK0), |
| 612 | LPC18XX_PIN(clk1, PIN_CLK1), |
| 613 | LPC18XX_PIN(clk2, PIN_CLK2), |
| 614 | LPC18XX_PIN(clk3, PIN_CLK3), |
| 615 | LPC18XX_PIN(usb1_dm, PIN_USB1_DM), |
| 616 | LPC18XX_PIN(usb1_dp, PIN_USB1_DP), |
| 617 | LPC18XX_PIN(i2c0_scl, PIN_I2C0_SCL), |
| 618 | LPC18XX_PIN(i2c0_sda, PIN_I2C0_SDA), |
| 619 | }; |
| 620 | |
| 621 | static int lpc18xx_pconf_get_usb1(enum pin_config_param param, int *arg, u32 reg) |
| 622 | { |
Joachim Eastwood | bd6eab9 | 2015-07-15 00:25:27 +0200 | [diff] [blame] | 623 | switch (param) { |
| 624 | case PIN_CONFIG_LOW_POWER_MODE: |
| 625 | if (reg & LPC18XX_SCU_USB1_EPWR) |
| 626 | *arg = 0; |
| 627 | else |
| 628 | *arg = 1; |
| 629 | break; |
| 630 | |
| 631 | case PIN_CONFIG_BIAS_DISABLE: |
| 632 | if (reg & LPC18XX_SCU_USB1_EPD) |
| 633 | return -EINVAL; |
| 634 | break; |
| 635 | |
| 636 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 637 | if (reg & LPC18XX_SCU_USB1_EPD) |
| 638 | *arg = 1; |
| 639 | else |
| 640 | return -EINVAL; |
| 641 | break; |
| 642 | |
| 643 | default: |
| 644 | return -ENOTSUPP; |
| 645 | } |
| 646 | |
| 647 | return 0; |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 648 | } |
| 649 | |
| 650 | static int lpc18xx_pconf_get_i2c0(enum pin_config_param param, int *arg, u32 reg, |
| 651 | unsigned pin) |
| 652 | { |
| 653 | u8 shift; |
| 654 | |
| 655 | if (pin == PIN_I2C0_SCL) |
| 656 | shift = LPC18XX_SCU_I2C0_SCL_SHIFT; |
| 657 | else |
| 658 | shift = LPC18XX_SCU_I2C0_SDA_SHIFT; |
| 659 | |
| 660 | switch (param) { |
| 661 | case PIN_CONFIG_INPUT_ENABLE: |
| 662 | if (reg & (LPC18XX_SCU_I2C0_EZI << shift)) |
| 663 | *arg = 1; |
| 664 | else |
| 665 | return -EINVAL; |
| 666 | break; |
| 667 | |
| 668 | case PIN_CONFIG_SLEW_RATE: |
| 669 | if (reg & (LPC18XX_SCU_I2C0_EHD << shift)) |
| 670 | *arg = 1; |
| 671 | else |
| 672 | *arg = 0; |
| 673 | break; |
| 674 | |
| 675 | case PIN_CONFIG_INPUT_SCHMITT: |
| 676 | if (reg & (LPC18XX_SCU_I2C0_EFP << shift)) |
| 677 | *arg = 3; |
| 678 | else |
| 679 | *arg = 50; |
| 680 | break; |
| 681 | |
| 682 | case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
| 683 | if (reg & (LPC18XX_SCU_I2C0_ZIF << shift)) |
| 684 | return -EINVAL; |
| 685 | else |
| 686 | *arg = 1; |
| 687 | break; |
| 688 | |
| 689 | default: |
| 690 | return -ENOTSUPP; |
| 691 | } |
| 692 | |
| 693 | return 0; |
| 694 | } |
| 695 | |
| 696 | static int lpc18xx_pconf_get_pin(enum pin_config_param param, int *arg, u32 reg, |
| 697 | struct lpc18xx_pin_caps *pin_cap) |
| 698 | { |
| 699 | switch (param) { |
| 700 | case PIN_CONFIG_BIAS_DISABLE: |
| 701 | if ((!(reg & LPC18XX_SCU_PIN_EPD)) && (reg & LPC18XX_SCU_PIN_EPUN)) |
| 702 | ; |
| 703 | else |
| 704 | return -EINVAL; |
| 705 | break; |
| 706 | |
| 707 | case PIN_CONFIG_BIAS_PULL_UP: |
| 708 | if (reg & LPC18XX_SCU_PIN_EPUN) |
| 709 | return -EINVAL; |
| 710 | else |
| 711 | *arg = 1; |
| 712 | break; |
| 713 | |
| 714 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 715 | if (reg & LPC18XX_SCU_PIN_EPD) |
| 716 | *arg = 1; |
| 717 | else |
| 718 | return -EINVAL; |
| 719 | break; |
| 720 | |
| 721 | case PIN_CONFIG_INPUT_ENABLE: |
| 722 | if (reg & LPC18XX_SCU_PIN_EZI) |
| 723 | *arg = 1; |
| 724 | else |
| 725 | return -EINVAL; |
| 726 | break; |
| 727 | |
| 728 | case PIN_CONFIG_SLEW_RATE: |
| 729 | if (pin_cap->type == TYPE_HD) |
| 730 | return -ENOTSUPP; |
| 731 | |
| 732 | if (reg & LPC18XX_SCU_PIN_EHS) |
| 733 | *arg = 1; |
| 734 | else |
| 735 | *arg = 0; |
| 736 | break; |
| 737 | |
| 738 | case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
| 739 | if (reg & LPC18XX_SCU_PIN_ZIF) |
| 740 | return -EINVAL; |
| 741 | else |
| 742 | *arg = 1; |
| 743 | break; |
| 744 | |
| 745 | case PIN_CONFIG_DRIVE_STRENGTH: |
| 746 | if (pin_cap->type != TYPE_HD) |
| 747 | return -ENOTSUPP; |
| 748 | |
| 749 | *arg = (reg & LPC18XX_SCU_PIN_EHD_MASK) >> LPC18XX_SCU_PIN_EHD_POS; |
| 750 | switch (*arg) { |
| 751 | case 3: *arg += 5; |
| 752 | case 2: *arg += 5; |
| 753 | case 1: *arg += 3; |
| 754 | case 0: *arg += 4; |
| 755 | } |
| 756 | break; |
| 757 | |
| 758 | default: |
| 759 | return -ENOTSUPP; |
| 760 | } |
| 761 | |
| 762 | return 0; |
| 763 | } |
| 764 | |
Joachim Eastwood | 403fbde | 2015-05-06 19:11:21 +0200 | [diff] [blame] | 765 | static struct lpc18xx_pin_caps *lpc18xx_get_pin_caps(unsigned pin) |
| 766 | { |
| 767 | int i; |
| 768 | |
| 769 | for (i = 0; i < ARRAY_SIZE(lpc18xx_pins); i++) { |
| 770 | if (lpc18xx_pins[i].number == pin) |
| 771 | return lpc18xx_pins[i].drv_data; |
| 772 | } |
| 773 | |
| 774 | return NULL; |
| 775 | } |
| 776 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 777 | static int lpc18xx_pconf_get(struct pinctrl_dev *pctldev, unsigned pin, |
| 778 | unsigned long *config) |
| 779 | { |
| 780 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); |
| 781 | enum pin_config_param param = pinconf_to_config_param(*config); |
| 782 | struct lpc18xx_pin_caps *pin_cap; |
| 783 | int ret, arg = 0; |
| 784 | u32 reg; |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 785 | |
Joachim Eastwood | 403fbde | 2015-05-06 19:11:21 +0200 | [diff] [blame] | 786 | pin_cap = lpc18xx_get_pin_caps(pin); |
| 787 | if (!pin_cap) |
| 788 | return -EINVAL; |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 789 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 790 | reg = readl(scu->base + pin_cap->offset); |
| 791 | |
| 792 | if (pin_cap->type == TYPE_I2C0) |
| 793 | ret = lpc18xx_pconf_get_i2c0(param, &arg, reg, pin); |
| 794 | else if (pin_cap->type == TYPE_USB1) |
| 795 | ret = lpc18xx_pconf_get_usb1(param, &arg, reg); |
| 796 | else |
| 797 | ret = lpc18xx_pconf_get_pin(param, &arg, reg, pin_cap); |
| 798 | |
| 799 | if (ret < 0) |
| 800 | return ret; |
| 801 | |
| 802 | *config = pinconf_to_config_packed(param, (u16)arg); |
| 803 | |
| 804 | return 0; |
| 805 | } |
| 806 | |
| 807 | static int lpc18xx_pconf_set_usb1(struct pinctrl_dev *pctldev, |
| 808 | enum pin_config_param param, |
| 809 | u16 param_val, u32 *reg) |
| 810 | { |
Joachim Eastwood | bd6eab9 | 2015-07-15 00:25:27 +0200 | [diff] [blame] | 811 | switch (param) { |
| 812 | case PIN_CONFIG_LOW_POWER_MODE: |
| 813 | if (param_val) |
| 814 | *reg &= ~LPC18XX_SCU_USB1_EPWR; |
| 815 | else |
| 816 | *reg |= LPC18XX_SCU_USB1_EPWR; |
| 817 | break; |
| 818 | |
| 819 | case PIN_CONFIG_BIAS_DISABLE: |
| 820 | *reg &= ~LPC18XX_SCU_USB1_EPD; |
| 821 | break; |
| 822 | |
| 823 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 824 | *reg |= LPC18XX_SCU_USB1_EPD; |
| 825 | break; |
| 826 | |
| 827 | default: |
| 828 | dev_err(pctldev->dev, "Property not supported\n"); |
| 829 | return -ENOTSUPP; |
| 830 | } |
| 831 | |
| 832 | return 0; |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 833 | } |
| 834 | |
| 835 | static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev, |
| 836 | enum pin_config_param param, |
| 837 | u16 param_val, u32 *reg, |
| 838 | unsigned pin) |
| 839 | { |
| 840 | u8 shift; |
| 841 | |
| 842 | if (pin == PIN_I2C0_SCL) |
| 843 | shift = LPC18XX_SCU_I2C0_SCL_SHIFT; |
| 844 | else |
| 845 | shift = LPC18XX_SCU_I2C0_SDA_SHIFT; |
| 846 | |
| 847 | switch (param) { |
| 848 | case PIN_CONFIG_INPUT_ENABLE: |
| 849 | if (param_val) |
| 850 | *reg |= (LPC18XX_SCU_I2C0_EZI << shift); |
| 851 | else |
| 852 | *reg &= ~(LPC18XX_SCU_I2C0_EZI << shift); |
| 853 | break; |
| 854 | |
| 855 | case PIN_CONFIG_SLEW_RATE: |
| 856 | if (param_val) |
| 857 | *reg |= (LPC18XX_SCU_I2C0_EHD << shift); |
| 858 | else |
| 859 | *reg &= ~(LPC18XX_SCU_I2C0_EHD << shift); |
| 860 | break; |
| 861 | |
| 862 | case PIN_CONFIG_INPUT_SCHMITT: |
| 863 | if (param_val == 3) |
| 864 | *reg |= (LPC18XX_SCU_I2C0_EFP << shift); |
| 865 | else if (param_val == 50) |
| 866 | *reg &= ~(LPC18XX_SCU_I2C0_EFP << shift); |
| 867 | else |
| 868 | return -ENOTSUPP; |
| 869 | break; |
| 870 | |
| 871 | case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
Joachim Eastwood | 681ccdc | 2015-07-15 00:25:26 +0200 | [diff] [blame] | 872 | if (param_val) |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 873 | *reg &= ~(LPC18XX_SCU_I2C0_ZIF << shift); |
| 874 | else |
| 875 | *reg |= (LPC18XX_SCU_I2C0_ZIF << shift); |
| 876 | break; |
| 877 | |
| 878 | default: |
| 879 | dev_err(pctldev->dev, "Property not supported\n"); |
| 880 | return -ENOTSUPP; |
| 881 | } |
| 882 | |
| 883 | return 0; |
| 884 | } |
| 885 | |
| 886 | static int lpc18xx_pconf_set_pin(struct pinctrl_dev *pctldev, |
| 887 | enum pin_config_param param, |
| 888 | u16 param_val, u32 *reg, |
| 889 | struct lpc18xx_pin_caps *pin_cap) |
| 890 | { |
| 891 | switch (param) { |
| 892 | case PIN_CONFIG_BIAS_DISABLE: |
| 893 | *reg &= ~LPC18XX_SCU_PIN_EPD; |
| 894 | *reg |= LPC18XX_SCU_PIN_EPUN; |
| 895 | break; |
| 896 | |
| 897 | case PIN_CONFIG_BIAS_PULL_UP: |
| 898 | *reg &= ~LPC18XX_SCU_PIN_EPUN; |
| 899 | break; |
| 900 | |
| 901 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 902 | *reg |= LPC18XX_SCU_PIN_EPD; |
| 903 | break; |
| 904 | |
| 905 | case PIN_CONFIG_INPUT_ENABLE: |
| 906 | if (param_val) |
| 907 | *reg |= LPC18XX_SCU_PIN_EZI; |
| 908 | else |
| 909 | *reg &= ~LPC18XX_SCU_PIN_EZI; |
| 910 | break; |
| 911 | |
| 912 | case PIN_CONFIG_SLEW_RATE: |
| 913 | if (pin_cap->type == TYPE_HD) { |
| 914 | dev_err(pctldev->dev, "Slew rate unsupported on high-drive pins\n"); |
| 915 | return -ENOTSUPP; |
| 916 | } |
| 917 | |
| 918 | if (param_val == 0) |
| 919 | *reg &= ~LPC18XX_SCU_PIN_EHS; |
| 920 | else |
| 921 | *reg |= LPC18XX_SCU_PIN_EHS; |
| 922 | break; |
| 923 | |
| 924 | case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
Joachim Eastwood | 681ccdc | 2015-07-15 00:25:26 +0200 | [diff] [blame] | 925 | if (param_val) |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 926 | *reg &= ~LPC18XX_SCU_PIN_ZIF; |
| 927 | else |
| 928 | *reg |= LPC18XX_SCU_PIN_ZIF; |
| 929 | break; |
| 930 | |
| 931 | case PIN_CONFIG_DRIVE_STRENGTH: |
| 932 | if (pin_cap->type != TYPE_HD) { |
| 933 | dev_err(pctldev->dev, "Drive strength available only on high-drive pins\n"); |
| 934 | return -ENOTSUPP; |
| 935 | } |
| 936 | *reg &= ~LPC18XX_SCU_PIN_EHD_MASK; |
| 937 | |
| 938 | switch (param_val) { |
| 939 | case 20: param_val -= 5; |
| 940 | case 14: param_val -= 5; |
| 941 | case 8: param_val -= 3; |
| 942 | case 4: param_val -= 4; |
| 943 | break; |
| 944 | default: |
| 945 | dev_err(pctldev->dev, "Drive strength %u unsupported\n", param_val); |
| 946 | return -ENOTSUPP; |
| 947 | } |
| 948 | *reg |= param_val << LPC18XX_SCU_PIN_EHD_POS; |
| 949 | break; |
| 950 | |
| 951 | default: |
| 952 | dev_err(pctldev->dev, "Property not supported\n"); |
| 953 | return -ENOTSUPP; |
| 954 | } |
| 955 | |
| 956 | return 0; |
| 957 | } |
| 958 | |
| 959 | static int lpc18xx_pconf_set(struct pinctrl_dev *pctldev, unsigned pin, |
| 960 | unsigned long *configs, unsigned num_configs) |
| 961 | { |
| 962 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); |
| 963 | struct lpc18xx_pin_caps *pin_cap; |
| 964 | enum pin_config_param param; |
| 965 | u16 param_val; |
| 966 | u32 reg; |
| 967 | int ret; |
| 968 | int i; |
| 969 | |
Joachim Eastwood | 403fbde | 2015-05-06 19:11:21 +0200 | [diff] [blame] | 970 | pin_cap = lpc18xx_get_pin_caps(pin); |
| 971 | if (!pin_cap) |
| 972 | return -EINVAL; |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 973 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 974 | reg = readl(scu->base + pin_cap->offset); |
| 975 | |
| 976 | for (i = 0; i < num_configs; i++) { |
| 977 | param = pinconf_to_config_param(configs[i]); |
| 978 | param_val = pinconf_to_config_argument(configs[i]); |
| 979 | |
| 980 | if (pin_cap->type == TYPE_I2C0) |
| 981 | ret = lpc18xx_pconf_set_i2c0(pctldev, param, param_val, ®, pin); |
| 982 | else if (pin_cap->type == TYPE_USB1) |
| 983 | ret = lpc18xx_pconf_set_usb1(pctldev, param, param_val, ®); |
| 984 | else |
| 985 | ret = lpc18xx_pconf_set_pin(pctldev, param, param_val, ®, pin_cap); |
| 986 | |
| 987 | if (ret) |
| 988 | return ret; |
| 989 | } |
| 990 | |
| 991 | writel(reg, scu->base + pin_cap->offset); |
| 992 | |
| 993 | return 0; |
| 994 | } |
| 995 | |
| 996 | static const struct pinconf_ops lpc18xx_pconf_ops = { |
| 997 | .is_generic = true, |
| 998 | .pin_config_get = lpc18xx_pconf_get, |
| 999 | .pin_config_set = lpc18xx_pconf_set, |
| 1000 | }; |
| 1001 | |
| 1002 | static int lpc18xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev) |
| 1003 | { |
| 1004 | return ARRAY_SIZE(lpc18xx_function_names); |
| 1005 | } |
| 1006 | |
| 1007 | static const char *lpc18xx_pmx_get_func_name(struct pinctrl_dev *pctldev, |
| 1008 | unsigned function) |
| 1009 | { |
| 1010 | return lpc18xx_function_names[function]; |
| 1011 | } |
| 1012 | |
| 1013 | static int lpc18xx_pmx_get_func_groups(struct pinctrl_dev *pctldev, |
| 1014 | unsigned function, |
| 1015 | const char *const **groups, |
| 1016 | unsigned *const num_groups) |
| 1017 | { |
Joachim Eastwood | 16a4851 | 2015-05-14 14:45:58 +0200 | [diff] [blame] | 1018 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); |
| 1019 | |
| 1020 | *groups = scu->func[function].groups; |
| 1021 | *num_groups = scu->func[function].ngroups; |
| 1022 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 1023 | return 0; |
| 1024 | } |
| 1025 | |
| 1026 | static int lpc18xx_pmx_set(struct pinctrl_dev *pctldev, unsigned function, |
| 1027 | unsigned group) |
| 1028 | { |
| 1029 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); |
| 1030 | struct lpc18xx_pin_caps *pin = lpc18xx_pins[group].drv_data; |
| 1031 | int func; |
| 1032 | u32 reg; |
| 1033 | |
| 1034 | /* Dedicated USB1 and I2C0 pins doesn't support muxing */ |
| 1035 | if (pin->type == TYPE_USB1) { |
| 1036 | if (function == FUNC_USB1) |
| 1037 | return 0; |
| 1038 | |
| 1039 | goto fail; |
| 1040 | } |
| 1041 | |
| 1042 | if (pin->type == TYPE_I2C0) { |
| 1043 | if (function == FUNC_I2C0) |
| 1044 | return 0; |
| 1045 | |
| 1046 | goto fail; |
| 1047 | } |
| 1048 | |
| 1049 | if (function == FUNC_ADC && (pin->analog & LPC18XX_ANALOG_PIN)) { |
| 1050 | u32 offset; |
| 1051 | |
| 1052 | writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset); |
| 1053 | |
| 1054 | if (LPC18XX_ANALOG_ADC(pin->analog) == 0) |
| 1055 | offset = LPC18XX_SCU_REG_ENAIO0; |
| 1056 | else |
| 1057 | offset = LPC18XX_SCU_REG_ENAIO1; |
| 1058 | |
| 1059 | reg = readl(scu->base + offset); |
| 1060 | reg |= pin->analog & LPC18XX_ANALOG_BIT_MASK; |
| 1061 | writel(reg, scu->base + offset); |
| 1062 | |
| 1063 | return 0; |
| 1064 | } |
| 1065 | |
| 1066 | if (function == FUNC_DAC && (pin->analog & LPC18XX_ANALOG_PIN)) { |
| 1067 | writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset); |
| 1068 | |
| 1069 | reg = readl(scu->base + LPC18XX_SCU_REG_ENAIO2); |
| 1070 | reg |= LPC18XX_SCU_REG_ENAIO2_DAC; |
| 1071 | writel(reg, scu->base + LPC18XX_SCU_REG_ENAIO2); |
| 1072 | |
| 1073 | return 0; |
| 1074 | } |
| 1075 | |
| 1076 | for (func = 0; func < LPC18XX_SCU_FUNC_PER_PIN; func++) { |
| 1077 | if (function == pin->functions[func]) |
| 1078 | break; |
| 1079 | } |
| 1080 | |
| 1081 | if (func >= LPC18XX_SCU_FUNC_PER_PIN) |
| 1082 | goto fail; |
| 1083 | |
| 1084 | reg = readl(scu->base + pin->offset); |
| 1085 | reg &= ~LPC18XX_SCU_PIN_MODE_MASK; |
| 1086 | writel(reg | func, scu->base + pin->offset); |
| 1087 | |
| 1088 | return 0; |
| 1089 | fail: |
| 1090 | dev_err(pctldev->dev, "Pin %s can't be %s\n", lpc18xx_pins[group].name, |
| 1091 | lpc18xx_function_names[function]); |
| 1092 | return -EINVAL; |
| 1093 | } |
| 1094 | |
| 1095 | static const struct pinmux_ops lpc18xx_pmx_ops = { |
| 1096 | .get_functions_count = lpc18xx_pmx_get_funcs_count, |
| 1097 | .get_function_name = lpc18xx_pmx_get_func_name, |
| 1098 | .get_function_groups = lpc18xx_pmx_get_func_groups, |
| 1099 | .set_mux = lpc18xx_pmx_set, |
| 1100 | }; |
| 1101 | |
| 1102 | static int lpc18xx_pctl_get_groups_count(struct pinctrl_dev *pctldev) |
| 1103 | { |
| 1104 | return ARRAY_SIZE(lpc18xx_pins); |
| 1105 | } |
| 1106 | |
| 1107 | static const char *lpc18xx_pctl_get_group_name(struct pinctrl_dev *pctldev, |
| 1108 | unsigned group) |
| 1109 | { |
| 1110 | return lpc18xx_pins[group].name; |
| 1111 | } |
| 1112 | |
| 1113 | static int lpc18xx_pctl_get_group_pins(struct pinctrl_dev *pctldev, |
| 1114 | unsigned group, |
| 1115 | const unsigned **pins, |
| 1116 | unsigned *num_pins) |
| 1117 | { |
| 1118 | *pins = &lpc18xx_pins[group].number; |
| 1119 | *num_pins = 1; |
| 1120 | |
| 1121 | return 0; |
| 1122 | } |
| 1123 | |
| 1124 | static const struct pinctrl_ops lpc18xx_pctl_ops = { |
| 1125 | .get_groups_count = lpc18xx_pctl_get_groups_count, |
| 1126 | .get_group_name = lpc18xx_pctl_get_group_name, |
| 1127 | .get_group_pins = lpc18xx_pctl_get_group_pins, |
| 1128 | .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, |
| 1129 | .dt_free_map = pinctrl_utils_dt_free_map, |
| 1130 | }; |
| 1131 | |
| 1132 | static struct pinctrl_desc lpc18xx_scu_desc = { |
| 1133 | .name = "lpc18xx/43xx-scu", |
| 1134 | .pins = lpc18xx_pins, |
| 1135 | .npins = ARRAY_SIZE(lpc18xx_pins), |
| 1136 | .pctlops = &lpc18xx_pctl_ops, |
| 1137 | .pmxops = &lpc18xx_pmx_ops, |
| 1138 | .confops = &lpc18xx_pconf_ops, |
| 1139 | .owner = THIS_MODULE, |
| 1140 | }; |
| 1141 | |
Joachim Eastwood | 16a4851 | 2015-05-14 14:45:58 +0200 | [diff] [blame] | 1142 | static bool lpc18xx_valid_pin_function(unsigned pin, unsigned function) |
| 1143 | { |
| 1144 | struct lpc18xx_pin_caps *p = lpc18xx_pins[pin].drv_data; |
| 1145 | int i; |
| 1146 | |
| 1147 | if (function == FUNC_DAC && p->analog == DAC) |
| 1148 | return true; |
| 1149 | |
| 1150 | if (function == FUNC_ADC && p->analog) |
| 1151 | return true; |
| 1152 | |
| 1153 | if (function == FUNC_I2C0 && p->type == TYPE_I2C0) |
| 1154 | return true; |
| 1155 | |
| 1156 | if (function == FUNC_USB1 && p->type == TYPE_USB1) |
| 1157 | return true; |
| 1158 | |
| 1159 | for (i = 0; i < LPC18XX_SCU_FUNC_PER_PIN; i++) { |
| 1160 | if (function == p->functions[i]) |
| 1161 | return true; |
| 1162 | } |
| 1163 | |
| 1164 | return false; |
| 1165 | } |
| 1166 | |
| 1167 | static int lpc18xx_create_group_func_map(struct device *dev, |
| 1168 | struct lpc18xx_scu_data *scu) |
| 1169 | { |
| 1170 | u16 pins[ARRAY_SIZE(lpc18xx_pins)]; |
| 1171 | int func, ngroups, i; |
| 1172 | |
| 1173 | for (func = 0; func < FUNC_MAX; ngroups = 0, func++) { |
| 1174 | |
| 1175 | for (i = 0; i < ARRAY_SIZE(lpc18xx_pins); i++) { |
| 1176 | if (lpc18xx_valid_pin_function(i, func)) |
| 1177 | pins[ngroups++] = i; |
| 1178 | } |
| 1179 | |
| 1180 | scu->func[func].ngroups = ngroups; |
| 1181 | scu->func[func].groups = devm_kzalloc(dev, ngroups * |
| 1182 | sizeof(char *), GFP_KERNEL); |
| 1183 | if (!scu->func[func].groups) |
| 1184 | return -ENOMEM; |
| 1185 | |
| 1186 | for (i = 0; i < ngroups; i++) |
| 1187 | scu->func[func].groups[i] = lpc18xx_pins[pins[i]].name; |
| 1188 | } |
| 1189 | |
| 1190 | return 0; |
| 1191 | } |
| 1192 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 1193 | static int lpc18xx_scu_probe(struct platform_device *pdev) |
| 1194 | { |
| 1195 | struct lpc18xx_scu_data *scu; |
| 1196 | struct resource *res; |
| 1197 | int ret; |
| 1198 | |
| 1199 | scu = devm_kzalloc(&pdev->dev, sizeof(*scu), GFP_KERNEL); |
| 1200 | if (!scu) |
| 1201 | return -ENOMEM; |
| 1202 | |
| 1203 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1204 | scu->base = devm_ioremap_resource(&pdev->dev, res); |
| 1205 | if (IS_ERR(scu->base)) |
| 1206 | return PTR_ERR(scu->base); |
| 1207 | |
| 1208 | scu->clk = devm_clk_get(&pdev->dev, NULL); |
| 1209 | if (IS_ERR(scu->clk)) { |
| 1210 | dev_err(&pdev->dev, "Input clock not found.\n"); |
| 1211 | return PTR_ERR(scu->clk); |
| 1212 | } |
| 1213 | |
Joachim Eastwood | 16a4851 | 2015-05-14 14:45:58 +0200 | [diff] [blame] | 1214 | ret = lpc18xx_create_group_func_map(&pdev->dev, scu); |
| 1215 | if (ret) { |
| 1216 | dev_err(&pdev->dev, "Unable to create group func map.\n"); |
| 1217 | return ret; |
| 1218 | } |
| 1219 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 1220 | ret = clk_prepare_enable(scu->clk); |
| 1221 | if (ret) { |
| 1222 | dev_err(&pdev->dev, "Unable to enable clock.\n"); |
| 1223 | return ret; |
| 1224 | } |
| 1225 | |
| 1226 | platform_set_drvdata(pdev, scu); |
| 1227 | |
| 1228 | scu->pctl = pinctrl_register(&lpc18xx_scu_desc, &pdev->dev, scu); |
Masahiro Yamada | 323de9e | 2015-06-09 13:01:16 +0900 | [diff] [blame] | 1229 | if (IS_ERR(scu->pctl)) { |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 1230 | dev_err(&pdev->dev, "Could not register pinctrl driver\n"); |
| 1231 | clk_disable_unprepare(scu->clk); |
Masahiro Yamada | 323de9e | 2015-06-09 13:01:16 +0900 | [diff] [blame] | 1232 | return PTR_ERR(scu->pctl); |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 1233 | } |
| 1234 | |
| 1235 | return 0; |
| 1236 | } |
| 1237 | |
| 1238 | static int lpc18xx_scu_remove(struct platform_device *pdev) |
| 1239 | { |
| 1240 | struct lpc18xx_scu_data *scu = platform_get_drvdata(pdev); |
| 1241 | |
| 1242 | pinctrl_unregister(scu->pctl); |
| 1243 | clk_disable_unprepare(scu->clk); |
| 1244 | |
| 1245 | return 0; |
| 1246 | } |
| 1247 | |
| 1248 | static const struct of_device_id lpc18xx_scu_match[] = { |
| 1249 | { .compatible = "nxp,lpc1850-scu" }, |
| 1250 | {}, |
| 1251 | }; |
| 1252 | MODULE_DEVICE_TABLE(of, lpc18xx_scu_match); |
| 1253 | |
| 1254 | static struct platform_driver lpc18xx_scu_driver = { |
| 1255 | .probe = lpc18xx_scu_probe, |
| 1256 | .remove = lpc18xx_scu_remove, |
| 1257 | .driver = { |
| 1258 | .name = "lpc18xx-scu", |
| 1259 | .of_match_table = lpc18xx_scu_match, |
| 1260 | }, |
| 1261 | }; |
| 1262 | module_platform_driver(lpc18xx_scu_driver); |
| 1263 | |
| 1264 | MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>"); |
| 1265 | MODULE_DESCRIPTION("Pinctrl driver for NXP LPC18xx/43xx SCU"); |
| 1266 | MODULE_LICENSE("GPL v2"); |