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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * ata-it821x.c - IT821x PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * based upon
7 *
8 * it821x.c
Jeff Garzik85cd7252006-08-31 00:03:49 -04009 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040010 * linux/drivers/ide/pci/it821x.c Version 0.09 December 2004
11 *
12 * Copyright (C) 2004 Red Hat <alan@redhat.com>
13 *
14 * May be copied or modified under the terms of the GNU General Public License
15 * Based in part on the ITE vendor provided SCSI driver.
16 *
17 * Documentation available from
18 * http://www.ite.com.tw/pc/IT8212F_V04.pdf
19 * Some other documents are NDA.
20 *
21 * The ITE8212 isn't exactly a standard IDE controller. It has two
22 * modes. In pass through mode then it is an IDE controller. In its smart
23 * mode its actually quite a capable hardware raid controller disguised
24 * as an IDE controller. Smart mode only understands DMA read/write and
25 * identify, none of the fancier commands apply. The IT8211 is identical
26 * in other respects but lacks the raid mode.
27 *
28 * Errata:
29 * o Rev 0x10 also requires master/slave hold the same DMA timings and
30 * cannot do ATAPI MWDMA.
31 * o The identify data for raid volumes lacks CHS info (technically ok)
32 * but also fails to set the LBA28 and other bits. We fix these in
33 * the IDE probe quirk code.
34 * o If you write LBA48 sized I/O's (ie > 256 sector) in smart mode
35 * raid then the controller firmware dies
36 * o Smart mode without RAID doesn't clear all the necessary identify
37 * bits to reduce the command set to the one used
38 *
39 * This has a few impacts on the driver
40 * - In pass through mode we do all the work you would expect
41 * - In smart mode the clocking set up is done by the controller generally
42 * but we must watch the other limits and filter.
43 * - There are a few extra vendor commands that actually talk to the
44 * controller but only work PIO with no IRQ.
45 *
46 * Vendor areas of the identify block in smart mode are used for the
47 * timing and policy set up. Each HDD in raid mode also has a serial
48 * block on the disk. The hardware extra commands are get/set chip status,
49 * rebuild, get rebuild status.
50 *
51 * In Linux the driver supports pass through mode as if the device was
52 * just another IDE controller. If the smart mode is running then
53 * volumes are managed by the controller firmware and each IDE "disk"
54 * is a raid volume. Even more cute - the controller can do automated
55 * hotplug and rebuild.
56 *
57 * The pass through controller itself is a little demented. It has a
58 * flaw that it has a single set of PIO/MWDMA timings per channel so
59 * non UDMA devices restrict each others performance. It also has a
60 * single clock source per channel so mixed UDMA100/133 performance
61 * isn't perfect and we have to pick a clock. Thankfully none of this
62 * matters in smart mode. ATAPI DMA is not currently supported.
63 *
64 * It seems the smart mode is a win for RAID1/RAID10 but otherwise not.
65 *
66 * TODO
67 * - ATAPI and other speed filtering
68 * - Command filter in smart mode
69 * - RAID configuration ioctls
70 */
71
72#include <linux/kernel.h>
73#include <linux/module.h>
74#include <linux/pci.h>
75#include <linux/init.h>
76#include <linux/blkdev.h>
77#include <linux/delay.h>
78#include <scsi/scsi_host.h>
79#include <linux/libata.h>
80
81
82#define DRV_NAME "pata_it821x"
83#define DRV_VERSION "0.3.2"
84
85struct it821x_dev
86{
87 unsigned int smart:1, /* Are we in smart raid mode */
88 timing10:1; /* Rev 0x10 */
89 u8 clock_mode; /* 0, ATA_50 or ATA_66 */
90 u8 want[2][2]; /* Mode/Pri log for master slave */
91 /* We need these for switching the clock when DMA goes on/off
92 The high byte is the 66Mhz timing */
93 u16 pio[2]; /* Cached PIO values */
94 u16 mwdma[2]; /* Cached MWDMA values */
95 u16 udma[2]; /* Cached UDMA values (per drive) */
96 u16 last_device; /* Master or slave loaded ? */
97};
98
99#define ATA_66 0
100#define ATA_50 1
101#define ATA_ANY 2
102
103#define UDMA_OFF 0
104#define MWDMA_OFF 0
105
106/*
107 * We allow users to force the card into non raid mode without
108 * flashing the alternative BIOS. This is also neccessary right now
109 * for embedded platforms that cannot run a PC BIOS but are using this
110 * device.
111 */
112
113static int it8212_noraid;
114
115/**
116 * it821x_pre_reset - probe
117 * @ap: ATA port
118 *
119 * Set the cable type
120 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400121
Jeff Garzik669a5db2006-08-29 18:12:40 -0400122static int it821x_pre_reset(struct ata_port *ap)
123{
124 ap->cbl = ATA_CBL_PATA80;
125 return ata_std_prereset(ap);
126}
127
128/**
129 * it821x_error_handler - probe/reset
130 * @ap: ATA port
131 *
132 * Set the cable type and trigger a probe
133 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400134
Jeff Garzik669a5db2006-08-29 18:12:40 -0400135static void it821x_error_handler(struct ata_port *ap)
136{
137 return ata_bmdma_drive_eh(ap, it821x_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
138}
139
140/**
141 * it821x_program - program the PIO/MWDMA registers
142 * @ap: ATA port
143 * @adev: Device to program
144 * @timing: Timing value (66Mhz in top 8bits, 50 in the low 8)
145 *
146 * Program the PIO/MWDMA timing for this channel according to the
147 * current clock. These share the same register so are managed by
148 * the DMA start/stop sequence as with the old driver.
149 */
150
151static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
152{
153 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
154 struct it821x_dev *itdev = ap->private_data;
155 int channel = ap->port_no;
156 u8 conf;
157
158 /* Program PIO/MWDMA timing bits */
159 if (itdev->clock_mode == ATA_66)
160 conf = timing >> 8;
161 else
162 conf = timing & 0xFF;
163 pci_write_config_byte(pdev, 0x54 + 4 * channel, conf);
164}
165
166
167/**
168 * it821x_program_udma - program the UDMA registers
169 * @ap: ATA port
170 * @adev: ATA device to update
171 * @timing: Timing bits. Top 8 are for 66Mhz bottom for 50Mhz
172 *
173 * Program the UDMA timing for this drive according to the
174 * current clock. Handles the dual clocks and also knows about
175 * the errata on the 0x10 revision. The UDMA errata is partly handled
176 * here and partly in start_dma.
177 */
178
179static void it821x_program_udma(struct ata_port *ap, struct ata_device *adev, u16 timing)
180{
181 struct it821x_dev *itdev = ap->private_data;
182 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
183 int channel = ap->port_no;
184 int unit = adev->devno;
185 u8 conf;
186
187 /* Program UDMA timing bits */
188 if (itdev->clock_mode == ATA_66)
189 conf = timing >> 8;
190 else
191 conf = timing & 0xFF;
192 if (itdev->timing10 == 0)
193 pci_write_config_byte(pdev, 0x56 + 4 * channel + unit, conf);
194 else {
195 /* Early revision must be programmed for both together */
196 pci_write_config_byte(pdev, 0x56 + 4 * channel, conf);
197 pci_write_config_byte(pdev, 0x56 + 4 * channel + 1, conf);
198 }
199}
200
201/**
202 * it821x_clock_strategy
203 * @ap: ATA interface
204 * @adev: ATA device being updated
205 *
206 * Select between the 50 and 66Mhz base clocks to get the best
207 * results for this interface.
208 */
209
210static void it821x_clock_strategy(struct ata_port *ap, struct ata_device *adev)
211{
212 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
213 struct it821x_dev *itdev = ap->private_data;
214 u8 unit = adev->devno;
215 struct ata_device *pair = ata_dev_pair(adev);
216
217 int clock, altclock;
218 u8 v;
219 int sel = 0;
220
221 /* Look for the most wanted clocking */
222 if (itdev->want[0][0] > itdev->want[1][0]) {
223 clock = itdev->want[0][1];
224 altclock = itdev->want[1][1];
225 } else {
226 clock = itdev->want[1][1];
227 altclock = itdev->want[0][1];
228 }
229
230 /* Master doesn't care does the slave ? */
231 if (clock == ATA_ANY)
232 clock = altclock;
233
234 /* Nobody cares - keep the same clock */
235 if (clock == ATA_ANY)
236 return;
237 /* No change */
238 if (clock == itdev->clock_mode)
239 return;
240
241 /* Load this into the controller */
242 if (clock == ATA_66)
243 itdev->clock_mode = ATA_66;
244 else {
245 itdev->clock_mode = ATA_50;
246 sel = 1;
247 }
248 pci_read_config_byte(pdev, 0x50, &v);
249 v &= ~(1 << (1 + ap->port_no));
250 v |= sel << (1 + ap->port_no);
251 pci_write_config_byte(pdev, 0x50, v);
252
253 /*
254 * Reprogram the UDMA/PIO of the pair drive for the switch
255 * MWDMA will be dealt with by the dma switcher
256 */
257 if (pair && itdev->udma[1-unit] != UDMA_OFF) {
258 it821x_program_udma(ap, pair, itdev->udma[1-unit]);
259 it821x_program(ap, pair, itdev->pio[1-unit]);
260 }
261 /*
262 * Reprogram the UDMA/PIO of our drive for the switch.
263 * MWDMA will be dealt with by the dma switcher
264 */
265 if (itdev->udma[unit] != UDMA_OFF) {
266 it821x_program_udma(ap, adev, itdev->udma[unit]);
267 it821x_program(ap, adev, itdev->pio[unit]);
268 }
269}
270
271/**
272 * it821x_passthru_set_piomode - set PIO mode data
273 * @ap: ATA interface
274 * @adev: ATA device
275 *
276 * Configure for PIO mode. This is complicated as the register is
277 * shared by PIO and MWDMA and for both channels.
278 */
279
280static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device *adev)
281{
282 /* Spec says 89 ref driver uses 88 */
283 static const u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
284 static const u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
285
286 struct it821x_dev *itdev = ap->private_data;
287 int unit = adev->devno;
288 int mode_wanted = adev->pio_mode - XFER_PIO_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400289
Jeff Garzik669a5db2006-08-29 18:12:40 -0400290 /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
291 itdev->want[unit][1] = pio_want[mode_wanted];
292 itdev->want[unit][0] = 1; /* PIO is lowest priority */
293 itdev->pio[unit] = pio[mode_wanted];
294 it821x_clock_strategy(ap, adev);
295 it821x_program(ap, adev, itdev->pio[unit]);
296}
297
298/**
299 * it821x_passthru_set_dmamode - set initial DMA mode data
300 * @ap: ATA interface
301 * @adev: ATA device
302 *
303 * Set up the DMA modes. The actions taken depend heavily on the mode
Jeff Garzik85cd7252006-08-31 00:03:49 -0400304 * to use. If UDMA is used as is hopefully the usual case then the
Jeff Garzik669a5db2006-08-29 18:12:40 -0400305 * timing register is private and we need only consider the clock. If
306 * we are using MWDMA then we have to manage the setting ourself as
307 * we switch devices and mode.
308 */
309
310static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *adev)
311{
312 static const u16 dma[] = { 0x8866, 0x3222, 0x3121 };
313 static const u8 mwdma_want[] = { ATA_ANY, ATA_66, ATA_ANY };
314 static const u16 udma[] = { 0x4433, 0x4231, 0x3121, 0x2121, 0x1111, 0x2211, 0x1111 };
315 static const u8 udma_want[] = { ATA_ANY, ATA_50, ATA_ANY, ATA_66, ATA_66, ATA_50, ATA_66 };
316
317 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
318 struct it821x_dev *itdev = ap->private_data;
319 int channel = ap->port_no;
320 int unit = adev->devno;
321 u8 conf;
322
323 if (adev->dma_mode >= XFER_UDMA_0) {
324 int mode_wanted = adev->dma_mode - XFER_UDMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400325
Jeff Garzik669a5db2006-08-29 18:12:40 -0400326 itdev->want[unit][1] = udma_want[mode_wanted];
327 itdev->want[unit][0] = 3; /* UDMA is high priority */
328 itdev->mwdma[unit] = MWDMA_OFF;
329 itdev->udma[unit] = udma[mode_wanted];
330 if (mode_wanted >= 5)
331 itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
332
333 /* UDMA on. Again revision 0x10 must do the pair */
334 pci_read_config_byte(pdev, 0x50, &conf);
335 if (itdev->timing10)
336 conf &= channel ? 0x9F: 0xE7;
337 else
338 conf &= ~ (1 << (3 + 2 * channel + unit));
339 pci_write_config_byte(pdev, 0x50, conf);
340 it821x_clock_strategy(ap, adev);
341 it821x_program_udma(ap, adev, itdev->udma[unit]);
342 } else {
343 int mode_wanted = adev->dma_mode - XFER_MW_DMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400344
Jeff Garzik669a5db2006-08-29 18:12:40 -0400345 itdev->want[unit][1] = mwdma_want[mode_wanted];
346 itdev->want[unit][0] = 2; /* MWDMA is low priority */
347 itdev->mwdma[unit] = dma[mode_wanted];
348 itdev->udma[unit] = UDMA_OFF;
349
350 /* UDMA bits off - Revision 0x10 do them in pairs */
351 pci_read_config_byte(pdev, 0x50, &conf);
352 if (itdev->timing10)
353 conf |= channel ? 0x60: 0x18;
354 else
355 conf |= 1 << (3 + 2 * channel + unit);
356 pci_write_config_byte(pdev, 0x50, conf);
357 it821x_clock_strategy(ap, adev);
358 }
359}
360
361/**
362 * it821x_passthru_dma_start - DMA start callback
363 * @qc: Command in progress
364 *
365 * Usually drivers set the DMA timing at the point the set_dmamode call
Jeff Garzik85cd7252006-08-31 00:03:49 -0400366 * is made. IT821x however requires we load new timings on the
Jeff Garzik669a5db2006-08-29 18:12:40 -0400367 * transitions in some cases.
368 */
369
370static void it821x_passthru_bmdma_start(struct ata_queued_cmd *qc)
371{
372 struct ata_port *ap = qc->ap;
373 struct ata_device *adev = qc->dev;
374 struct it821x_dev *itdev = ap->private_data;
375 int unit = adev->devno;
376
377 if (itdev->mwdma[unit] != MWDMA_OFF)
378 it821x_program(ap, adev, itdev->mwdma[unit]);
379 else if (itdev->udma[unit] != UDMA_OFF && itdev->timing10)
380 it821x_program_udma(ap, adev, itdev->udma[unit]);
381 ata_bmdma_start(qc);
382}
383
384/**
385 * it821x_passthru_dma_stop - DMA stop callback
386 * @qc: ATA command
387 *
388 * We loaded new timings in dma_start, as a result we need to restore
389 * the PIO timings in dma_stop so that the next command issue gets the
390 * right clock values.
391 */
392
393static void it821x_passthru_bmdma_stop(struct ata_queued_cmd *qc)
394{
395 struct ata_port *ap = qc->ap;
396 struct ata_device *adev = qc->dev;
397 struct it821x_dev *itdev = ap->private_data;
398 int unit = adev->devno;
399
400 ata_bmdma_stop(qc);
401 if (itdev->mwdma[unit] != MWDMA_OFF)
402 it821x_program(ap, adev, itdev->pio[unit]);
403}
404
405
406/**
407 * it821x_passthru_dev_select - Select master/slave
408 * @ap: ATA port
409 * @device: Device number (not pointer)
410 *
411 * Device selection hook. If neccessary perform clock switching
412 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400413
Jeff Garzik669a5db2006-08-29 18:12:40 -0400414static void it821x_passthru_dev_select(struct ata_port *ap,
415 unsigned int device)
416{
417 struct it821x_dev *itdev = ap->private_data;
418 if (itdev && device != itdev->last_device) {
419 struct ata_device *adev = &ap->device[device];
420 it821x_program(ap, adev, itdev->pio[adev->devno]);
421 itdev->last_device = device;
422 }
423 ata_std_dev_select(ap, device);
424}
425
426/**
427 * it821x_smart_qc_issue_prot - wrap qc issue prot
428 * @qc: command
429 *
430 * Wrap the command issue sequence for the IT821x. We need to
431 * perform out own device selection timing loads before the
432 * usual happenings kick off
433 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400434
Jeff Garzik669a5db2006-08-29 18:12:40 -0400435static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc)
436{
437 switch(qc->tf.command)
438 {
439 /* Commands the firmware supports */
440 case ATA_CMD_READ:
441 case ATA_CMD_READ_EXT:
442 case ATA_CMD_WRITE:
443 case ATA_CMD_WRITE_EXT:
444 case ATA_CMD_PIO_READ:
445 case ATA_CMD_PIO_READ_EXT:
446 case ATA_CMD_PIO_WRITE:
447 case ATA_CMD_PIO_WRITE_EXT:
448 case ATA_CMD_READ_MULTI:
449 case ATA_CMD_READ_MULTI_EXT:
450 case ATA_CMD_WRITE_MULTI:
451 case ATA_CMD_WRITE_MULTI_EXT:
452 case ATA_CMD_ID_ATA:
453 /* Arguably should just no-op this one */
454 case ATA_CMD_SET_FEATURES:
455 return ata_qc_issue_prot(qc);
456 }
457 printk(KERN_DEBUG "it821x: can't process command 0x%02X\n", qc->tf.command);
458 return AC_ERR_INVALID;
459}
460
461/**
462 * it821x_passthru_qc_issue_prot - wrap qc issue prot
463 * @qc: command
464 *
465 * Wrap the command issue sequence for the IT821x. We need to
466 * perform out own device selection timing loads before the
467 * usual happenings kick off
468 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400469
Jeff Garzik669a5db2006-08-29 18:12:40 -0400470static unsigned int it821x_passthru_qc_issue_prot(struct ata_queued_cmd *qc)
471{
472 it821x_passthru_dev_select(qc->ap, qc->dev->devno);
473 return ata_qc_issue_prot(qc);
474}
475
476/**
477 * it821x_smart_set_mode - mode setting
478 * @ap: interface to set up
479 *
480 * Use a non standard set_mode function. We don't want to be tuned.
481 * The BIOS configured everything. Our job is not to fiddle. We
482 * read the dma enabled bits from the PCI configuration of the device
Jeff Garzik85cd7252006-08-31 00:03:49 -0400483 * and respect them.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400484 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400485
Jeff Garzik669a5db2006-08-29 18:12:40 -0400486static void it821x_smart_set_mode(struct ata_port *ap)
487{
488 int dma_enabled = 0;
489 int i;
490
491 /* Bits 5 and 6 indicate if DMA is active on master/slave */
492 /* It is possible that BMDMA isn't allocated */
493 if (ap->ioaddr.bmdma_addr)
494 dma_enabled = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400495
Jeff Garzik669a5db2006-08-29 18:12:40 -0400496 for (i = 0; i < ATA_MAX_DEVICES; i++) {
497 struct ata_device *dev = &ap->device[i];
498 if (ata_dev_enabled(dev)) {
499 /* We don't really care */
500 dev->pio_mode = XFER_PIO_0;
501 dev->dma_mode = XFER_MW_DMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400502 /* We do need the right mode information for DMA or PIO
Jeff Garzik669a5db2006-08-29 18:12:40 -0400503 and this comes from the current configuration flags */
504 if (dma_enabled & (1 << (5 + i))) {
505 dev->xfer_mode = XFER_MW_DMA_0;
506 dev->xfer_shift = ATA_SHIFT_MWDMA;
507 dev->flags &= ~ATA_DFLAG_PIO;
508 } else {
509 dev->xfer_mode = XFER_PIO_0;
510 dev->xfer_shift = ATA_SHIFT_PIO;
511 dev->flags |= ATA_DFLAG_PIO;
512 }
513 }
514 }
515}
516
517/**
518 * it821x_dev_config - Called each device identify
519 * @ap: ATA port
520 * @adev: Device that has just been identified
521 *
522 * Perform the initial setup needed for each device that is chip
523 * special. In our case we need to lock the sector count to avoid
524 * blowing the brains out of the firmware with large LBA48 requests
525 *
526 * FIXME: When FUA appears we need to block FUA too. And SMART and
527 * basically we need to filter commands for this chip.
528 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400529
Jeff Garzik669a5db2006-08-29 18:12:40 -0400530static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev)
531{
532 unsigned char model_num[40];
533 char *s;
534 unsigned int len;
535
536 /* This block ought to be a library routine as it is in several
537 drivers now */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400538
Jeff Garzik669a5db2006-08-29 18:12:40 -0400539 ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS,
540 sizeof(model_num));
541 s = &model_num[0];
542 len = strnlen(s, sizeof(model_num));
543
544 /* ATAPI specifies that empty space is blank-filled; remove blanks */
545 while ((len > 0) && (s[len - 1] == ' ')) {
546 len--;
547 s[len] = 0;
548 }
549
550 if (adev->max_sectors > 255)
551 adev->max_sectors = 255;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400552
Jeff Garzik669a5db2006-08-29 18:12:40 -0400553 if (strstr(model_num, "Integrated Technology Express")) {
554 /* RAID mode */
555 printk(KERN_INFO "IT821x %sRAID%d volume",
556 adev->id[147]?"Bootable ":"",
557 adev->id[129]);
558 if (adev->id[129] != 1)
559 printk("(%dK stripe)", adev->id[146]);
560 printk(".\n");
561 }
562}
563
564
565/**
566 * it821x_check_atapi_dma - ATAPI DMA handler
567 * @qc: Command we are about to issue
568 *
569 * Decide if this ATAPI command can be issued by DMA on this
570 * controller. Return 0 if it can be.
571 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400572
Jeff Garzik669a5db2006-08-29 18:12:40 -0400573static int it821x_check_atapi_dma(struct ata_queued_cmd *qc)
574{
575 struct ata_port *ap = qc->ap;
576 struct it821x_dev *itdev = ap->private_data;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400577
Jeff Garzik669a5db2006-08-29 18:12:40 -0400578 /* No ATAPI DMA in smart mode */
579 if (itdev->smart)
580 return -EOPNOTSUPP;
581 /* No ATAPI DMA on rev 10 */
582 if (itdev->timing10)
583 return -EOPNOTSUPP;
584 /* Cool */
585 return 0;
586}
Jeff Garzik85cd7252006-08-31 00:03:49 -0400587
Jeff Garzik669a5db2006-08-29 18:12:40 -0400588
589/**
590 * it821x_port_start - port setup
591 * @ap: ATA port being set up
592 *
593 * The it821x needs to maintain private data structures and also to
594 * use the standard PCI interface which lacks support for this
Jeff Garzik85cd7252006-08-31 00:03:49 -0400595 * functionality. We instead set up the private data on the port
Jeff Garzik669a5db2006-08-29 18:12:40 -0400596 * start hook, and tear it down on port stop
597 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400598
Jeff Garzik669a5db2006-08-29 18:12:40 -0400599static int it821x_port_start(struct ata_port *ap)
600{
601 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
602 struct it821x_dev *itdev;
603 u8 conf;
604
605 int ret = ata_port_start(ap);
606 if (ret < 0)
607 return ret;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400608
Jeff Garzik669a5db2006-08-29 18:12:40 -0400609 ap->private_data = kmalloc(sizeof(struct it821x_dev), GFP_KERNEL);
610 if (ap->private_data == NULL) {
611 ata_port_stop(ap);
612 return -ENOMEM;
613 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400614
Jeff Garzik669a5db2006-08-29 18:12:40 -0400615 itdev = ap->private_data;
616 memset(itdev, 0, sizeof(struct it821x_dev));
617
618 pci_read_config_byte(pdev, 0x50, &conf);
619
620 if (conf & 1) {
621 itdev->smart = 1;
622 /* Long I/O's although allowed in LBA48 space cause the
623 onboard firmware to enter the twighlight zone */
624 /* No ATAPI DMA in this mode either */
625 }
626 /* Pull the current clocks from 0x50 */
627 if (conf & (1 << (1 + ap->port_no)))
628 itdev->clock_mode = ATA_50;
629 else
630 itdev->clock_mode = ATA_66;
631
632 itdev->want[0][1] = ATA_ANY;
633 itdev->want[1][1] = ATA_ANY;
634 itdev->last_device = -1;
635
636 pci_read_config_byte(pdev, PCI_REVISION_ID, &conf);
637 if (conf == 0x10) {
638 itdev->timing10 = 1;
639 /* Need to disable ATAPI DMA for this case */
640 if (!itdev->smart)
641 printk(KERN_WARNING DRV_NAME": Revision 0x10, workarounds activated.\n");
642 }
643
644 return 0;
645}
646
647/**
648 * it821x_port_stop - port shutdown
649 * @ap: ATA port being removed
650 *
651 * Release the private objects we added in it821x_port_start
652 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400653
Jeff Garzik669a5db2006-08-29 18:12:40 -0400654static void it821x_port_stop(struct ata_port *ap) {
655 kfree(ap->private_data);
656 ap->private_data = NULL; /* We want an OOPS if we reuse this
657 too late! */
658 ata_port_stop(ap);
659}
660
661static struct scsi_host_template it821x_sht = {
662 .module = THIS_MODULE,
663 .name = DRV_NAME,
664 .ioctl = ata_scsi_ioctl,
665 .queuecommand = ata_scsi_queuecmd,
666 .can_queue = ATA_DEF_QUEUE,
667 .this_id = ATA_SHT_THIS_ID,
668 .sg_tablesize = LIBATA_MAX_PRD,
669 /* 255 sectors to begin with. This is locked in smart mode but not
670 in pass through */
671 .max_sectors = 255,
672 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
673 .emulated = ATA_SHT_EMULATED,
674 .use_clustering = ATA_SHT_USE_CLUSTERING,
675 .proc_name = DRV_NAME,
676 .dma_boundary = ATA_DMA_BOUNDARY,
677 .slave_configure = ata_scsi_slave_config,
678 .bios_param = ata_std_bios_param,
679};
680
681static struct ata_port_operations it821x_smart_port_ops = {
682 .set_mode = it821x_smart_set_mode,
683 .port_disable = ata_port_disable,
684 .tf_load = ata_tf_load,
685 .tf_read = ata_tf_read,
686 .mode_filter = ata_pci_default_filter,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400687
Jeff Garzik669a5db2006-08-29 18:12:40 -0400688 .check_status = ata_check_status,
689 .check_atapi_dma= it821x_check_atapi_dma,
690 .exec_command = ata_exec_command,
691 .dev_select = ata_std_dev_select,
692 .dev_config = it821x_dev_config,
693
694 .freeze = ata_bmdma_freeze,
695 .thaw = ata_bmdma_thaw,
696 .error_handler = it821x_error_handler,
697 .post_internal_cmd = ata_bmdma_post_internal_cmd,
698
699 .bmdma_setup = ata_bmdma_setup,
700 .bmdma_start = ata_bmdma_start,
701 .bmdma_stop = ata_bmdma_stop,
702 .bmdma_status = ata_bmdma_status,
703
704 .qc_prep = ata_qc_prep,
705 .qc_issue = it821x_smart_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400706
Jeff Garzik669a5db2006-08-29 18:12:40 -0400707 .data_xfer = ata_pio_data_xfer,
708
709 .irq_handler = ata_interrupt,
710 .irq_clear = ata_bmdma_irq_clear,
711
712 .port_start = it821x_port_start,
713 .port_stop = it821x_port_stop,
714 .host_stop = ata_host_stop
Jeff Garzik85cd7252006-08-31 00:03:49 -0400715};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400716
717static struct ata_port_operations it821x_passthru_port_ops = {
718 .port_disable = ata_port_disable,
719 .set_piomode = it821x_passthru_set_piomode,
720 .set_dmamode = it821x_passthru_set_dmamode,
721 .mode_filter = ata_pci_default_filter,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400722
Jeff Garzik669a5db2006-08-29 18:12:40 -0400723 .tf_load = ata_tf_load,
724 .tf_read = ata_tf_read,
725 .check_status = ata_check_status,
726 .exec_command = ata_exec_command,
727 .check_atapi_dma= it821x_check_atapi_dma,
728 .dev_select = it821x_passthru_dev_select,
729
730 .freeze = ata_bmdma_freeze,
731 .thaw = ata_bmdma_thaw,
732 .error_handler = it821x_error_handler,
733 .post_internal_cmd = ata_bmdma_post_internal_cmd,
734
735 .bmdma_setup = ata_bmdma_setup,
736 .bmdma_start = it821x_passthru_bmdma_start,
737 .bmdma_stop = it821x_passthru_bmdma_stop,
738 .bmdma_status = ata_bmdma_status,
739
740 .qc_prep = ata_qc_prep,
741 .qc_issue = it821x_passthru_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400742
Jeff Garzik669a5db2006-08-29 18:12:40 -0400743 .data_xfer = ata_pio_data_xfer,
744
745 .irq_clear = ata_bmdma_irq_clear,
746 .irq_handler = ata_interrupt,
747
748 .port_start = it821x_port_start,
749 .port_stop = it821x_port_stop,
750 .host_stop = ata_host_stop
Jeff Garzik85cd7252006-08-31 00:03:49 -0400751};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400752
753static void __devinit it821x_disable_raid(struct pci_dev *pdev)
754{
755 /* Reset local CPU, and set BIOS not ready */
756 pci_write_config_byte(pdev, 0x5E, 0x01);
757
758 /* Set to bypass mode, and reset PCI bus */
759 pci_write_config_byte(pdev, 0x50, 0x00);
760 pci_write_config_word(pdev, PCI_COMMAND,
761 PCI_COMMAND_PARITY | PCI_COMMAND_IO |
762 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
763 pci_write_config_word(pdev, 0x40, 0xA0F3);
764
765 pci_write_config_dword(pdev,0x4C, 0x02040204);
766 pci_write_config_byte(pdev, 0x42, 0x36);
767 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
768}
769
Jeff Garzik85cd7252006-08-31 00:03:49 -0400770
Jeff Garzik669a5db2006-08-29 18:12:40 -0400771static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
772{
773 u8 conf;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400774
Jeff Garzik669a5db2006-08-29 18:12:40 -0400775 static struct ata_port_info info_smart = {
776 .sht = &it821x_sht,
777 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
778 .pio_mask = 0x1f,
779 .mwdma_mask = 0x07,
780 .port_ops = &it821x_smart_port_ops
781 };
782 static struct ata_port_info info_passthru = {
783 .sht = &it821x_sht,
784 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
785 .pio_mask = 0x1f,
786 .mwdma_mask = 0x07,
787 .udma_mask = 0x7f,
788 .port_ops = &it821x_passthru_port_ops
789 };
790 static struct ata_port_info *port_info[2];
Jeff Garzik85cd7252006-08-31 00:03:49 -0400791
Jeff Garzik669a5db2006-08-29 18:12:40 -0400792 static char *mode[2] = { "pass through", "smart" };
793
794 /* Force the card into bypass mode if so requested */
795 if (it8212_noraid) {
796 printk(KERN_INFO DRV_NAME ": forcing bypass mode.\n");
797 it821x_disable_raid(pdev);
798 }
799 pci_read_config_byte(pdev, 0x50, &conf);
800 conf &= 1;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400801
Jeff Garzik669a5db2006-08-29 18:12:40 -0400802 printk(KERN_INFO DRV_NAME ": controller in %s mode.\n", mode[conf]);
803 if (conf == 0)
804 port_info[0] = port_info[1] = &info_passthru;
805 else
806 port_info[0] = port_info[1] = &info_smart;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400807
Jeff Garzik669a5db2006-08-29 18:12:40 -0400808 return ata_pci_init_one(pdev, port_info, 2);
809}
810
811static struct pci_device_id it821x[] = {
812 { PCI_DEVICE(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8211), },
813 { PCI_DEVICE(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212), },
814 { 0, },
815};
816
817static struct pci_driver it821x_pci_driver = {
818 .name = DRV_NAME,
819 .id_table = it821x,
820 .probe = it821x_init_one,
821 .remove = ata_pci_remove_one
822};
823
824static int __init it821x_init(void)
825{
826 return pci_register_driver(&it821x_pci_driver);
827}
828
829
830static void __exit it821x_exit(void)
831{
832 pci_unregister_driver(&it821x_pci_driver);
833}
834
835
836MODULE_AUTHOR("Alan Cox");
837MODULE_DESCRIPTION("low-level driver for the IT8211/IT8212 IDE RAID controller");
838MODULE_LICENSE("GPL");
839MODULE_DEVICE_TABLE(pci, it821x);
840MODULE_VERSION(DRV_VERSION);
841
842
843module_param_named(noraid, it8212_noraid, int, S_IRUGO);
844MODULE_PARM_DESC(it8212_noraid, "Force card into bypass mode");
845
846module_init(it821x_init);
847module_exit(it821x_exit);