Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1 | /* |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 2 | * Freescale MPC85xx/MPC86xx RapidIO support |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 3 | * |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 4 | * Copyright 2009 Sysgo AG |
| 5 | * Thomas Moll <thomas.moll@sysgo.com> |
| 6 | * - fixed maintenance access routines, check for aligned access |
| 7 | * |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 8 | * Copyright 2009 Integrated Device Technology, Inc. |
| 9 | * Alex Bounine <alexandre.bounine@idt.com> |
| 10 | * - Added Port-Write message handling |
| 11 | * - Added Machine Check exception handling |
| 12 | * |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 13 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. |
| 14 | * Zhang Wei <wei.zhang@freescale.com> |
| 15 | * |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 16 | * Copyright 2005 MontaVista Software, Inc. |
| 17 | * Matt Porter <mporter@kernel.crashing.org> |
| 18 | * |
| 19 | * This program is free software; you can redistribute it and/or modify it |
| 20 | * under the terms of the GNU General Public License as published by the |
| 21 | * Free Software Foundation; either version 2 of the License, or (at your |
| 22 | * option) any later version. |
| 23 | */ |
| 24 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 25 | #include <linux/init.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/types.h> |
| 28 | #include <linux/dma-mapping.h> |
| 29 | #include <linux/interrupt.h> |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 30 | #include <linux/device.h> |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 31 | #include <linux/rio.h> |
| 32 | #include <linux/rio_drv.h> |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 33 | #include <linux/of_platform.h> |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 34 | #include <linux/delay.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 35 | #include <linux/slab.h> |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 36 | #include <linux/kfifo.h> |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 37 | |
| 38 | #include <asm/io.h> |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 39 | #include <asm/machdep.h> |
| 40 | #include <asm/uaccess.h> |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 41 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 42 | #undef DEBUG_PW /* Port-Write debugging */ |
| 43 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 44 | /* RapidIO definition irq, which read from OF-tree */ |
| 45 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) |
| 46 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) |
| 47 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 48 | #define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq) |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 49 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 50 | #define RIO_ATMU_REGS_OFFSET 0x10c00 |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 51 | #define RIO_P_MSG_REGS_OFFSET 0x11000 |
| 52 | #define RIO_S_MSG_REGS_OFFSET 0x13000 |
| 53 | #define RIO_ESCSR 0x158 |
| 54 | #define RIO_CCSR 0x15c |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 55 | #define RIO_LTLEDCSR 0x0608 |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 56 | #define RIO_LTLEDCSR_IER 0x80000000 |
| 57 | #define RIO_LTLEDCSR_PRT 0x01000000 |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 58 | #define RIO_LTLEECSR 0x060c |
| 59 | #define RIO_EPWISR 0x10010 |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 60 | #define RIO_ISR_AACR 0x10120 |
| 61 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 62 | #define RIO_MAINT_WIN_SIZE 0x400000 |
| 63 | #define RIO_DBELL_WIN_SIZE 0x1000 |
| 64 | |
| 65 | #define RIO_MSG_OMR_MUI 0x00000002 |
| 66 | #define RIO_MSG_OSR_TE 0x00000080 |
| 67 | #define RIO_MSG_OSR_QOI 0x00000020 |
| 68 | #define RIO_MSG_OSR_QFI 0x00000010 |
| 69 | #define RIO_MSG_OSR_MUB 0x00000004 |
| 70 | #define RIO_MSG_OSR_EOMI 0x00000002 |
| 71 | #define RIO_MSG_OSR_QEI 0x00000001 |
| 72 | |
| 73 | #define RIO_MSG_IMR_MI 0x00000002 |
| 74 | #define RIO_MSG_ISR_TE 0x00000080 |
| 75 | #define RIO_MSG_ISR_QFI 0x00000010 |
| 76 | #define RIO_MSG_ISR_DIQI 0x00000001 |
| 77 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 78 | #define RIO_IPWMR_SEN 0x00100000 |
| 79 | #define RIO_IPWMR_QFIE 0x00000100 |
| 80 | #define RIO_IPWMR_EIE 0x00000020 |
| 81 | #define RIO_IPWMR_CQ 0x00000002 |
| 82 | #define RIO_IPWMR_PWE 0x00000001 |
| 83 | |
| 84 | #define RIO_IPWSR_QF 0x00100000 |
| 85 | #define RIO_IPWSR_TE 0x00000080 |
| 86 | #define RIO_IPWSR_QFI 0x00000010 |
| 87 | #define RIO_IPWSR_PWD 0x00000008 |
| 88 | #define RIO_IPWSR_PWB 0x00000004 |
| 89 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 90 | #define RIO_MSG_DESC_SIZE 32 |
| 91 | #define RIO_MSG_BUFFER_SIZE 4096 |
| 92 | #define RIO_MIN_TX_RING_SIZE 2 |
| 93 | #define RIO_MAX_TX_RING_SIZE 2048 |
| 94 | #define RIO_MIN_RX_RING_SIZE 2 |
| 95 | #define RIO_MAX_RX_RING_SIZE 2048 |
| 96 | |
| 97 | #define DOORBELL_DMR_DI 0x00000002 |
| 98 | #define DOORBELL_DSR_TE 0x00000080 |
| 99 | #define DOORBELL_DSR_QFI 0x00000010 |
| 100 | #define DOORBELL_DSR_DIQI 0x00000001 |
Zhang Wei | 6c39103 | 2008-04-18 13:33:48 -0700 | [diff] [blame] | 101 | #define DOORBELL_TID_OFFSET 0x02 |
| 102 | #define DOORBELL_SID_OFFSET 0x04 |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 103 | #define DOORBELL_INFO_OFFSET 0x06 |
| 104 | |
| 105 | #define DOORBELL_MESSAGE_SIZE 0x08 |
Zhang Wei | 6c39103 | 2008-04-18 13:33:48 -0700 | [diff] [blame] | 106 | #define DBELL_SID(x) (*(u16 *)(x + DOORBELL_SID_OFFSET)) |
| 107 | #define DBELL_TID(x) (*(u16 *)(x + DOORBELL_TID_OFFSET)) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 108 | #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET)) |
| 109 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 110 | struct rio_atmu_regs { |
| 111 | u32 rowtar; |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 112 | u32 rowtear; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 113 | u32 rowbar; |
| 114 | u32 pad2; |
| 115 | u32 rowar; |
| 116 | u32 pad3[3]; |
| 117 | }; |
| 118 | |
| 119 | struct rio_msg_regs { |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 120 | u32 omr; /* 0xD_3000 - Outbound message 0 mode register */ |
| 121 | u32 osr; /* 0xD_3004 - Outbound message 0 status register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 122 | u32 pad1; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 123 | u32 odqdpar; /* 0xD_300C - Outbound message 0 descriptor queue |
| 124 | dequeue pointer address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 125 | u32 pad2; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 126 | u32 osar; /* 0xD_3014 - Outbound message 0 source address |
| 127 | register */ |
| 128 | u32 odpr; /* 0xD_3018 - Outbound message 0 destination port |
| 129 | register */ |
| 130 | u32 odatr; /* 0xD_301C - Outbound message 0 destination attributes |
| 131 | Register*/ |
| 132 | u32 odcr; /* 0xD_3020 - Outbound message 0 double-word count |
| 133 | register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 134 | u32 pad3; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 135 | u32 odqepar; /* 0xD_3028 - Outbound message 0 descriptor queue |
| 136 | enqueue pointer address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 137 | u32 pad4[13]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 138 | u32 imr; /* 0xD_3060 - Inbound message 0 mode register */ |
| 139 | u32 isr; /* 0xD_3064 - Inbound message 0 status register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 140 | u32 pad5; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 141 | u32 ifqdpar; /* 0xD_306C - Inbound message 0 frame queue dequeue |
| 142 | pointer address register*/ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 143 | u32 pad6; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 144 | u32 ifqepar; /* 0xD_3074 - Inbound message 0 frame queue enqueue |
| 145 | pointer address register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 146 | u32 pad7[226]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 147 | u32 odmr; /* 0xD_3400 - Outbound doorbell mode register */ |
| 148 | u32 odsr; /* 0xD_3404 - Outbound doorbell status register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 149 | u32 res0[4]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 150 | u32 oddpr; /* 0xD_3418 - Outbound doorbell destination port |
| 151 | register */ |
| 152 | u32 oddatr; /* 0xD_341c - Outbound doorbell destination attributes |
| 153 | register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 154 | u32 res1[3]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 155 | u32 odretcr; /* 0xD_342C - Outbound doorbell retry error threshold |
| 156 | configuration register */ |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 157 | u32 res2[12]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 158 | u32 dmr; /* 0xD_3460 - Inbound doorbell mode register */ |
| 159 | u32 dsr; /* 0xD_3464 - Inbound doorbell status register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 160 | u32 pad8; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 161 | u32 dqdpar; /* 0xD_346C - Inbound doorbell queue dequeue Pointer |
| 162 | address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 163 | u32 pad9; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 164 | u32 dqepar; /* 0xD_3474 - Inbound doorbell Queue enqueue pointer |
| 165 | address register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 166 | u32 pad10[26]; |
Shaohui Xie | abd12fe | 2010-10-14 10:04:02 +0800 | [diff] [blame^] | 167 | u32 pwmr; /* 0xD_34E0 - Inbound port-write mode register */ |
| 168 | u32 pwsr; /* 0xD_34E4 - Inbound port-write status register */ |
| 169 | u32 epwqbar; /* 0xD_34E8 - Extended Port-Write Queue Base Address |
| 170 | register */ |
| 171 | u32 pwqbar; /* 0xD_34EC - Inbound port-write queue base address |
| 172 | register */ |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 173 | }; |
| 174 | |
| 175 | struct rio_tx_desc { |
| 176 | u32 res1; |
| 177 | u32 saddr; |
| 178 | u32 dport; |
| 179 | u32 dattr; |
| 180 | u32 res2; |
| 181 | u32 res3; |
| 182 | u32 dwcnt; |
| 183 | u32 res4; |
| 184 | }; |
| 185 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 186 | struct rio_dbell_ring { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 187 | void *virt; |
| 188 | dma_addr_t phys; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 189 | }; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 190 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 191 | struct rio_msg_tx_ring { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 192 | void *virt; |
| 193 | dma_addr_t phys; |
| 194 | void *virt_buffer[RIO_MAX_TX_RING_SIZE]; |
| 195 | dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE]; |
| 196 | int tx_slot; |
| 197 | int size; |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 198 | void *dev_id; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 199 | }; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 200 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 201 | struct rio_msg_rx_ring { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 202 | void *virt; |
| 203 | dma_addr_t phys; |
| 204 | void *virt_buffer[RIO_MAX_RX_RING_SIZE]; |
| 205 | int rx_slot; |
| 206 | int size; |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 207 | void *dev_id; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 208 | }; |
| 209 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 210 | struct rio_port_write_msg { |
| 211 | void *virt; |
| 212 | dma_addr_t phys; |
| 213 | u32 msg_count; |
| 214 | u32 err_count; |
| 215 | u32 discard_count; |
| 216 | }; |
| 217 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 218 | struct rio_priv { |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 219 | struct device *dev; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 220 | void __iomem *regs_win; |
| 221 | struct rio_atmu_regs __iomem *atmu_regs; |
| 222 | struct rio_atmu_regs __iomem *maint_atmu_regs; |
| 223 | struct rio_atmu_regs __iomem *dbell_atmu_regs; |
| 224 | void __iomem *dbell_win; |
| 225 | void __iomem *maint_win; |
| 226 | struct rio_msg_regs __iomem *msg_regs; |
| 227 | struct rio_dbell_ring dbell_ring; |
| 228 | struct rio_msg_tx_ring msg_tx_ring; |
| 229 | struct rio_msg_rx_ring msg_rx_ring; |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 230 | struct rio_port_write_msg port_write_msg; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 231 | int bellirq; |
| 232 | int txirq; |
| 233 | int rxirq; |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 234 | int pwirq; |
| 235 | struct work_struct pw_work; |
| 236 | struct kfifo pw_fifo; |
| 237 | spinlock_t pw_fifo_lock; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 238 | }; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 239 | |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 240 | #define __fsl_read_rio_config(x, addr, err, op) \ |
| 241 | __asm__ __volatile__( \ |
| 242 | "1: "op" %1,0(%2)\n" \ |
| 243 | " eieio\n" \ |
| 244 | "2:\n" \ |
| 245 | ".section .fixup,\"ax\"\n" \ |
| 246 | "3: li %1,-1\n" \ |
| 247 | " li %0,%3\n" \ |
| 248 | " b 2b\n" \ |
| 249 | ".section __ex_table,\"a\"\n" \ |
| 250 | " .align 2\n" \ |
| 251 | " .long 1b,3b\n" \ |
| 252 | ".text" \ |
| 253 | : "=r" (err), "=r" (x) \ |
| 254 | : "b" (addr), "i" (-EFAULT), "0" (err)) |
| 255 | |
| 256 | static void __iomem *rio_regs_win; |
| 257 | |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 258 | #ifdef CONFIG_E500 |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 259 | static int (*saved_mcheck_exception)(struct pt_regs *regs); |
| 260 | |
| 261 | static int fsl_rio_mcheck_exception(struct pt_regs *regs) |
| 262 | { |
| 263 | const struct exception_table_entry *entry = NULL; |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 264 | unsigned long reason = mfspr(SPRN_MCSR); |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 265 | |
| 266 | if (reason & MCSR_BUS_RBERR) { |
| 267 | reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR)); |
| 268 | if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) { |
| 269 | /* Check if we are prepared to handle this fault */ |
| 270 | entry = search_exception_tables(regs->nip); |
| 271 | if (entry) { |
| 272 | pr_debug("RIO: %s - MC Exception handled\n", |
| 273 | __func__); |
| 274 | out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), |
| 275 | 0); |
| 276 | regs->msr |= MSR_RI; |
| 277 | regs->nip = entry->fixup; |
| 278 | return 1; |
| 279 | } |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | if (saved_mcheck_exception) |
| 284 | return saved_mcheck_exception(regs); |
| 285 | else |
| 286 | return cur_cpu_spec->machine_check(regs); |
| 287 | } |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 288 | #endif |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 289 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 290 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 291 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 292 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 293 | * @index: ID of RapidIO interface |
| 294 | * @destid: Destination ID of target device |
| 295 | * @data: 16-bit info field of RapidIO doorbell message |
| 296 | * |
| 297 | * Sends a MPC85xx doorbell message. Returns %0 on success or |
| 298 | * %-EINVAL on failure. |
| 299 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 300 | static int fsl_rio_doorbell_send(struct rio_mport *mport, |
| 301 | int index, u16 destid, u16 data) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 302 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 303 | struct rio_priv *priv = mport->priv; |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 304 | pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 305 | index, destid, data); |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 306 | switch (mport->phy_type) { |
| 307 | case RIO_PHY_PARALLEL: |
| 308 | out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22); |
| 309 | out_be16(priv->dbell_win, data); |
| 310 | break; |
| 311 | case RIO_PHY_SERIAL: |
| 312 | /* In the serial version silicons, such as MPC8548, MPC8641, |
| 313 | * below operations is must be. |
| 314 | */ |
| 315 | out_be32(&priv->msg_regs->odmr, 0x00000000); |
| 316 | out_be32(&priv->msg_regs->odretcr, 0x00000004); |
| 317 | out_be32(&priv->msg_regs->oddpr, destid << 16); |
| 318 | out_be32(&priv->msg_regs->oddatr, data); |
| 319 | out_be32(&priv->msg_regs->odmr, 0x00000001); |
| 320 | break; |
| 321 | } |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 322 | |
| 323 | return 0; |
| 324 | } |
| 325 | |
| 326 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 327 | * fsl_local_config_read - Generate a MPC85xx local config space read |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 328 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 329 | * @index: ID of RapdiIO interface |
| 330 | * @offset: Offset into configuration space |
| 331 | * @len: Length (in bytes) of the maintenance transaction |
| 332 | * @data: Value to be read into |
| 333 | * |
| 334 | * Generates a MPC85xx local configuration space read. Returns %0 on |
| 335 | * success or %-EINVAL on failure. |
| 336 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 337 | static int fsl_local_config_read(struct rio_mport *mport, |
| 338 | int index, u32 offset, int len, u32 *data) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 339 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 340 | struct rio_priv *priv = mport->priv; |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 341 | pr_debug("fsl_local_config_read: index %d offset %8.8x\n", index, |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 342 | offset); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 343 | *data = in_be32(priv->regs_win + offset); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 349 | * fsl_local_config_write - Generate a MPC85xx local config space write |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 350 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 351 | * @index: ID of RapdiIO interface |
| 352 | * @offset: Offset into configuration space |
| 353 | * @len: Length (in bytes) of the maintenance transaction |
| 354 | * @data: Value to be written |
| 355 | * |
| 356 | * Generates a MPC85xx local configuration space write. Returns %0 on |
| 357 | * success or %-EINVAL on failure. |
| 358 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 359 | static int fsl_local_config_write(struct rio_mport *mport, |
| 360 | int index, u32 offset, int len, u32 data) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 361 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 362 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 363 | pr_debug |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 364 | ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 365 | index, offset, data); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 366 | out_be32(priv->regs_win + offset, data); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 367 | |
| 368 | return 0; |
| 369 | } |
| 370 | |
| 371 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 372 | * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 373 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 374 | * @index: ID of RapdiIO interface |
| 375 | * @destid: Destination ID of transaction |
| 376 | * @hopcount: Number of hops to target device |
| 377 | * @offset: Offset into configuration space |
| 378 | * @len: Length (in bytes) of the maintenance transaction |
| 379 | * @val: Location to be read into |
| 380 | * |
| 381 | * Generates a MPC85xx read maintenance transaction. Returns %0 on |
| 382 | * success or %-EINVAL on failure. |
| 383 | */ |
| 384 | static int |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 385 | fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid, |
| 386 | u8 hopcount, u32 offset, int len, u32 *val) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 387 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 388 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 389 | u8 *data; |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 390 | u32 rval, err = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 391 | |
| 392 | pr_debug |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 393 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 394 | index, destid, hopcount, offset, len); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 395 | |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 396 | /* 16MB maintenance window possible */ |
| 397 | /* allow only aligned access to maintenance registers */ |
| 398 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) |
| 399 | return -EINVAL; |
| 400 | |
| 401 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 402 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 403 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); |
| 404 | |
| 405 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 406 | switch (len) { |
| 407 | case 1: |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 408 | __fsl_read_rio_config(rval, data, err, "lbz"); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 409 | break; |
| 410 | case 2: |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 411 | __fsl_read_rio_config(rval, data, err, "lhz"); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 412 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 413 | case 4: |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 414 | __fsl_read_rio_config(rval, data, err, "lwz"); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 415 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 416 | default: |
| 417 | return -EINVAL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 418 | } |
| 419 | |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 420 | if (err) { |
| 421 | pr_debug("RIO: cfg_read error %d for %x:%x:%x\n", |
| 422 | err, destid, hopcount, offset); |
| 423 | } |
| 424 | |
| 425 | *val = rval; |
| 426 | |
| 427 | return err; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 428 | } |
| 429 | |
| 430 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 431 | * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 432 | * @mport: RapidIO master port info |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 433 | * @index: ID of RapdiIO interface |
| 434 | * @destid: Destination ID of transaction |
| 435 | * @hopcount: Number of hops to target device |
| 436 | * @offset: Offset into configuration space |
| 437 | * @len: Length (in bytes) of the maintenance transaction |
| 438 | * @val: Value to be written |
| 439 | * |
| 440 | * Generates an MPC85xx write maintenance transaction. Returns %0 on |
| 441 | * success or %-EINVAL on failure. |
| 442 | */ |
| 443 | static int |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 444 | fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, |
| 445 | u8 hopcount, u32 offset, int len, u32 val) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 446 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 447 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 448 | u8 *data; |
| 449 | pr_debug |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 450 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 451 | index, destid, hopcount, offset, len, val); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 452 | |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 453 | /* 16MB maintenance windows possible */ |
| 454 | /* allow only aligned access to maintenance registers */ |
| 455 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) |
| 456 | return -EINVAL; |
| 457 | |
| 458 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 459 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 460 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); |
| 461 | |
| 462 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 463 | switch (len) { |
| 464 | case 1: |
| 465 | out_8((u8 *) data, val); |
| 466 | break; |
| 467 | case 2: |
| 468 | out_be16((u16 *) data, val); |
| 469 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 470 | case 4: |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 471 | out_be32((u32 *) data, val); |
| 472 | break; |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 473 | default: |
| 474 | return -EINVAL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 475 | } |
| 476 | |
| 477 | return 0; |
| 478 | } |
| 479 | |
| 480 | /** |
| 481 | * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue |
| 482 | * @mport: Master port with outbound message queue |
| 483 | * @rdev: Target of outbound message |
| 484 | * @mbox: Outbound mailbox |
| 485 | * @buffer: Message to add to outbound queue |
| 486 | * @len: Length of message |
| 487 | * |
| 488 | * Adds the @buffer message to the MPC85xx outbound message queue. Returns |
| 489 | * %0 on success or %-EINVAL on failure. |
| 490 | */ |
| 491 | int |
| 492 | rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, |
| 493 | void *buffer, size_t len) |
| 494 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 495 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 496 | u32 omr; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 497 | struct rio_tx_desc *desc = (struct rio_tx_desc *)priv->msg_tx_ring.virt |
| 498 | + priv->msg_tx_ring.tx_slot; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 499 | int ret = 0; |
| 500 | |
| 501 | pr_debug |
| 502 | ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n", |
| 503 | rdev->destid, mbox, (int)buffer, len); |
| 504 | |
| 505 | if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) { |
| 506 | ret = -EINVAL; |
| 507 | goto out; |
| 508 | } |
| 509 | |
| 510 | /* Copy and clear rest of buffer */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 511 | memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer, |
| 512 | len); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 513 | if (len < (RIO_MAX_MSG_SIZE - 4)) |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 514 | memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot] |
| 515 | + len, 0, RIO_MAX_MSG_SIZE - len); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 516 | |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 517 | switch (mport->phy_type) { |
| 518 | case RIO_PHY_PARALLEL: |
| 519 | /* Set mbox field for message */ |
| 520 | desc->dport = mbox & 0x3; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 521 | |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 522 | /* Enable EOMI interrupt, set priority, and set destid */ |
| 523 | desc->dattr = 0x28000000 | (rdev->destid << 2); |
| 524 | break; |
| 525 | case RIO_PHY_SERIAL: |
| 526 | /* Set mbox field for message, and set destid */ |
| 527 | desc->dport = (rdev->destid << 16) | (mbox & 0x3); |
| 528 | |
| 529 | /* Enable EOMI interrupt and priority */ |
| 530 | desc->dattr = 0x28000000; |
| 531 | break; |
| 532 | } |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 533 | |
| 534 | /* Set transfer size aligned to next power of 2 (in double words) */ |
| 535 | desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len); |
| 536 | |
| 537 | /* Set snooping and source buffer address */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 538 | desc->saddr = 0x00000004 |
| 539 | | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot]; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 540 | |
| 541 | /* Increment enqueue pointer */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 542 | omr = in_be32(&priv->msg_regs->omr); |
| 543 | out_be32(&priv->msg_regs->omr, omr | RIO_MSG_OMR_MUI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 544 | |
| 545 | /* Go to next descriptor */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 546 | if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size) |
| 547 | priv->msg_tx_ring.tx_slot = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 548 | |
| 549 | out: |
| 550 | return ret; |
| 551 | } |
| 552 | |
| 553 | EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); |
| 554 | |
| 555 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 556 | * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 557 | * @irq: Linux interrupt number |
| 558 | * @dev_instance: Pointer to interrupt-specific data |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 559 | * |
| 560 | * Handles outbound message interrupts. Executes a register outbound |
Simon Arlott | a8de5ce | 2007-05-12 05:42:54 +1000 | [diff] [blame] | 561 | * mailbox event handler and acks the interrupt occurrence. |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 562 | */ |
| 563 | static irqreturn_t |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 564 | fsl_rio_tx_handler(int irq, void *dev_instance) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 565 | { |
| 566 | int osr; |
| 567 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 568 | struct rio_priv *priv = port->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 569 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 570 | osr = in_be32(&priv->msg_regs->osr); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 571 | |
| 572 | if (osr & RIO_MSG_OSR_TE) { |
| 573 | pr_info("RIO: outbound message transmission error\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 574 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 575 | goto out; |
| 576 | } |
| 577 | |
| 578 | if (osr & RIO_MSG_OSR_QOI) { |
| 579 | pr_info("RIO: outbound message queue overflow\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 580 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 581 | goto out; |
| 582 | } |
| 583 | |
| 584 | if (osr & RIO_MSG_OSR_EOMI) { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 585 | u32 dqp = in_be32(&priv->msg_regs->odqdpar); |
| 586 | int slot = (dqp - priv->msg_tx_ring.phys) >> 5; |
| 587 | port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1, |
| 588 | slot); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 589 | |
| 590 | /* Ack the end-of-message interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 591 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 592 | } |
| 593 | |
| 594 | out: |
| 595 | return IRQ_HANDLED; |
| 596 | } |
| 597 | |
| 598 | /** |
| 599 | * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox |
| 600 | * @mport: Master port implementing the outbound message unit |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 601 | * @dev_id: Device specific pointer to pass on event |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 602 | * @mbox: Mailbox to open |
| 603 | * @entries: Number of entries in the outbound mailbox ring |
| 604 | * |
| 605 | * Initializes buffer ring, request the outbound message interrupt, |
| 606 | * and enables the outbound message unit. Returns %0 on success and |
| 607 | * %-EINVAL or %-ENOMEM on failure. |
| 608 | */ |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 609 | int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 610 | { |
| 611 | int i, j, rc = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 612 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 613 | |
| 614 | if ((entries < RIO_MIN_TX_RING_SIZE) || |
| 615 | (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) { |
| 616 | rc = -EINVAL; |
| 617 | goto out; |
| 618 | } |
| 619 | |
| 620 | /* Initialize shadow copy ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 621 | priv->msg_tx_ring.dev_id = dev_id; |
| 622 | priv->msg_tx_ring.size = entries; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 623 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 624 | for (i = 0; i < priv->msg_tx_ring.size; i++) { |
| 625 | priv->msg_tx_ring.virt_buffer[i] = |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 626 | dma_alloc_coherent(priv->dev, RIO_MSG_BUFFER_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 627 | &priv->msg_tx_ring.phys_buffer[i], GFP_KERNEL); |
| 628 | if (!priv->msg_tx_ring.virt_buffer[i]) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 629 | rc = -ENOMEM; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 630 | for (j = 0; j < priv->msg_tx_ring.size; j++) |
| 631 | if (priv->msg_tx_ring.virt_buffer[j]) |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 632 | dma_free_coherent(priv->dev, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 633 | RIO_MSG_BUFFER_SIZE, |
| 634 | priv->msg_tx_ring. |
| 635 | virt_buffer[j], |
| 636 | priv->msg_tx_ring. |
| 637 | phys_buffer[j]); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 638 | goto out; |
| 639 | } |
| 640 | } |
| 641 | |
| 642 | /* Initialize outbound message descriptor ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 643 | priv->msg_tx_ring.virt = dma_alloc_coherent(priv->dev, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 644 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
| 645 | &priv->msg_tx_ring.phys, GFP_KERNEL); |
| 646 | if (!priv->msg_tx_ring.virt) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 647 | rc = -ENOMEM; |
| 648 | goto out_dma; |
| 649 | } |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 650 | memset(priv->msg_tx_ring.virt, 0, |
| 651 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE); |
| 652 | priv->msg_tx_ring.tx_slot = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 653 | |
| 654 | /* Point dequeue/enqueue pointers at first entry in ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 655 | out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys); |
| 656 | out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 657 | |
| 658 | /* Configure for snooping */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 659 | out_be32(&priv->msg_regs->osar, 0x00000004); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 660 | |
| 661 | /* Clear interrupt status */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 662 | out_be32(&priv->msg_regs->osr, 0x000000b3); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 663 | |
| 664 | /* Hook up outbound message handler */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 665 | rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0, |
| 666 | "msg_tx", (void *)mport); |
| 667 | if (rc < 0) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 668 | goto out_irq; |
| 669 | |
| 670 | /* |
| 671 | * Configure outbound message unit |
| 672 | * Snooping |
| 673 | * Interrupts (all enabled, except QEIE) |
| 674 | * Chaining mode |
| 675 | * Disable |
| 676 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 677 | out_be32(&priv->msg_regs->omr, 0x00100220); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 678 | |
| 679 | /* Set number of entries */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 680 | out_be32(&priv->msg_regs->omr, |
| 681 | in_be32(&priv->msg_regs->omr) | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 682 | ((get_bitmask_order(entries) - 2) << 12)); |
| 683 | |
| 684 | /* Now enable the unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 685 | out_be32(&priv->msg_regs->omr, in_be32(&priv->msg_regs->omr) | 0x1); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 686 | |
| 687 | out: |
| 688 | return rc; |
| 689 | |
| 690 | out_irq: |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 691 | dma_free_coherent(priv->dev, |
| 692 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 693 | priv->msg_tx_ring.virt, priv->msg_tx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 694 | |
| 695 | out_dma: |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 696 | for (i = 0; i < priv->msg_tx_ring.size; i++) |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 697 | dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 698 | priv->msg_tx_ring.virt_buffer[i], |
| 699 | priv->msg_tx_ring.phys_buffer[i]); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 700 | |
| 701 | return rc; |
| 702 | } |
| 703 | |
| 704 | /** |
| 705 | * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox |
| 706 | * @mport: Master port implementing the outbound message unit |
| 707 | * @mbox: Mailbox to close |
| 708 | * |
| 709 | * Disables the outbound message unit, free all buffers, and |
| 710 | * frees the outbound message interrupt. |
| 711 | */ |
| 712 | void rio_close_outb_mbox(struct rio_mport *mport, int mbox) |
| 713 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 714 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 715 | /* Disable inbound message unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 716 | out_be32(&priv->msg_regs->omr, 0); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 717 | |
| 718 | /* Free ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 719 | dma_free_coherent(priv->dev, |
| 720 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 721 | priv->msg_tx_ring.virt, priv->msg_tx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 722 | |
| 723 | /* Free interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 724 | free_irq(IRQ_RIO_TX(mport), (void *)mport); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 725 | } |
| 726 | |
| 727 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 728 | * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 729 | * @irq: Linux interrupt number |
| 730 | * @dev_instance: Pointer to interrupt-specific data |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 731 | * |
| 732 | * Handles inbound message interrupts. Executes a registered inbound |
Simon Arlott | a8de5ce | 2007-05-12 05:42:54 +1000 | [diff] [blame] | 733 | * mailbox event handler and acks the interrupt occurrence. |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 734 | */ |
| 735 | static irqreturn_t |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 736 | fsl_rio_rx_handler(int irq, void *dev_instance) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 737 | { |
| 738 | int isr; |
| 739 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 740 | struct rio_priv *priv = port->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 741 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 742 | isr = in_be32(&priv->msg_regs->isr); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 743 | |
| 744 | if (isr & RIO_MSG_ISR_TE) { |
| 745 | pr_info("RIO: inbound message reception error\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 746 | out_be32((void *)&priv->msg_regs->isr, RIO_MSG_ISR_TE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 747 | goto out; |
| 748 | } |
| 749 | |
| 750 | /* XXX Need to check/dispatch until queue empty */ |
| 751 | if (isr & RIO_MSG_ISR_DIQI) { |
| 752 | /* |
| 753 | * We implement *only* mailbox 0, but can receive messages |
| 754 | * for any mailbox/letter to that mailbox destination. So, |
| 755 | * make the callback with an unknown/invalid mailbox number |
| 756 | * argument. |
| 757 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 758 | port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 759 | |
| 760 | /* Ack the queueing interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 761 | out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 762 | } |
| 763 | |
| 764 | out: |
| 765 | return IRQ_HANDLED; |
| 766 | } |
| 767 | |
| 768 | /** |
| 769 | * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox |
| 770 | * @mport: Master port implementing the inbound message unit |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 771 | * @dev_id: Device specific pointer to pass on event |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 772 | * @mbox: Mailbox to open |
| 773 | * @entries: Number of entries in the inbound mailbox ring |
| 774 | * |
| 775 | * Initializes buffer ring, request the inbound message interrupt, |
| 776 | * and enables the inbound message unit. Returns %0 on success |
| 777 | * and %-EINVAL or %-ENOMEM on failure. |
| 778 | */ |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 779 | int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 780 | { |
| 781 | int i, rc = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 782 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 783 | |
| 784 | if ((entries < RIO_MIN_RX_RING_SIZE) || |
| 785 | (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) { |
| 786 | rc = -EINVAL; |
| 787 | goto out; |
| 788 | } |
| 789 | |
| 790 | /* Initialize client buffer ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 791 | priv->msg_rx_ring.dev_id = dev_id; |
| 792 | priv->msg_rx_ring.size = entries; |
| 793 | priv->msg_rx_ring.rx_slot = 0; |
| 794 | for (i = 0; i < priv->msg_rx_ring.size; i++) |
| 795 | priv->msg_rx_ring.virt_buffer[i] = NULL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 796 | |
| 797 | /* Initialize inbound message ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 798 | priv->msg_rx_ring.virt = dma_alloc_coherent(priv->dev, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 799 | priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE, |
| 800 | &priv->msg_rx_ring.phys, GFP_KERNEL); |
| 801 | if (!priv->msg_rx_ring.virt) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 802 | rc = -ENOMEM; |
| 803 | goto out; |
| 804 | } |
| 805 | |
| 806 | /* Point dequeue/enqueue pointers at first entry in ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 807 | out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys); |
| 808 | out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 809 | |
| 810 | /* Clear interrupt status */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 811 | out_be32(&priv->msg_regs->isr, 0x00000091); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 812 | |
| 813 | /* Hook up inbound message handler */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 814 | rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0, |
| 815 | "msg_rx", (void *)mport); |
| 816 | if (rc < 0) { |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 817 | dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 818 | priv->msg_tx_ring.virt_buffer[i], |
| 819 | priv->msg_tx_ring.phys_buffer[i]); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 820 | goto out; |
| 821 | } |
| 822 | |
| 823 | /* |
| 824 | * Configure inbound message unit: |
| 825 | * Snooping |
| 826 | * 4KB max message size |
| 827 | * Unmask all interrupt sources |
| 828 | * Disable |
| 829 | */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 830 | out_be32(&priv->msg_regs->imr, 0x001b0060); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 831 | |
| 832 | /* Set number of queue entries */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 833 | setbits32(&priv->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 834 | |
| 835 | /* Now enable the unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 836 | setbits32(&priv->msg_regs->imr, 0x1); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 837 | |
| 838 | out: |
| 839 | return rc; |
| 840 | } |
| 841 | |
| 842 | /** |
| 843 | * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox |
| 844 | * @mport: Master port implementing the inbound message unit |
| 845 | * @mbox: Mailbox to close |
| 846 | * |
| 847 | * Disables the inbound message unit, free all buffers, and |
| 848 | * frees the inbound message interrupt. |
| 849 | */ |
| 850 | void rio_close_inb_mbox(struct rio_mport *mport, int mbox) |
| 851 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 852 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 853 | /* Disable inbound message unit */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 854 | out_be32(&priv->msg_regs->imr, 0); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 855 | |
| 856 | /* Free ring */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 857 | dma_free_coherent(priv->dev, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 858 | priv->msg_rx_ring.virt, priv->msg_rx_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 859 | |
| 860 | /* Free interrupt */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 861 | free_irq(IRQ_RIO_RX(mport), (void *)mport); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 862 | } |
| 863 | |
| 864 | /** |
| 865 | * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue |
| 866 | * @mport: Master port implementing the inbound message unit |
| 867 | * @mbox: Inbound mailbox number |
| 868 | * @buf: Buffer to add to inbound queue |
| 869 | * |
| 870 | * Adds the @buf buffer to the MPC85xx inbound message queue. Returns |
| 871 | * %0 on success or %-EINVAL on failure. |
| 872 | */ |
| 873 | int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) |
| 874 | { |
| 875 | int rc = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 876 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 877 | |
| 878 | pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 879 | priv->msg_rx_ring.rx_slot); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 880 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 881 | if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 882 | printk(KERN_ERR |
| 883 | "RIO: error adding inbound buffer %d, buffer exists\n", |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 884 | priv->msg_rx_ring.rx_slot); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 885 | rc = -EINVAL; |
| 886 | goto out; |
| 887 | } |
| 888 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 889 | priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf; |
| 890 | if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size) |
| 891 | priv->msg_rx_ring.rx_slot = 0; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 892 | |
| 893 | out: |
| 894 | return rc; |
| 895 | } |
| 896 | |
| 897 | EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer); |
| 898 | |
| 899 | /** |
| 900 | * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit |
| 901 | * @mport: Master port implementing the inbound message unit |
| 902 | * @mbox: Inbound mailbox number |
| 903 | * |
| 904 | * Gets the next available inbound message from the inbound message queue. |
| 905 | * A pointer to the message is returned on success or NULL on failure. |
| 906 | */ |
| 907 | void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) |
| 908 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 909 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 910 | u32 phys_buf, virt_buf; |
| 911 | void *buf = NULL; |
| 912 | int buf_idx; |
| 913 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 914 | phys_buf = in_be32(&priv->msg_regs->ifqdpar); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 915 | |
| 916 | /* If no more messages, then bail out */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 917 | if (phys_buf == in_be32(&priv->msg_regs->ifqepar)) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 918 | goto out2; |
| 919 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 920 | virt_buf = (u32) priv->msg_rx_ring.virt + (phys_buf |
| 921 | - priv->msg_rx_ring.phys); |
| 922 | buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE; |
| 923 | buf = priv->msg_rx_ring.virt_buffer[buf_idx]; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 924 | |
| 925 | if (!buf) { |
| 926 | printk(KERN_ERR |
| 927 | "RIO: inbound message copy failed, no buffers\n"); |
| 928 | goto out1; |
| 929 | } |
| 930 | |
| 931 | /* Copy max message size, caller is expected to allocate that big */ |
| 932 | memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE); |
| 933 | |
| 934 | /* Clear the available buffer */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 935 | priv->msg_rx_ring.virt_buffer[buf_idx] = NULL; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 936 | |
| 937 | out1: |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 938 | setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 939 | |
| 940 | out2: |
| 941 | return buf; |
| 942 | } |
| 943 | |
| 944 | EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); |
| 945 | |
| 946 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 947 | * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 948 | * @irq: Linux interrupt number |
| 949 | * @dev_instance: Pointer to interrupt-specific data |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 950 | * |
| 951 | * Handles doorbell interrupts. Parses a list of registered |
| 952 | * doorbell event handlers and executes a matching event handler. |
| 953 | */ |
| 954 | static irqreturn_t |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 955 | fsl_rio_dbell_handler(int irq, void *dev_instance) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 956 | { |
| 957 | int dsr; |
| 958 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 959 | struct rio_priv *priv = port->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 960 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 961 | dsr = in_be32(&priv->msg_regs->dsr); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 962 | |
| 963 | if (dsr & DOORBELL_DSR_TE) { |
| 964 | pr_info("RIO: doorbell reception error\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 965 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 966 | goto out; |
| 967 | } |
| 968 | |
| 969 | if (dsr & DOORBELL_DSR_QFI) { |
| 970 | pr_info("RIO: doorbell queue full\n"); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 971 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 972 | goto out; |
| 973 | } |
| 974 | |
| 975 | /* XXX Need to check/dispatch until queue empty */ |
| 976 | if (dsr & DOORBELL_DSR_DIQI) { |
| 977 | u32 dmsg = |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 978 | (u32) priv->dbell_ring.virt + |
| 979 | (in_be32(&priv->msg_regs->dqdpar) & 0xfff); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 980 | struct rio_dbell *dbell; |
| 981 | int found = 0; |
| 982 | |
| 983 | pr_debug |
| 984 | ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n", |
| 985 | DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); |
| 986 | |
| 987 | list_for_each_entry(dbell, &port->dbells, node) { |
| 988 | if ((dbell->res->start <= DBELL_INF(dmsg)) && |
| 989 | (dbell->res->end >= DBELL_INF(dmsg))) { |
| 990 | found = 1; |
| 991 | break; |
| 992 | } |
| 993 | } |
| 994 | if (found) { |
Matt Porter | 6978bbc | 2005-11-07 01:00:20 -0800 | [diff] [blame] | 995 | dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg), |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 996 | DBELL_INF(dmsg)); |
| 997 | } else { |
| 998 | pr_debug |
| 999 | ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n", |
| 1000 | DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); |
| 1001 | } |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1002 | setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI); |
| 1003 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1004 | } |
| 1005 | |
| 1006 | out: |
| 1007 | return IRQ_HANDLED; |
| 1008 | } |
| 1009 | |
| 1010 | /** |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1011 | * fsl_rio_doorbell_init - MPC85xx doorbell interface init |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1012 | * @mport: Master port implementing the inbound doorbell unit |
| 1013 | * |
| 1014 | * Initializes doorbell unit hardware and inbound DMA buffer |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1015 | * ring. Called from fsl_rio_setup(). Returns %0 on success |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1016 | * or %-ENOMEM on failure. |
| 1017 | */ |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1018 | static int fsl_rio_doorbell_init(struct rio_mport *mport) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1019 | { |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1020 | struct rio_priv *priv = mport->priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1021 | int rc = 0; |
| 1022 | |
| 1023 | /* Map outbound doorbell window immediately after maintenance window */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1024 | priv->dbell_win = ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE, |
| 1025 | RIO_DBELL_WIN_SIZE); |
| 1026 | if (!priv->dbell_win) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1027 | printk(KERN_ERR |
| 1028 | "RIO: unable to map outbound doorbell window\n"); |
| 1029 | rc = -ENOMEM; |
| 1030 | goto out; |
| 1031 | } |
| 1032 | |
| 1033 | /* Initialize inbound doorbells */ |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 1034 | priv->dbell_ring.virt = dma_alloc_coherent(priv->dev, 512 * |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1035 | DOORBELL_MESSAGE_SIZE, &priv->dbell_ring.phys, GFP_KERNEL); |
| 1036 | if (!priv->dbell_ring.virt) { |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1037 | printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n"); |
| 1038 | rc = -ENOMEM; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1039 | iounmap(priv->dbell_win); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1040 | goto out; |
| 1041 | } |
| 1042 | |
| 1043 | /* Point dequeue/enqueue pointers at first entry in ring */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1044 | out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys); |
| 1045 | out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1046 | |
| 1047 | /* Clear interrupt status */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1048 | out_be32(&priv->msg_regs->dsr, 0x00000091); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1049 | |
| 1050 | /* Hook up doorbell handler */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1051 | rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0, |
| 1052 | "dbell_rx", (void *)mport); |
| 1053 | if (rc < 0) { |
| 1054 | iounmap(priv->dbell_win); |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 1055 | dma_free_coherent(priv->dev, 512 * DOORBELL_MESSAGE_SIZE, |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1056 | priv->dbell_ring.virt, priv->dbell_ring.phys); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1057 | printk(KERN_ERR |
| 1058 | "MPC85xx RIO: unable to request inbound doorbell irq"); |
| 1059 | goto out; |
| 1060 | } |
| 1061 | |
| 1062 | /* Configure doorbells for snooping, 512 entries, and enable */ |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1063 | out_be32(&priv->msg_regs->dmr, 0x00108161); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1064 | |
| 1065 | out: |
| 1066 | return rc; |
| 1067 | } |
| 1068 | |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1069 | /** |
| 1070 | * fsl_rio_port_write_handler - MPC85xx port write interrupt handler |
| 1071 | * @irq: Linux interrupt number |
| 1072 | * @dev_instance: Pointer to interrupt-specific data |
| 1073 | * |
| 1074 | * Handles port write interrupts. Parses a list of registered |
| 1075 | * port write event handlers and executes a matching event handler. |
| 1076 | */ |
| 1077 | static irqreturn_t |
| 1078 | fsl_rio_port_write_handler(int irq, void *dev_instance) |
| 1079 | { |
| 1080 | u32 ipwmr, ipwsr; |
| 1081 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
| 1082 | struct rio_priv *priv = port->priv; |
| 1083 | u32 epwisr, tmp; |
| 1084 | |
| 1085 | ipwmr = in_be32(&priv->msg_regs->pwmr); |
| 1086 | ipwsr = in_be32(&priv->msg_regs->pwsr); |
| 1087 | |
| 1088 | epwisr = in_be32(priv->regs_win + RIO_EPWISR); |
| 1089 | if (epwisr & 0x80000000) { |
| 1090 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); |
| 1091 | pr_info("RIO_LTLEDCSR = 0x%x\n", tmp); |
| 1092 | out_be32(priv->regs_win + RIO_LTLEDCSR, 0); |
| 1093 | } |
| 1094 | |
| 1095 | if (!(epwisr & 0x00000001)) |
| 1096 | return IRQ_HANDLED; |
| 1097 | |
| 1098 | #ifdef DEBUG_PW |
| 1099 | pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr); |
| 1100 | if (ipwsr & RIO_IPWSR_QF) |
| 1101 | pr_debug(" QF"); |
| 1102 | if (ipwsr & RIO_IPWSR_TE) |
| 1103 | pr_debug(" TE"); |
| 1104 | if (ipwsr & RIO_IPWSR_QFI) |
| 1105 | pr_debug(" QFI"); |
| 1106 | if (ipwsr & RIO_IPWSR_PWD) |
| 1107 | pr_debug(" PWD"); |
| 1108 | if (ipwsr & RIO_IPWSR_PWB) |
| 1109 | pr_debug(" PWB"); |
| 1110 | pr_debug(" )\n"); |
| 1111 | #endif |
| 1112 | out_be32(&priv->msg_regs->pwsr, |
| 1113 | ipwsr & (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); |
| 1114 | |
| 1115 | if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) { |
| 1116 | priv->port_write_msg.err_count++; |
| 1117 | pr_info("RIO: Port-Write Transaction Err (%d)\n", |
| 1118 | priv->port_write_msg.err_count); |
| 1119 | } |
| 1120 | if (ipwsr & RIO_IPWSR_PWD) { |
| 1121 | priv->port_write_msg.discard_count++; |
| 1122 | pr_info("RIO: Port Discarded Port-Write Msg(s) (%d)\n", |
| 1123 | priv->port_write_msg.discard_count); |
| 1124 | } |
| 1125 | |
| 1126 | /* Schedule deferred processing if PW was received */ |
| 1127 | if (ipwsr & RIO_IPWSR_QFI) { |
| 1128 | /* Save PW message (if there is room in FIFO), |
| 1129 | * otherwise discard it. |
| 1130 | */ |
| 1131 | if (kfifo_avail(&priv->pw_fifo) >= RIO_PW_MSG_SIZE) { |
| 1132 | priv->port_write_msg.msg_count++; |
| 1133 | kfifo_in(&priv->pw_fifo, priv->port_write_msg.virt, |
| 1134 | RIO_PW_MSG_SIZE); |
| 1135 | } else { |
| 1136 | priv->port_write_msg.discard_count++; |
| 1137 | pr_info("RIO: ISR Discarded Port-Write Msg(s) (%d)\n", |
| 1138 | priv->port_write_msg.discard_count); |
| 1139 | } |
| 1140 | schedule_work(&priv->pw_work); |
| 1141 | } |
| 1142 | |
| 1143 | /* Issue Clear Queue command. This allows another |
| 1144 | * port-write to be received. |
| 1145 | */ |
| 1146 | out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ); |
| 1147 | |
| 1148 | return IRQ_HANDLED; |
| 1149 | } |
| 1150 | |
| 1151 | static void fsl_pw_dpc(struct work_struct *work) |
| 1152 | { |
| 1153 | struct rio_priv *priv = container_of(work, struct rio_priv, pw_work); |
| 1154 | unsigned long flags; |
| 1155 | u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)]; |
| 1156 | |
| 1157 | /* |
| 1158 | * Process port-write messages |
| 1159 | */ |
| 1160 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); |
| 1161 | while (kfifo_out(&priv->pw_fifo, (unsigned char *)msg_buffer, |
| 1162 | RIO_PW_MSG_SIZE)) { |
| 1163 | /* Process one message */ |
| 1164 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); |
| 1165 | #ifdef DEBUG_PW |
| 1166 | { |
| 1167 | u32 i; |
| 1168 | pr_debug("%s : Port-Write Message:", __func__); |
| 1169 | for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) { |
| 1170 | if ((i%4) == 0) |
| 1171 | pr_debug("\n0x%02x: 0x%08x", i*4, |
| 1172 | msg_buffer[i]); |
| 1173 | else |
| 1174 | pr_debug(" 0x%08x", msg_buffer[i]); |
| 1175 | } |
| 1176 | pr_debug("\n"); |
| 1177 | } |
| 1178 | #endif |
| 1179 | /* Pass the port-write message to RIO core for processing */ |
| 1180 | rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer); |
| 1181 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); |
| 1182 | } |
| 1183 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); |
| 1184 | } |
| 1185 | |
| 1186 | /** |
| 1187 | * fsl_rio_pw_enable - enable/disable port-write interface init |
| 1188 | * @mport: Master port implementing the port write unit |
| 1189 | * @enable: 1=enable; 0=disable port-write message handling |
| 1190 | */ |
| 1191 | static int fsl_rio_pw_enable(struct rio_mport *mport, int enable) |
| 1192 | { |
| 1193 | struct rio_priv *priv = mport->priv; |
| 1194 | u32 rval; |
| 1195 | |
| 1196 | rval = in_be32(&priv->msg_regs->pwmr); |
| 1197 | |
| 1198 | if (enable) |
| 1199 | rval |= RIO_IPWMR_PWE; |
| 1200 | else |
| 1201 | rval &= ~RIO_IPWMR_PWE; |
| 1202 | |
| 1203 | out_be32(&priv->msg_regs->pwmr, rval); |
| 1204 | |
| 1205 | return 0; |
| 1206 | } |
| 1207 | |
| 1208 | /** |
| 1209 | * fsl_rio_port_write_init - MPC85xx port write interface init |
| 1210 | * @mport: Master port implementing the port write unit |
| 1211 | * |
| 1212 | * Initializes port write unit hardware and DMA buffer |
| 1213 | * ring. Called from fsl_rio_setup(). Returns %0 on success |
| 1214 | * or %-ENOMEM on failure. |
| 1215 | */ |
| 1216 | static int fsl_rio_port_write_init(struct rio_mport *mport) |
| 1217 | { |
| 1218 | struct rio_priv *priv = mport->priv; |
| 1219 | int rc = 0; |
| 1220 | |
| 1221 | /* Following configurations require a disabled port write controller */ |
| 1222 | out_be32(&priv->msg_regs->pwmr, |
| 1223 | in_be32(&priv->msg_regs->pwmr) & ~RIO_IPWMR_PWE); |
| 1224 | |
| 1225 | /* Initialize port write */ |
| 1226 | priv->port_write_msg.virt = dma_alloc_coherent(priv->dev, |
| 1227 | RIO_PW_MSG_SIZE, |
| 1228 | &priv->port_write_msg.phys, GFP_KERNEL); |
| 1229 | if (!priv->port_write_msg.virt) { |
| 1230 | pr_err("RIO: unable allocate port write queue\n"); |
| 1231 | return -ENOMEM; |
| 1232 | } |
| 1233 | |
| 1234 | priv->port_write_msg.err_count = 0; |
| 1235 | priv->port_write_msg.discard_count = 0; |
| 1236 | |
| 1237 | /* Point dequeue/enqueue pointers at first entry */ |
| 1238 | out_be32(&priv->msg_regs->epwqbar, 0); |
| 1239 | out_be32(&priv->msg_regs->pwqbar, (u32) priv->port_write_msg.phys); |
| 1240 | |
| 1241 | pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n", |
| 1242 | in_be32(&priv->msg_regs->epwqbar), |
| 1243 | in_be32(&priv->msg_regs->pwqbar)); |
| 1244 | |
| 1245 | /* Clear interrupt status IPWSR */ |
| 1246 | out_be32(&priv->msg_regs->pwsr, |
| 1247 | (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); |
| 1248 | |
| 1249 | /* Configure port write contoller for snooping enable all reporting, |
| 1250 | clear queue full */ |
| 1251 | out_be32(&priv->msg_regs->pwmr, |
| 1252 | RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ); |
| 1253 | |
| 1254 | |
| 1255 | /* Hook up port-write handler */ |
| 1256 | rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0, |
| 1257 | "port-write", (void *)mport); |
| 1258 | if (rc < 0) { |
| 1259 | pr_err("MPC85xx RIO: unable to request inbound doorbell irq"); |
| 1260 | goto err_out; |
| 1261 | } |
| 1262 | |
| 1263 | INIT_WORK(&priv->pw_work, fsl_pw_dpc); |
| 1264 | spin_lock_init(&priv->pw_fifo_lock); |
| 1265 | if (kfifo_alloc(&priv->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) { |
| 1266 | pr_err("FIFO allocation failed\n"); |
| 1267 | rc = -ENOMEM; |
| 1268 | goto err_out_irq; |
| 1269 | } |
| 1270 | |
| 1271 | pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n", |
| 1272 | in_be32(&priv->msg_regs->pwmr), |
| 1273 | in_be32(&priv->msg_regs->pwsr)); |
| 1274 | |
| 1275 | return rc; |
| 1276 | |
| 1277 | err_out_irq: |
| 1278 | free_irq(IRQ_RIO_PW(mport), (void *)mport); |
| 1279 | err_out: |
| 1280 | dma_free_coherent(priv->dev, RIO_PW_MSG_SIZE, |
| 1281 | priv->port_write_msg.virt, |
| 1282 | priv->port_write_msg.phys); |
| 1283 | return rc; |
| 1284 | } |
| 1285 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1286 | static char *cmdline = NULL; |
| 1287 | |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1288 | static int fsl_rio_get_hdid(int index) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1289 | { |
| 1290 | /* XXX Need to parse multiple entries in some format */ |
| 1291 | if (!cmdline) |
| 1292 | return -1; |
| 1293 | |
| 1294 | return simple_strtol(cmdline, NULL, 0); |
| 1295 | } |
| 1296 | |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1297 | static int fsl_rio_get_cmdline(char *s) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1298 | { |
| 1299 | if (!s) |
| 1300 | return 0; |
| 1301 | |
| 1302 | cmdline = s; |
| 1303 | return 1; |
| 1304 | } |
| 1305 | |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1306 | __setup("riohdid=", fsl_rio_get_cmdline); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1307 | |
Zhang Wei | 7f620df | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1308 | static inline void fsl_rio_info(struct device *dev, u32 ccsr) |
| 1309 | { |
| 1310 | const char *str; |
| 1311 | if (ccsr & 1) { |
| 1312 | /* Serial phy */ |
| 1313 | switch (ccsr >> 30) { |
| 1314 | case 0: |
| 1315 | str = "1"; |
| 1316 | break; |
| 1317 | case 1: |
| 1318 | str = "4"; |
| 1319 | break; |
| 1320 | default: |
| 1321 | str = "Unknown"; |
Joe Perches | d258e64 | 2009-06-28 06:26:10 +0000 | [diff] [blame] | 1322 | break; |
Zhang Wei | 7f620df | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1323 | } |
| 1324 | dev_info(dev, "Hardware port width: %s\n", str); |
| 1325 | |
| 1326 | switch ((ccsr >> 27) & 7) { |
| 1327 | case 0: |
| 1328 | str = "Single-lane 0"; |
| 1329 | break; |
| 1330 | case 1: |
| 1331 | str = "Single-lane 2"; |
| 1332 | break; |
| 1333 | case 2: |
| 1334 | str = "Four-lane"; |
| 1335 | break; |
| 1336 | default: |
| 1337 | str = "Unknown"; |
| 1338 | break; |
| 1339 | } |
| 1340 | dev_info(dev, "Training connection status: %s\n", str); |
| 1341 | } else { |
| 1342 | /* Parallel phy */ |
| 1343 | if (!(ccsr & 0x80000000)) |
| 1344 | dev_info(dev, "Output port operating in 8-bit mode\n"); |
| 1345 | if (!(ccsr & 0x08000000)) |
| 1346 | dev_info(dev, "Input port operating in 8-bit mode\n"); |
| 1347 | } |
| 1348 | } |
| 1349 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1350 | /** |
Randy Dunlap | 9941d94 | 2008-04-30 16:45:58 -0700 | [diff] [blame] | 1351 | * fsl_rio_setup - Setup Freescale PowerPC RapidIO interface |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 1352 | * @dev: platform_device pointer |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1353 | * |
| 1354 | * Initializes MPC85xx RapidIO hardware interface, configures |
| 1355 | * master port with system-specific info, and registers the |
| 1356 | * master port with the RapidIO subsystem. |
| 1357 | */ |
Grant Likely | a454dc5 | 2010-07-22 15:52:34 -0600 | [diff] [blame] | 1358 | int fsl_rio_setup(struct platform_device *dev) |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1359 | { |
| 1360 | struct rio_ops *ops; |
| 1361 | struct rio_mport *port; |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1362 | struct rio_priv *priv; |
| 1363 | int rc = 0; |
| 1364 | const u32 *dt_range, *cell; |
| 1365 | struct resource regs; |
| 1366 | int rlen; |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1367 | u32 ccsr; |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1368 | u64 law_start, law_size; |
| 1369 | int paw, aw, sw; |
| 1370 | |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1371 | if (!dev->dev.of_node) { |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1372 | dev_err(&dev->dev, "Device OF-Node is NULL"); |
| 1373 | return -EFAULT; |
| 1374 | } |
| 1375 | |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1376 | rc = of_address_to_resource(dev->dev.of_node, 0, ®s); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1377 | if (rc) { |
| 1378 | dev_err(&dev->dev, "Can't get %s property 'reg'\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1379 | dev->dev.of_node->full_name); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1380 | return -EFAULT; |
| 1381 | } |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1382 | dev_info(&dev->dev, "Of-device full name %s\n", dev->dev.of_node->full_name); |
Kumar Gala | fc274a1 | 2009-05-13 17:02:24 -0500 | [diff] [blame] | 1383 | dev_info(&dev->dev, "Regs: %pR\n", ®s); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1384 | |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1385 | dt_range = of_get_property(dev->dev.of_node, "ranges", &rlen); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1386 | if (!dt_range) { |
| 1387 | dev_err(&dev->dev, "Can't get %s property 'ranges'\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1388 | dev->dev.of_node->full_name); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1389 | return -EFAULT; |
| 1390 | } |
| 1391 | |
| 1392 | /* Get node address wide */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1393 | cell = of_get_property(dev->dev.of_node, "#address-cells", NULL); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1394 | if (cell) |
| 1395 | aw = *cell; |
| 1396 | else |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1397 | aw = of_n_addr_cells(dev->dev.of_node); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1398 | /* Get node size wide */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1399 | cell = of_get_property(dev->dev.of_node, "#size-cells", NULL); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1400 | if (cell) |
| 1401 | sw = *cell; |
| 1402 | else |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1403 | sw = of_n_size_cells(dev->dev.of_node); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1404 | /* Get parent address wide wide */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1405 | paw = of_n_addr_cells(dev->dev.of_node); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1406 | |
| 1407 | law_start = of_read_number(dt_range + aw, paw); |
| 1408 | law_size = of_read_number(dt_range + aw + paw, sw); |
| 1409 | |
| 1410 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", |
| 1411 | law_start, law_size); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1412 | |
Alexandre Bounine | e5cabeb | 2010-05-26 14:43:59 -0700 | [diff] [blame] | 1413 | ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1414 | if (!ops) { |
| 1415 | rc = -ENOMEM; |
| 1416 | goto err_ops; |
| 1417 | } |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1418 | ops->lcread = fsl_local_config_read; |
| 1419 | ops->lcwrite = fsl_local_config_write; |
| 1420 | ops->cread = fsl_rio_config_read; |
| 1421 | ops->cwrite = fsl_rio_config_write; |
| 1422 | ops->dsend = fsl_rio_doorbell_send; |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1423 | ops->pwenable = fsl_rio_pw_enable; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1424 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1425 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1426 | if (!port) { |
| 1427 | rc = -ENOMEM; |
| 1428 | goto err_port; |
| 1429 | } |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1430 | port->id = 0; |
| 1431 | port->index = 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1432 | |
| 1433 | priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL); |
| 1434 | if (!priv) { |
| 1435 | printk(KERN_ERR "Can't alloc memory for 'priv'\n"); |
| 1436 | rc = -ENOMEM; |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1437 | goto err_priv; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1438 | } |
| 1439 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1440 | INIT_LIST_HEAD(&port->dbells); |
| 1441 | port->iores.start = law_start; |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1442 | port->iores.end = law_start + law_size - 1; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1443 | port->iores.flags = IORESOURCE_MEM; |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1444 | port->iores.name = "rio_io_win"; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1445 | |
Alexandre Bounine | 45fdf00 | 2010-05-28 13:56:17 -0400 | [diff] [blame] | 1446 | priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0); |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1447 | priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); |
| 1448 | priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); |
| 1449 | priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4); |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1450 | dev_info(&dev->dev, "pwirq: %d, bellirq: %d, txirq: %d, rxirq %d\n", |
| 1451 | priv->pwirq, priv->bellirq, priv->txirq, priv->rxirq); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1452 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1453 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); |
| 1454 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); |
| 1455 | rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0); |
| 1456 | strcpy(port->name, "RIO0 mport"); |
| 1457 | |
Anton Vorontsov | 0dbbbf1 | 2009-04-18 21:48:52 +0400 | [diff] [blame] | 1458 | priv->dev = &dev->dev; |
| 1459 | |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1460 | port->ops = ops; |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1461 | port->host_deviceid = fsl_rio_get_hdid(port->id); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1462 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1463 | port->priv = priv; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1464 | rio_register_mport(port); |
| 1465 | |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1466 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1467 | rio_regs_win = priv->regs_win; |
Zhang Wei | e042323 | 2008-04-18 13:33:42 -0700 | [diff] [blame] | 1468 | |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1469 | /* Probe the master port phy type */ |
| 1470 | ccsr = in_be32(priv->regs_win + RIO_CCSR); |
| 1471 | port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL; |
| 1472 | dev_info(&dev->dev, "RapidIO PHY type: %s\n", |
| 1473 | (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" : |
| 1474 | ((port->phy_type == RIO_PHY_SERIAL) ? "serial" : |
| 1475 | "unknown")); |
Zhang Wei | 7f620df | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1476 | /* Checking the port training status */ |
| 1477 | if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) { |
| 1478 | dev_err(&dev->dev, "Port is not ready. " |
| 1479 | "Try to restart connection...\n"); |
| 1480 | switch (port->phy_type) { |
| 1481 | case RIO_PHY_SERIAL: |
| 1482 | /* Disable ports */ |
| 1483 | out_be32(priv->regs_win + RIO_CCSR, 0); |
| 1484 | /* Set 1x lane */ |
| 1485 | setbits32(priv->regs_win + RIO_CCSR, 0x02000000); |
| 1486 | /* Enable ports */ |
| 1487 | setbits32(priv->regs_win + RIO_CCSR, 0x00600000); |
| 1488 | break; |
| 1489 | case RIO_PHY_PARALLEL: |
| 1490 | /* Disable ports */ |
| 1491 | out_be32(priv->regs_win + RIO_CCSR, 0x22000000); |
| 1492 | /* Enable ports */ |
| 1493 | out_be32(priv->regs_win + RIO_CCSR, 0x44000000); |
| 1494 | break; |
| 1495 | } |
| 1496 | msleep(100); |
| 1497 | if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) { |
| 1498 | dev_err(&dev->dev, "Port restart failed.\n"); |
| 1499 | rc = -ENOLINK; |
| 1500 | goto err; |
| 1501 | } |
| 1502 | dev_info(&dev->dev, "Port restart success!\n"); |
| 1503 | } |
| 1504 | fsl_rio_info(&dev->dev, ccsr); |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1505 | |
Zhang Wei | e042323 | 2008-04-18 13:33:42 -0700 | [diff] [blame] | 1506 | port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR)) |
| 1507 | & RIO_PEF_CTLS) >> 4; |
| 1508 | dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n", |
| 1509 | port->sys_size ? 65536 : 256); |
| 1510 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1511 | priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win |
| 1512 | + RIO_ATMU_REGS_OFFSET); |
| 1513 | priv->maint_atmu_regs = priv->atmu_regs + 1; |
| 1514 | priv->dbell_atmu_regs = priv->atmu_regs + 2; |
Zhang Wei | 61b2691 | 2008-04-18 13:33:44 -0700 | [diff] [blame] | 1515 | priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win + |
| 1516 | ((port->phy_type == RIO_PHY_SERIAL) ? |
| 1517 | RIO_S_MSG_REGS_OFFSET : RIO_P_MSG_REGS_OFFSET)); |
| 1518 | |
| 1519 | /* Set to receive any dist ID for serial RapidIO controller. */ |
| 1520 | if (port->phy_type == RIO_PHY_SERIAL) |
| 1521 | out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1522 | |
| 1523 | /* Configure maintenance transaction window */ |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1524 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); |
Thomas Moll | bd4fb65 | 2010-05-26 14:44:05 -0700 | [diff] [blame] | 1525 | out_be32(&priv->maint_atmu_regs->rowar, |
| 1526 | 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1)); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1527 | |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1528 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1529 | |
| 1530 | /* Configure outbound doorbell window */ |
Li Yang | 186e74b | 2009-05-12 16:35:59 +0800 | [diff] [blame] | 1531 | out_be32(&priv->dbell_atmu_regs->rowbar, |
| 1532 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); |
| 1533 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ |
Zhang Wei | d02443a | 2008-04-18 13:33:38 -0700 | [diff] [blame] | 1534 | fsl_rio_doorbell_init(port); |
Alexandre Bounine | 5b2074a | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1535 | fsl_rio_port_write_init(port); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1536 | |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 1537 | #ifdef CONFIG_E500 |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1538 | saved_mcheck_exception = ppc_md.machine_check_exception; |
| 1539 | ppc_md.machine_check_exception = fsl_rio_mcheck_exception; |
Li Yang | ff33f18 | 2010-06-18 14:24:20 +0800 | [diff] [blame] | 1540 | #endif |
Alexandre Bounine | a52c8f5 | 2010-05-26 14:44:00 -0700 | [diff] [blame] | 1541 | /* Ensure that RFXE is set */ |
| 1542 | mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); |
| 1543 | |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1544 | return 0; |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1545 | err: |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1546 | iounmap(priv->regs_win); |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1547 | kfree(priv); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1548 | err_priv: |
Zhang Wei | ad1e938 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1549 | kfree(port); |
Julia Lawall | 6c75933 | 2009-08-07 09:00:34 +0200 | [diff] [blame] | 1550 | err_port: |
| 1551 | kfree(ops); |
| 1552 | err_ops: |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1553 | return rc; |
Matt Porter | 2b0c28d7f | 2005-11-07 01:00:19 -0800 | [diff] [blame] | 1554 | } |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1555 | |
| 1556 | /* The probe function for RapidIO peer-to-peer network. |
| 1557 | */ |
Grant Likely | a454dc5 | 2010-07-22 15:52:34 -0600 | [diff] [blame] | 1558 | static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev, |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1559 | const struct of_device_id *match) |
| 1560 | { |
| 1561 | int rc; |
| 1562 | printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1563 | dev->dev.of_node->full_name); |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1564 | |
| 1565 | rc = fsl_rio_setup(dev); |
| 1566 | if (rc) |
| 1567 | goto out; |
| 1568 | |
| 1569 | /* Enumerate all registered ports */ |
| 1570 | rc = rio_init_mports(); |
| 1571 | out: |
| 1572 | return rc; |
| 1573 | }; |
| 1574 | |
| 1575 | static const struct of_device_id fsl_of_rio_rpn_ids[] = { |
| 1576 | { |
| 1577 | .compatible = "fsl,rapidio-delta", |
| 1578 | }, |
| 1579 | {}, |
| 1580 | }; |
| 1581 | |
| 1582 | static struct of_platform_driver fsl_of_rio_rpn_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 1583 | .driver = { |
| 1584 | .name = "fsl-of-rio", |
| 1585 | .owner = THIS_MODULE, |
| 1586 | .of_match_table = fsl_of_rio_rpn_ids, |
| 1587 | }, |
Zhang Wei | cc2bb69 | 2008-04-18 13:33:41 -0700 | [diff] [blame] | 1588 | .probe = fsl_of_rio_rpn_probe, |
| 1589 | }; |
| 1590 | |
| 1591 | static __init int fsl_of_rio_rpn_init(void) |
| 1592 | { |
| 1593 | return of_register_platform_driver(&fsl_of_rio_rpn_driver); |
| 1594 | } |
| 1595 | |
| 1596 | subsys_initcall(fsl_of_rio_rpn_init); |