J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 1 | * palmas regulator IP block devicetree bindings |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : Should be from the list |
| 5 | ti,twl6035-pmic |
| 6 | ti,twl6036-pmic |
| 7 | ti,twl6037-pmic |
| 8 | ti,tps65913-pmic |
| 9 | ti,tps65914-pmic |
| 10 | and also the generic series names |
| 11 | ti,palmas-pmic |
| 12 | - interrupt-parent : The parent interrupt controller which is palmas. |
| 13 | - interrupts : The interrupt number and the type which can be looked up here: |
| 14 | arch/arm/boot/dts/include/dt-bindings/interrupt-controller/irq.h |
| 15 | - interrupts-name: The names of the individual interrupts. |
| 16 | |
| 17 | Optional properties: |
| 18 | - ti,ldo6-vibrator : ldo6 is in vibrator mode |
| 19 | |
| 20 | Optional nodes: |
| 21 | - regulators : Must contain a sub-node per regulator from the list below. |
| 22 | Each sub-node should contain the constraints and initialization |
| 23 | information for that regulator. See regulator.txt for a |
| 24 | description of standard properties for these sub-nodes. |
| 25 | Additional custom properties are listed below. |
| 26 | |
| 27 | For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP, |
Laxman Dewangan | 0416ea1 | 2013-08-13 13:23:10 +0530 | [diff] [blame] | 28 | smps45, smps457, smps7 depending on variant, smps6, smps[8-9], |
Laxman Dewangan | 32b6d3f | 2013-08-21 16:18:16 +0530 | [diff] [blame] | 29 | smps10_out2, smps10_out1, ldo[1-9], ldoln, ldousb. |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 30 | |
| 31 | Optional sub-node properties: |
| 32 | ti,warm-reset - maintain voltage during warm reset(boolean) |
Laxman Dewangan | 32b6d3f | 2013-08-21 16:18:16 +0530 | [diff] [blame] | 33 | ti,roof-floor - This takes as optional argument on platform supporting |
| 34 | the rail from desired external control. If there is no argument then |
| 35 | it will be assume that it is controlled by NSLEEP pin. |
| 36 | The valid value for external pins are: |
| 37 | ENABLE1 then 1, |
| 38 | ENABLE2 then 2 or |
| 39 | NSLEEP then 3. |
Nishanth Menon | 393536f | 2013-07-16 11:41:09 -0500 | [diff] [blame] | 40 | ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto, |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 41 | 2 - eco, 3 - forced pwm |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 42 | ti,smps-range - OTP has the wrong range set for the hardware so override |
| 43 | 0 - low range, 1 - high range. |
| 44 | |
Bill Huang | b81eec0 | 2013-08-08 04:45:05 -0700 | [diff] [blame] | 45 | - ti,system-power-controller: Telling whether or not this pmic is controlling |
| 46 | the system power. |
| 47 | |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 48 | Example: |
| 49 | |
| 50 | #include <dt-bindings/interrupt-controller/irq.h> |
| 51 | |
| 52 | pmic { |
| 53 | compatible = "ti,twl6035-pmic", "ti,palmas-pmic"; |
| 54 | interrupt-parent = <&palmas>; |
| 55 | interrupts = <14 IRQ_TYPE_NONE>; |
| 56 | interrupts-name = "short-irq"; |
| 57 | |
| 58 | ti,ldo6-vibrator; |
| 59 | |
Bill Huang | b81eec0 | 2013-08-08 04:45:05 -0700 | [diff] [blame] | 60 | ti,system-power-controller; |
| 61 | |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 62 | regulators { |
| 63 | smps12_reg : smps12 { |
| 64 | regulator-name = "smps12"; |
| 65 | regulator-min-microvolt = < 600000>; |
| 66 | regulator-max-microvolt = <1500000>; |
| 67 | regulator-always-on; |
| 68 | regulator-boot-on; |
| 69 | ti,warm-reset; |
Laxman Dewangan | 32b6d3f | 2013-08-21 16:18:16 +0530 | [diff] [blame] | 70 | ti,roof-floor = <1>; /* ENABLE1 control */ |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 71 | ti,mode-sleep = <0>; |
J Keerthy | 8d561b6 | 2013-06-06 10:57:21 +0530 | [diff] [blame] | 72 | ti,smps-range = <1>; |
| 73 | }; |
| 74 | |
| 75 | ldo1_reg: ldo1 { |
| 76 | regulator-name = "ldo1"; |
| 77 | regulator-min-microvolt = <2800000>; |
| 78 | regulator-max-microvolt = <2800000>; |
| 79 | }; |
| 80 | }; |
| 81 | }; |