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Stephen Boyd6e332162012-09-05 12:28:53 -07001* MSM Timer
2
3Properties:
4
5- compatible : Should at least contain "qcom,msm-timer". More specific
Stephen Boydeebdb0c2013-03-14 20:31:38 -07006 properties specify which subsystem the timers are paired with.
Stephen Boyd6e332162012-09-05 12:28:53 -07007
Stephen Boydeebdb0c2013-03-14 20:31:38 -07008 "qcom,kpss-timer" - krait subsystem
9 "qcom,scss-timer" - scorpion subsystem
Stephen Boyd6e332162012-09-05 12:28:53 -070010
Masanari Iidaac3e8ea2015-01-02 22:54:39 +090011- interrupts : Interrupts for the debug timer, the first general purpose
Stephen Boydeebdb0c2013-03-14 20:31:38 -070012 timer, and optionally a second general purpose timer in that
13 order.
Stephen Boyd6e332162012-09-05 12:28:53 -070014
Stephen Boydeebdb0c2013-03-14 20:31:38 -070015- reg : Specifies the base address of the timer registers.
16
17- clock-frequency : The frequency of the debug timer and the general purpose
18 timer(s) in Hz in that order.
Stephen Boyd6e332162012-09-05 12:28:53 -070019
20Optional:
21
22- cpu-offset : per-cpu offset used when the timer is accessed without the
Stephen Boydeebdb0c2013-03-14 20:31:38 -070023 CPU remapping facilities. The offset is
24 cpu-offset + (0x10000 * cpu-nr).
Stephen Boyd6e332162012-09-05 12:28:53 -070025
26Example:
27
Stephen Boydeebdb0c2013-03-14 20:31:38 -070028 timer@200a000 {
29 compatible = "qcom,scss-timer", "qcom,msm-timer";
30 interrupts = <1 1 0x301>,
31 <1 2 0x301>,
32 <1 3 0x301>;
33 reg = <0x0200a000 0x100>;
34 clock-frequency = <19200000>,
35 <32768>;
Stephen Boyd6e332162012-09-05 12:28:53 -070036 cpu-offset = <0x40000>;
37 };