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gerrit-public.fairphone.software / kernel / msm-4.9 / ac6c9e2bed093c4b60e313674fb7aec4f264c3d4 / . / arch / ia64 / kvm / asm-offsets.c
blob: 9324c875caf534e2e9908c618188d0a863cd5e9b [file] [log] [blame]
Xiantao Zhangd62998a2008-04-01 14:57:53 +0800[diff] [blame]1/*
2 * asm-offsets.c Generate definitions needed by assembly language modules.
3 * This code generates raw asm output which is post-processed
4 * to extract and format the required data.
5 *
6 * Anthony Xu <anthony.xu@intel.com>
7 * Xiantao Zhang <xiantao.zhang@intel.com>
8 * Copyright (c) 2007 Intel Corporation KVM support.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
21 * Place - Suite 330, Boston, MA 02111-1307 USA.
22 *
23 */
24
Xiantao Zhangd62998a2008-04-01 14:57:53 +0800[diff] [blame]25#include <linux/kvm_host.h>
Xiantao Zhang30ed5bb2008-10-24 11:47:57 +0800[diff] [blame]26#include <linux/kbuild.h>
Xiantao Zhangd62998a2008-04-01 14:57:53 +0800[diff] [blame]27
28#include "vcpu.h"
29
Xiantao Zhangd62998a2008-04-01 14:57:53 +0800[diff] [blame]30void foo(void)
31{
32 DEFINE(VMM_TASK_SIZE, sizeof(struct kvm_vcpu));
33 DEFINE(VMM_PT_REGS_SIZE, sizeof(struct kvm_pt_regs));
34
35 BLANK();
36
37 DEFINE(VMM_VCPU_META_RR0_OFFSET,
38 offsetof(struct kvm_vcpu, arch.metaphysical_rr0));
39 DEFINE(VMM_VCPU_META_SAVED_RR0_OFFSET,
40 offsetof(struct kvm_vcpu,
41 arch.metaphysical_saved_rr0));
42 DEFINE(VMM_VCPU_VRR0_OFFSET,
43 offsetof(struct kvm_vcpu, arch.vrr[0]));
44 DEFINE(VMM_VPD_IRR0_OFFSET,
45 offsetof(struct vpd, irr[0]));
46 DEFINE(VMM_VCPU_ITC_CHECK_OFFSET,
47 offsetof(struct kvm_vcpu, arch.itc_check));
48 DEFINE(VMM_VCPU_IRQ_CHECK_OFFSET,
49 offsetof(struct kvm_vcpu, arch.irq_check));
50 DEFINE(VMM_VPD_VHPI_OFFSET,
51 offsetof(struct vpd, vhpi));
52 DEFINE(VMM_VCPU_VSA_BASE_OFFSET,
53 offsetof(struct kvm_vcpu, arch.vsa_base));
54 DEFINE(VMM_VCPU_VPD_OFFSET,
55 offsetof(struct kvm_vcpu, arch.vpd));
56 DEFINE(VMM_VCPU_IRQ_CHECK,
57 offsetof(struct kvm_vcpu, arch.irq_check));
58 DEFINE(VMM_VCPU_TIMER_PENDING,
59 offsetof(struct kvm_vcpu, arch.timer_pending));
60 DEFINE(VMM_VCPU_META_SAVED_RR0_OFFSET,
61 offsetof(struct kvm_vcpu, arch.metaphysical_saved_rr0));
62 DEFINE(VMM_VCPU_MODE_FLAGS_OFFSET,
63 offsetof(struct kvm_vcpu, arch.mode_flags));
64 DEFINE(VMM_VCPU_ITC_OFS_OFFSET,
65 offsetof(struct kvm_vcpu, arch.itc_offset));
66 DEFINE(VMM_VCPU_LAST_ITC_OFFSET,
67 offsetof(struct kvm_vcpu, arch.last_itc));
68 DEFINE(VMM_VCPU_SAVED_GP_OFFSET,
69 offsetof(struct kvm_vcpu, arch.saved_gp));
70
71 BLANK();
72
73 DEFINE(VMM_PT_REGS_B6_OFFSET,
74 offsetof(struct kvm_pt_regs, b6));
75 DEFINE(VMM_PT_REGS_B7_OFFSET,
76 offsetof(struct kvm_pt_regs, b7));
77 DEFINE(VMM_PT_REGS_AR_CSD_OFFSET,
78 offsetof(struct kvm_pt_regs, ar_csd));
79 DEFINE(VMM_PT_REGS_AR_SSD_OFFSET,
80 offsetof(struct kvm_pt_regs, ar_ssd));
81 DEFINE(VMM_PT_REGS_R8_OFFSET,
82 offsetof(struct kvm_pt_regs, r8));
83 DEFINE(VMM_PT_REGS_R9_OFFSET,
84 offsetof(struct kvm_pt_regs, r9));
85 DEFINE(VMM_PT_REGS_R10_OFFSET,
86 offsetof(struct kvm_pt_regs, r10));
87 DEFINE(VMM_PT_REGS_R11_OFFSET,
88 offsetof(struct kvm_pt_regs, r11));
89 DEFINE(VMM_PT_REGS_CR_IPSR_OFFSET,
90 offsetof(struct kvm_pt_regs, cr_ipsr));
91 DEFINE(VMM_PT_REGS_CR_IIP_OFFSET,
92 offsetof(struct kvm_pt_regs, cr_iip));
93 DEFINE(VMM_PT_REGS_CR_IFS_OFFSET,
94 offsetof(struct kvm_pt_regs, cr_ifs));
95 DEFINE(VMM_PT_REGS_AR_UNAT_OFFSET,
96 offsetof(struct kvm_pt_regs, ar_unat));
97 DEFINE(VMM_PT_REGS_AR_PFS_OFFSET,
98 offsetof(struct kvm_pt_regs, ar_pfs));
99 DEFINE(VMM_PT_REGS_AR_RSC_OFFSET,
100 offsetof(struct kvm_pt_regs, ar_rsc));
101 DEFINE(VMM_PT_REGS_AR_RNAT_OFFSET,
102 offsetof(struct kvm_pt_regs, ar_rnat));
103
104 DEFINE(VMM_PT_REGS_AR_BSPSTORE_OFFSET,
105 offsetof(struct kvm_pt_regs, ar_bspstore));
106 DEFINE(VMM_PT_REGS_PR_OFFSET,
107 offsetof(struct kvm_pt_regs, pr));
108 DEFINE(VMM_PT_REGS_B0_OFFSET,
109 offsetof(struct kvm_pt_regs, b0));
110 DEFINE(VMM_PT_REGS_LOADRS_OFFSET,
111 offsetof(struct kvm_pt_regs, loadrs));
112 DEFINE(VMM_PT_REGS_R1_OFFSET,
113 offsetof(struct kvm_pt_regs, r1));
114 DEFINE(VMM_PT_REGS_R12_OFFSET,
115 offsetof(struct kvm_pt_regs, r12));
116 DEFINE(VMM_PT_REGS_R13_OFFSET,
117 offsetof(struct kvm_pt_regs, r13));
118 DEFINE(VMM_PT_REGS_AR_FPSR_OFFSET,
119 offsetof(struct kvm_pt_regs, ar_fpsr));
120 DEFINE(VMM_PT_REGS_R15_OFFSET,
121 offsetof(struct kvm_pt_regs, r15));
122 DEFINE(VMM_PT_REGS_R14_OFFSET,
123 offsetof(struct kvm_pt_regs, r14));
124 DEFINE(VMM_PT_REGS_R2_OFFSET,
125 offsetof(struct kvm_pt_regs, r2));
126 DEFINE(VMM_PT_REGS_R3_OFFSET,
127 offsetof(struct kvm_pt_regs, r3));
128 DEFINE(VMM_PT_REGS_R16_OFFSET,
129 offsetof(struct kvm_pt_regs, r16));
130 DEFINE(VMM_PT_REGS_R17_OFFSET,
131 offsetof(struct kvm_pt_regs, r17));
132 DEFINE(VMM_PT_REGS_R18_OFFSET,
133 offsetof(struct kvm_pt_regs, r18));
134 DEFINE(VMM_PT_REGS_R19_OFFSET,
135 offsetof(struct kvm_pt_regs, r19));
136 DEFINE(VMM_PT_REGS_R20_OFFSET,
137 offsetof(struct kvm_pt_regs, r20));
138 DEFINE(VMM_PT_REGS_R21_OFFSET,
139 offsetof(struct kvm_pt_regs, r21));
140 DEFINE(VMM_PT_REGS_R22_OFFSET,
141 offsetof(struct kvm_pt_regs, r22));
142 DEFINE(VMM_PT_REGS_R23_OFFSET,
143 offsetof(struct kvm_pt_regs, r23));
144 DEFINE(VMM_PT_REGS_R24_OFFSET,
145 offsetof(struct kvm_pt_regs, r24));
146 DEFINE(VMM_PT_REGS_R25_OFFSET,
147 offsetof(struct kvm_pt_regs, r25));
148 DEFINE(VMM_PT_REGS_R26_OFFSET,
149 offsetof(struct kvm_pt_regs, r26));
150 DEFINE(VMM_PT_REGS_R27_OFFSET,
151 offsetof(struct kvm_pt_regs, r27));
152 DEFINE(VMM_PT_REGS_R28_OFFSET,
153 offsetof(struct kvm_pt_regs, r28));
154 DEFINE(VMM_PT_REGS_R29_OFFSET,
155 offsetof(struct kvm_pt_regs, r29));
156 DEFINE(VMM_PT_REGS_R30_OFFSET,
157 offsetof(struct kvm_pt_regs, r30));
158 DEFINE(VMM_PT_REGS_R31_OFFSET,
159 offsetof(struct kvm_pt_regs, r31));
160 DEFINE(VMM_PT_REGS_AR_CCV_OFFSET,
161 offsetof(struct kvm_pt_regs, ar_ccv));
162 DEFINE(VMM_PT_REGS_F6_OFFSET,
163 offsetof(struct kvm_pt_regs, f6));
164 DEFINE(VMM_PT_REGS_F7_OFFSET,
165 offsetof(struct kvm_pt_regs, f7));
166 DEFINE(VMM_PT_REGS_F8_OFFSET,
167 offsetof(struct kvm_pt_regs, f8));
168 DEFINE(VMM_PT_REGS_F9_OFFSET,
169 offsetof(struct kvm_pt_regs, f9));
170 DEFINE(VMM_PT_REGS_F10_OFFSET,
171 offsetof(struct kvm_pt_regs, f10));
172 DEFINE(VMM_PT_REGS_F11_OFFSET,
173 offsetof(struct kvm_pt_regs, f11));
174 DEFINE(VMM_PT_REGS_R4_OFFSET,
175 offsetof(struct kvm_pt_regs, r4));
176 DEFINE(VMM_PT_REGS_R5_OFFSET,
177 offsetof(struct kvm_pt_regs, r5));
178 DEFINE(VMM_PT_REGS_R6_OFFSET,
179 offsetof(struct kvm_pt_regs, r6));
180 DEFINE(VMM_PT_REGS_R7_OFFSET,
181 offsetof(struct kvm_pt_regs, r7));
182 DEFINE(VMM_PT_REGS_EML_UNAT_OFFSET,
183 offsetof(struct kvm_pt_regs, eml_unat));
184 DEFINE(VMM_VCPU_IIPA_OFFSET,
185 offsetof(struct kvm_vcpu, arch.cr_iipa));
186 DEFINE(VMM_VCPU_OPCODE_OFFSET,
187 offsetof(struct kvm_vcpu, arch.opcode));
188 DEFINE(VMM_VCPU_CAUSE_OFFSET, offsetof(struct kvm_vcpu, arch.cause));
189 DEFINE(VMM_VCPU_ISR_OFFSET,
190 offsetof(struct kvm_vcpu, arch.cr_isr));
191 DEFINE(VMM_PT_REGS_R16_SLOT,
192 (((offsetof(struct kvm_pt_regs, r16)
193 - sizeof(struct kvm_pt_regs)) >> 3) & 0x3f));
194 DEFINE(VMM_VCPU_MODE_FLAGS_OFFSET,
195 offsetof(struct kvm_vcpu, arch.mode_flags));
196 DEFINE(VMM_VCPU_GP_OFFSET, offsetof(struct kvm_vcpu, arch.__gp));
197 BLANK();
198
199 DEFINE(VMM_VPD_BASE_OFFSET, offsetof(struct kvm_vcpu, arch.vpd));
200 DEFINE(VMM_VPD_VIFS_OFFSET, offsetof(struct vpd, ifs));
201 DEFINE(VMM_VLSAPIC_INSVC_BASE_OFFSET,
202 offsetof(struct kvm_vcpu, arch.insvc[0]));
203 DEFINE(VMM_VPD_VPTA_OFFSET, offsetof(struct vpd, pta));
204 DEFINE(VMM_VPD_VPSR_OFFSET, offsetof(struct vpd, vpsr));
205
206 DEFINE(VMM_CTX_R4_OFFSET, offsetof(union context, gr[4]));
207 DEFINE(VMM_CTX_R5_OFFSET, offsetof(union context, gr[5]));
208 DEFINE(VMM_CTX_R12_OFFSET, offsetof(union context, gr[12]));
209 DEFINE(VMM_CTX_R13_OFFSET, offsetof(union context, gr[13]));
210 DEFINE(VMM_CTX_KR0_OFFSET, offsetof(union context, ar[0]));
211 DEFINE(VMM_CTX_KR1_OFFSET, offsetof(union context, ar[1]));
212 DEFINE(VMM_CTX_B0_OFFSET, offsetof(union context, br[0]));
213 DEFINE(VMM_CTX_B1_OFFSET, offsetof(union context, br[1]));
214 DEFINE(VMM_CTX_B2_OFFSET, offsetof(union context, br[2]));
215 DEFINE(VMM_CTX_RR0_OFFSET, offsetof(union context, rr[0]));
216 DEFINE(VMM_CTX_RSC_OFFSET, offsetof(union context, ar[16]));
217 DEFINE(VMM_CTX_BSPSTORE_OFFSET, offsetof(union context, ar[18]));
218 DEFINE(VMM_CTX_RNAT_OFFSET, offsetof(union context, ar[19]));
219 DEFINE(VMM_CTX_FCR_OFFSET, offsetof(union context, ar[21]));
220 DEFINE(VMM_CTX_EFLAG_OFFSET, offsetof(union context, ar[24]));
221 DEFINE(VMM_CTX_CFLG_OFFSET, offsetof(union context, ar[27]));
222 DEFINE(VMM_CTX_FSR_OFFSET, offsetof(union context, ar[28]));
223 DEFINE(VMM_CTX_FIR_OFFSET, offsetof(union context, ar[29]));
224 DEFINE(VMM_CTX_FDR_OFFSET, offsetof(union context, ar[30]));
225 DEFINE(VMM_CTX_UNAT_OFFSET, offsetof(union context, ar[36]));
226 DEFINE(VMM_CTX_FPSR_OFFSET, offsetof(union context, ar[40]));
227 DEFINE(VMM_CTX_PFS_OFFSET, offsetof(union context, ar[64]));
228 DEFINE(VMM_CTX_LC_OFFSET, offsetof(union context, ar[65]));
229 DEFINE(VMM_CTX_DCR_OFFSET, offsetof(union context, cr[0]));
230 DEFINE(VMM_CTX_IVA_OFFSET, offsetof(union context, cr[2]));
231 DEFINE(VMM_CTX_PTA_OFFSET, offsetof(union context, cr[8]));
232 DEFINE(VMM_CTX_IBR0_OFFSET, offsetof(union context, ibr[0]));
233 DEFINE(VMM_CTX_DBR0_OFFSET, offsetof(union context, dbr[0]));
234 DEFINE(VMM_CTX_F2_OFFSET, offsetof(union context, fr[2]));
235 DEFINE(VMM_CTX_F3_OFFSET, offsetof(union context, fr[3]));
236 DEFINE(VMM_CTX_F32_OFFSET, offsetof(union context, fr[32]));
237 DEFINE(VMM_CTX_F33_OFFSET, offsetof(union context, fr[33]));
238 DEFINE(VMM_CTX_PKR0_OFFSET, offsetof(union context, pkr[0]));
239 DEFINE(VMM_CTX_PSR_OFFSET, offsetof(union context, psr));
240 BLANK();
241}