blob: 00a8a40a372954fdcbbb1d4cd92b3ab1cc953765 [file] [log] [blame]
Christian Daudt01ebea12013-06-20 14:26:37 -07001/*
2 * Copyright (C) 2013 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/delay.h>
17#include <linux/highmem.h>
18#include <linux/platform_device.h>
19#include <linux/mmc/host.h>
20#include <linux/io.h>
21#include <linux/gpio.h>
22#include <linux/clk.h>
23#include <linux/regulator/consumer.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/of_gpio.h>
Christian Daudt01ebea12013-06-20 14:26:37 -070027#include <linux/mmc/slot-gpio.h>
28
29#include "sdhci-pltfm.h"
30#include "sdhci.h"
31
32#define SDHCI_SOFT_RESET 0x01000000
33#define KONA_SDHOST_CORECTRL 0x8000
34#define KONA_SDHOST_CD_PINCTRL 0x00000008
35#define KONA_SDHOST_STOP_HCLK 0x00000004
36#define KONA_SDHOST_RESET 0x00000002
37#define KONA_SDHOST_EN 0x00000001
38
39#define KONA_SDHOST_CORESTAT 0x8004
40#define KONA_SDHOST_WP 0x00000002
41#define KONA_SDHOST_CD_SW 0x00000001
42
43#define KONA_SDHOST_COREIMR 0x8008
44#define KONA_SDHOST_IP 0x00000001
45
46#define KONA_SDHOST_COREISR 0x800C
47#define KONA_SDHOST_COREIMSR 0x8010
48#define KONA_SDHOST_COREDBG1 0x8014
49#define KONA_SDHOST_COREGPO_MASK 0x8018
50
51#define SD_DETECT_GPIO_DEBOUNCE_128MS 128
52
53#define KONA_MMC_AUTOSUSPEND_DELAY (50)
54
55struct sdhci_bcm_kona_dev {
56 struct mutex write_lock; /* protect back to back writes */
57};
58
59
60static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
61{
62 unsigned int val;
63 unsigned long timeout;
64
65 /* This timeout should be sufficent for core to reset */
66 timeout = jiffies + msecs_to_jiffies(100);
67
68 /* reset the host using the top level reset */
69 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
70 val |= KONA_SDHOST_RESET;
71 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
72
73 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
74 if (time_is_before_jiffies(timeout)) {
75 pr_err("Error: sd host is stuck in reset!!!\n");
76 return -EFAULT;
77 }
78 }
79
80 /* bring the host out of reset */
81 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
82 val &= ~KONA_SDHOST_RESET;
83
84 /*
85 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
86 * Back-to-Back writes to same register needs delay when SD bus clock
87 * is very low w.r.t AHB clock, mainly during boot-time and during card
88 * insert-removal.
89 */
90 usleep_range(1000, 5000);
91 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
92
93 return 0;
94}
95
96static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
97{
98 unsigned int val;
99
100 /* enable the interrupt from the IP core */
101 val = sdhci_readl(host, KONA_SDHOST_COREIMR);
102 val |= KONA_SDHOST_IP;
103 sdhci_writel(host, val, KONA_SDHOST_COREIMR);
104
105 /* Enable the AHB clock gating module to the host */
106 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
107 val |= KONA_SDHOST_EN;
108
109 /*
110 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
111 * Back-to-Back writes to same register needs delay when SD bus clock
112 * is very low w.r.t AHB clock, mainly during boot-time and during card
113 * insert-removal.
114 */
115 usleep_range(1000, 5000);
116 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
117}
118
119/*
120 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
121 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
122 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
123 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
124 */
125static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
126{
127 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
128 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
129 u32 val;
130
131 /*
132 * Back-to-Back register write needs a delay of min 10uS.
133 * Back-to-Back writes to same register needs delay when SD bus clock
134 * is very low w.r.t AHB clock, mainly during boot-time and during card
135 * insert-removal.
136 * We keep 20uS
137 */
138 mutex_lock(&kona_dev->write_lock);
139 udelay(20);
140 val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
141
142 if (insert) {
143 int ret;
144
145 ret = mmc_gpio_get_ro(host->mmc);
146 if (ret >= 0)
147 val = (val & ~KONA_SDHOST_WP) |
148 ((ret) ? KONA_SDHOST_WP : 0);
149
150 val |= KONA_SDHOST_CD_SW;
151 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
152 } else {
153 val &= ~KONA_SDHOST_CD_SW;
154 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
155 }
156 mutex_unlock(&kona_dev->write_lock);
157
158 return 0;
159}
160
161/*
162 * SD card interrupt event callback
163 */
Sachin Kamatceb2ea12013-07-08 11:41:53 +0530164static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
Christian Daudt01ebea12013-06-20 14:26:37 -0700165{
166 if (mmc_gpio_get_cd(host->mmc) > 0) {
167 dev_dbg(mmc_dev(host->mmc),
168 "card inserted\n");
169 sdhci_bcm_kona_sd_card_emulate(host, 1);
170 } else {
171 dev_dbg(mmc_dev(host->mmc),
172 "card removed\n");
173 sdhci_bcm_kona_sd_card_emulate(host, 0);
174 }
175}
176
Christian Daudt01ebea12013-06-20 14:26:37 -0700177static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
178 u8 power_mode)
179{
180 /*
181 * JEDEC and SD spec specify supplying 74 continuous clocks to
182 * device after power up. With minimum bus (100KHz) that
183 * that translates to 740us
184 */
185 if (power_mode != MMC_POWER_OFF)
186 udelay(740);
187}
188
189static struct sdhci_ops sdhci_bcm_kona_ops = {
Russell King17710592014-04-25 12:58:55 +0100190 .set_clock = sdhci_set_clock,
Kevin Hao2290fcb2015-02-27 15:47:29 +0800191 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
192 .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
Christian Daudt01ebea12013-06-20 14:26:37 -0700193 .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
Russell King2317f562014-04-25 12:57:07 +0100194 .set_bus_width = sdhci_set_bus_width,
Russell King03231f92014-04-25 12:57:12 +0100195 .reset = sdhci_reset,
Russell King96d7b782014-04-25 12:59:26 +0100196 .set_uhs_signaling = sdhci_set_uhs_signaling,
Christian Daudt01ebea12013-06-20 14:26:37 -0700197 .card_event = sdhci_bcm_kona_card_event,
198};
199
200static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
201 .ops = &sdhci_bcm_kona_ops,
202 .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
203 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
204 SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
205 SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
206 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
207};
208
Behan Websterb3f635a2014-09-25 15:45:22 -0700209static const struct of_device_id sdhci_bcm_kona_of_match[] = {
Christian Daudtaea237b2013-08-20 08:37:19 -0700210 { .compatible = "brcm,kona-sdhci"},
211 { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
Christian Daudt01ebea12013-06-20 14:26:37 -0700212 {}
213};
214MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
215
Markus Mayer058feb52013-08-07 15:39:59 -0700216static int sdhci_bcm_kona_probe(struct platform_device *pdev)
Christian Daudt01ebea12013-06-20 14:26:37 -0700217{
218 struct sdhci_bcm_kona_dev *kona_dev = NULL;
219 struct sdhci_pltfm_host *pltfm_priv;
220 struct device *dev = &pdev->dev;
221 struct sdhci_host *host;
222 int ret;
223
224 ret = 0;
225
226 host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
227 sizeof(*kona_dev));
228 if (IS_ERR(host))
229 return PTR_ERR(host);
230
231 dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
232
233 pltfm_priv = sdhci_priv(host);
234
235 kona_dev = sdhci_pltfm_priv(pltfm_priv);
236 mutex_init(&kona_dev->write_lock);
237
Ulf Hanssonacfa77b2014-12-18 10:41:40 +0100238 ret = mmc_of_parse(host->mmc);
239 if (ret)
240 goto err_pltfm_free;
Christian Daudt01ebea12013-06-20 14:26:37 -0700241
242 if (!host->mmc->f_max) {
243 dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
244 ret = -ENXIO;
245 goto err_pltfm_free;
246 }
247
Kevin Hao2290fcb2015-02-27 15:47:29 +0800248 /* Get and enable the core clock */
249 pltfm_priv->clk = devm_clk_get(dev, NULL);
250 if (IS_ERR(pltfm_priv->clk)) {
251 dev_err(dev, "Failed to get core clock\n");
252 ret = PTR_ERR(pltfm_priv->clk);
Tim Krygera6492c02013-12-05 11:20:41 -0800253 goto err_pltfm_free;
254 }
255
Kevin Hao2290fcb2015-02-27 15:47:29 +0800256 if (clk_set_rate(pltfm_priv->clk, host->mmc->f_max) != 0) {
257 dev_err(dev, "Failed to set rate core clock\n");
Tim Krygera6492c02013-12-05 11:20:41 -0800258 goto err_pltfm_free;
259 }
260
Kevin Hao2290fcb2015-02-27 15:47:29 +0800261 if (clk_prepare_enable(pltfm_priv->clk) != 0) {
262 dev_err(dev, "Failed to enable core clock\n");
Tim Krygera6492c02013-12-05 11:20:41 -0800263 goto err_pltfm_free;
264 }
265
Christian Daudt01ebea12013-06-20 14:26:37 -0700266 dev_dbg(dev, "non-removable=%c\n",
267 (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
268 dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
269 (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
270 (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
271
Christian Daudtcf68b622013-08-02 15:32:27 -0700272 if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
Christian Daudt01ebea12013-06-20 14:26:37 -0700273 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
274
275 dev_dbg(dev, "is_8bit=%c\n",
Javier Martinez Canillas28804292015-09-16 11:53:20 +0200276 (host->mmc->caps & MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
Christian Daudt01ebea12013-06-20 14:26:37 -0700277
278 ret = sdhci_bcm_kona_sd_reset(host);
279 if (ret)
Tim Krygera6492c02013-12-05 11:20:41 -0800280 goto err_clk_disable;
Christian Daudt01ebea12013-06-20 14:26:37 -0700281
282 sdhci_bcm_kona_sd_init(host);
283
284 ret = sdhci_add_host(host);
285 if (ret) {
286 dev_err(dev, "Failed sdhci_add_host\n");
287 goto err_reset;
288 }
289
290 /* if device is eMMC, emulate card insert right here */
Christian Daudtcf68b622013-08-02 15:32:27 -0700291 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
Christian Daudt01ebea12013-06-20 14:26:37 -0700292 ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
293 if (ret) {
294 dev_err(dev,
295 "unable to emulate card insertion\n");
296 goto err_remove_host;
297 }
298 }
299 /*
300 * Since the card detection GPIO interrupt is configured to be
301 * edge sensitive, check the initial GPIO value here, emulate
302 * only if the card is present
303 */
304 if (mmc_gpio_get_cd(host->mmc) > 0)
305 sdhci_bcm_kona_sd_card_emulate(host, 1);
306
307 dev_dbg(dev, "initialized properly\n");
308 return 0;
309
310err_remove_host:
311 sdhci_remove_host(host, 0);
312
313err_reset:
314 sdhci_bcm_kona_sd_reset(host);
315
Tim Krygera6492c02013-12-05 11:20:41 -0800316err_clk_disable:
Kevin Hao2290fcb2015-02-27 15:47:29 +0800317 clk_disable_unprepare(pltfm_priv->clk);
Tim Krygera6492c02013-12-05 11:20:41 -0800318
Christian Daudt01ebea12013-06-20 14:26:37 -0700319err_pltfm_free:
320 sdhci_pltfm_free(pdev);
321
322 dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
323 return ret;
324}
325
Christian Daudt01ebea12013-06-20 14:26:37 -0700326static struct platform_driver sdhci_bcm_kona_driver = {
327 .driver = {
328 .name = "sdhci-kona",
Christian Daudt01ebea12013-06-20 14:26:37 -0700329 .pm = SDHCI_PLTFM_PMOPS,
Markus Mayer058feb52013-08-07 15:39:59 -0700330 .of_match_table = sdhci_bcm_kona_of_match,
Christian Daudt01ebea12013-06-20 14:26:37 -0700331 },
332 .probe = sdhci_bcm_kona_probe,
Kevin Haocaebcae2015-02-27 15:47:31 +0800333 .remove = sdhci_pltfm_unregister,
Christian Daudt01ebea12013-06-20 14:26:37 -0700334};
335module_platform_driver(sdhci_bcm_kona_driver);
336
337MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
338MODULE_AUTHOR("Broadcom");
339MODULE_LICENSE("GPL v2");