Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 1 | /*-*- linux-c -*- |
| 2 | * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support |
| 3 | * |
| 4 | * Copyright (C) 2004 Antonino Daplas<adaplas@pol.net> |
| 5 | * All Rights Reserved |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file COPYING in the main directory of this archive for |
| 9 | * more details. |
| 10 | */ |
| 11 | #include <linux/config.h> |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/sched.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/pci.h> |
| 17 | #include <linux/fb.h> |
| 18 | #include "i810.h" |
| 19 | #include "i810_regs.h" |
Adrian Bunk | a0aa7d0 | 2006-01-09 20:54:04 -0800 | [diff] [blame] | 20 | #include "i810_main.h" |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 21 | #include "../edid.h" |
| 22 | |
| 23 | #define I810_DDC 0x50 |
| 24 | /* bit locations in the registers */ |
| 25 | #define SCL_DIR_MASK 0x0001 |
| 26 | #define SCL_DIR 0x0002 |
| 27 | #define SCL_VAL_MASK 0x0004 |
| 28 | #define SCL_VAL_OUT 0x0008 |
| 29 | #define SCL_VAL_IN 0x0010 |
| 30 | #define SDA_DIR_MASK 0x0100 |
| 31 | #define SDA_DIR 0x0200 |
| 32 | #define SDA_VAL_MASK 0x0400 |
| 33 | #define SDA_VAL_OUT 0x0800 |
| 34 | #define SDA_VAL_IN 0x1000 |
| 35 | |
| 36 | #define DEBUG /* define this for verbose EDID parsing output */ |
| 37 | |
| 38 | #ifdef DEBUG |
| 39 | #define DPRINTK(fmt, args...) printk(fmt,## args) |
| 40 | #else |
| 41 | #define DPRINTK(fmt, args...) |
| 42 | #endif |
| 43 | |
| 44 | static void i810i2c_setscl(void *data, int state) |
| 45 | { |
Antonino A. Daplas | c019c0e | 2006-01-09 20:53:03 -0800 | [diff] [blame] | 46 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 47 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 48 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 49 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 50 | i810_writel(mmio, chan->ddc_base, (state ? SCL_VAL_OUT : 0) | SCL_DIR | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 51 | SCL_DIR_MASK | SCL_VAL_MASK); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 52 | i810_readl(mmio, chan->ddc_base); /* flush posted write */ |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | static void i810i2c_setsda(void *data, int state) |
| 56 | { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 57 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 58 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 59 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 60 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 61 | i810_writel(mmio, chan->ddc_base, (state ? SDA_VAL_OUT : 0) | SDA_DIR | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 62 | SDA_DIR_MASK | SDA_VAL_MASK); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 63 | i810_readl(mmio, chan->ddc_base); /* flush posted write */ |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | static int i810i2c_getscl(void *data) |
| 67 | { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 68 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 69 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 70 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 71 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 72 | i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK); |
| 73 | i810_writel(mmio, chan->ddc_base, 0); |
| 74 | return ((i810_readl(mmio, chan->ddc_base) & SCL_VAL_IN) != 0); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | static int i810i2c_getsda(void *data) |
| 78 | { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 79 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 80 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 81 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 82 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 83 | i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK); |
| 84 | i810_writel(mmio, chan->ddc_base, 0); |
| 85 | return ((i810_readl(mmio, chan->ddc_base) & SDA_VAL_IN) != 0); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 86 | } |
| 87 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 88 | static int i810_setup_i2c_bus(struct i810fb_i2c_chan *chan, const char *name) |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 89 | { |
| 90 | int rc; |
| 91 | |
| 92 | strcpy(chan->adapter.name, name); |
| 93 | chan->adapter.owner = THIS_MODULE; |
| 94 | chan->adapter.algo_data = &chan->algo; |
| 95 | chan->adapter.dev.parent = &chan->par->dev->dev; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 96 | chan->adapter.id = I2C_HW_B_I810; |
| 97 | chan->algo.setsda = i810i2c_setsda; |
| 98 | chan->algo.setscl = i810i2c_setscl; |
| 99 | chan->algo.getsda = i810i2c_getsda; |
| 100 | chan->algo.getscl = i810i2c_getscl; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 101 | chan->algo.udelay = 10; |
| 102 | chan->algo.mdelay = 10; |
| 103 | chan->algo.timeout = (HZ/2); |
| 104 | chan->algo.data = chan; |
| 105 | |
| 106 | i2c_set_adapdata(&chan->adapter, chan); |
| 107 | |
| 108 | /* Raise SCL and SDA */ |
| 109 | chan->algo.setsda(chan, 1); |
| 110 | chan->algo.setscl(chan, 1); |
| 111 | udelay(20); |
| 112 | |
| 113 | rc = i2c_bit_add_bus(&chan->adapter); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 114 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 115 | if (rc == 0) |
| 116 | dev_dbg(&chan->par->dev->dev, "I2C bus %s registered.\n",name); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 117 | else { |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 118 | dev_warn(&chan->par->dev->dev, "Failed to register I2C bus " |
| 119 | "%s.\n", name); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 120 | chan->par = NULL; |
| 121 | } |
| 122 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 123 | return rc; |
| 124 | } |
| 125 | |
| 126 | void i810_create_i2c_busses(struct i810fb_par *par) |
| 127 | { |
| 128 | par->chan[0].par = par; |
| 129 | par->chan[1].par = par; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 130 | par->chan[2].par = par; |
| 131 | |
| 132 | par->chan[0].ddc_base = GPIOA; |
| 133 | i810_setup_i2c_bus(&par->chan[0], "I810-DDC"); |
| 134 | par->chan[1].ddc_base = GPIOB; |
| 135 | i810_setup_i2c_bus(&par->chan[1], "I810-I2C"); |
| 136 | par->chan[2].ddc_base = GPIOC; |
| 137 | i810_setup_i2c_bus(&par->chan[2], "I810-GPIOC"); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 138 | } |
| 139 | |
| 140 | void i810_delete_i2c_busses(struct i810fb_par *par) |
| 141 | { |
| 142 | if (par->chan[0].par) |
| 143 | i2c_bit_del_bus(&par->chan[0].adapter); |
| 144 | par->chan[0].par = NULL; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 145 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 146 | if (par->chan[1].par) |
| 147 | i2c_bit_del_bus(&par->chan[1].adapter); |
| 148 | par->chan[1].par = NULL; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 149 | |
| 150 | if (par->chan[2].par) |
| 151 | i2c_bit_del_bus(&par->chan[2].adapter); |
| 152 | par->chan[2].par = NULL; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | static u8 *i810_do_probe_i2c_edid(struct i810fb_i2c_chan *chan) |
| 156 | { |
| 157 | u8 start = 0x0; |
| 158 | struct i2c_msg msgs[] = { |
| 159 | { |
| 160 | .addr = I810_DDC, |
| 161 | .len = 1, |
| 162 | .buf = &start, |
| 163 | }, { |
| 164 | .addr = I810_DDC, |
| 165 | .flags = I2C_M_RD, |
| 166 | .len = EDID_LENGTH, |
| 167 | }, |
| 168 | }; |
| 169 | u8 *buf; |
| 170 | |
| 171 | buf = kmalloc(EDID_LENGTH, GFP_KERNEL); |
| 172 | if (!buf) { |
| 173 | DPRINTK("i810-i2c: Failed to allocate memory\n"); |
| 174 | return NULL; |
| 175 | } |
| 176 | msgs[1].buf = buf; |
| 177 | |
| 178 | if (i2c_transfer(&chan->adapter, msgs, 2) == 2) { |
| 179 | DPRINTK("i810-i2c: I2C Transfer successful\n"); |
| 180 | return buf; |
| 181 | } |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 182 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 183 | DPRINTK("i810-i2c: Unable to read EDID block.\n"); |
| 184 | kfree(buf); |
| 185 | return NULL; |
| 186 | } |
| 187 | |
| 188 | int i810_probe_i2c_connector(struct fb_info *info, u8 **out_edid, int conn) |
| 189 | { |
| 190 | struct i810fb_par *par = info->par; |
| 191 | u8 *edid = NULL; |
| 192 | int i; |
| 193 | |
Manuel Lauss | 00d340b9 | 2006-02-01 03:06:54 -0800 | [diff] [blame] | 194 | DPRINTK("i810-i2c: Probe DDC%i Bus\n", conn+1); |
| 195 | if (conn < par->ddc_num) { |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 196 | for (i = 0; i < 3; i++) { |
| 197 | /* Do the real work */ |
Manuel Lauss | 00d340b9 | 2006-02-01 03:06:54 -0800 | [diff] [blame] | 198 | edid = i810_do_probe_i2c_edid(&par->chan[conn]); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 199 | if (edid) |
| 200 | break; |
| 201 | } |
| 202 | } else { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 203 | const u8 *e = fb_firmware_edid(info->device); |
| 204 | |
| 205 | if (e != NULL) { |
| 206 | DPRINTK("i810-i2c: Getting EDID from BIOS\n"); |
| 207 | edid = kmalloc(EDID_LENGTH, GFP_KERNEL); |
| 208 | if (edid) |
| 209 | memcpy(edid, e, EDID_LENGTH); |
| 210 | } |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | if (out_edid) |
| 214 | *out_edid = edid; |
| 215 | |
| 216 | return (edid) ? 0 : 1; |
| 217 | } |