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Arnd Bergmanna0ae9c72007-06-13 02:30:17 +10001config PPC64
2 bool "64-bit kernel"
3 default n
4 help
5 This option selects whether a 32-bit or a 64-bit kernel
6 will be built.
7
8menu "Processor support"
9choice
10 prompt "Processor Type"
11 depends on PPC32
12 default 6xx
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100013 help
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020014 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
John Rigbye177edc2008-01-29 04:28:53 +110017 embedded 512x/52xx/82xx/83xx/86xx counterparts.
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020018 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible
20 with the others.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100021
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020022 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100023
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020024config 6xx
John Rigbye177edc2008-01-29 04:28:53 +110025 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100026 select PPC_FPU
27
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100028config PPC_85xx
29 bool "Freescale 85xx"
30 select E500
31 select FSL_SOC
Kumar Gala3a831562008-01-28 10:24:30 -060032 select MPC85xx
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100033
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100034config PPC_8xx
35 bool "Freescale 8xx"
36 select FSL_SOC
37 select 8xx
Sylvain Munaut1088a202007-09-16 20:53:25 +100038 select PPC_LIB_RHEAP
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100039
40config 40x
41 bool "AMCC 40x"
42 select PPC_DCR_NATIVE
Benjamin Herrenschmidt9dae8af2007-12-21 15:39:26 +110043 select PPC_UDBG_16550
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100044
45config 44x
46 bool "AMCC 44x"
47 select PPC_DCR_NATIVE
Valentine Barshak1d5499b2007-10-18 22:55:13 +100048 select PPC_UDBG_16550
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100049
50config E200
51 bool "Freescale e200"
52
53endchoice
54
55config POWER4_ONLY
56 bool "Optimize for POWER4"
57 depends on PPC64
58 default n
59 ---help---
60 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
61 The resulting binary will not work on POWER3 or RS64 processors
62 when compiled with binutils 2.15 or later.
63
64config POWER3
65 bool
66 depends on PPC64
67 default y if !POWER4_ONLY
68
69config POWER4
70 depends on PPC64
71 def_bool y
72
Arnd Bergmann3164ccc2007-09-15 10:21:57 +100073config TUNE_CELL
74 bool "Optimize for Cell Broadband Engine"
75 depends on PPC64
76 help
77 Cause the compiler to optimize for the PPE of the Cell Broadband
78 Engine. This will make the code run considerably faster on Cell
79 but somewhat slower on other machines. This option only changes
80 the scheduling of instructions, not the selection of instructions
81 itself, so the resulting kernel will keep running on all other
82 machines. When building a kernel that is supposed to run only
83 on Cell, you should also select the POWER4_ONLY option.
84
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100085config 6xx
86 bool
87
88# this is temp to handle compat with arch=ppc
89config 8xx
90 bool
91
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100092config E500
Andy Fleming39aef682008-02-04 18:27:55 -060093 select FSL_EMB_PERFMON
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100094 bool
95
96config PPC_FPU
97 bool
98 default y if PPC64
99
100config 4xx
101 bool
102 depends on 40x || 44x
103 default y
104
105config BOOKE
106 bool
107 depends on E200 || E500 || 44x
108 default y
109
110config FSL_BOOKE
111 bool
112 depends on E200 || E500
113 default y
114
Andy Fleming39aef682008-02-04 18:27:55 -0600115config FSL_EMB_PERFMON
Andy Flemingad562c72008-03-07 17:59:03 -0600116 bool "Freescale Embedded Perfmon"
117 depends on E500 || PPC_83xx
118 help
119 This is the Performance Monitor support found on the e500 core
120 and some e300 cores (c3 and c4). Select this only if your
121 core supports the Embedded Performance Monitor APU
Andy Fleming39aef682008-02-04 18:27:55 -0600122
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000123config PTE_64BIT
124 bool
125 depends on 44x || E500
126 default y if 44x
127 default y if E500 && PHYS_64BIT
128
129config PHYS_64BIT
130 bool 'Large physical address support' if E500
131 depends on 44x || E500
132 select RESOURCES_64BIT
133 default y if 44x
134 ---help---
135 This option enables kernel support for larger than 32-bit physical
136 addresses. This features is not be available on all e500 cores.
137
138 If in doubt, say N here.
139
140config ALTIVEC
141 bool "AltiVec Support"
142 depends on CLASSIC32 || POWER4
143 ---help---
144 This option enables kernel support for the Altivec extensions to the
145 PowerPC processor. The kernel currently supports saving and restoring
146 altivec registers, and turning on the 'altivec enable' bit so user
147 processes can execute altivec instructions.
148
149 This option is only usefully if you have a processor that supports
150 altivec (G4, otherwise known as 74xx series), but does not have
151 any affect on a non-altivec cpu (it does, however add code to the
152 kernel).
153
154 If in doubt, say Y here.
155
156config SPE
157 bool "SPE Support"
158 depends on E200 || E500
159 default y
160 ---help---
161 This option enables kernel support for the Signal Processing
162 Extensions (SPE) to the PowerPC processor. The kernel currently
163 supports saving and restoring SPE registers, and turning on the
164 'spe enable' bit so user processes can execute SPE instructions.
165
166 This option is only useful if you have a processor that supports
167 SPE (e500, otherwise known as 85xx series), but does not have any
168 effect on a non-spe cpu (it does, however add code to the kernel).
169
170 If in doubt, say Y here.
171
172config PPC_STD_MMU
173 bool
174 depends on 6xx || POWER3 || POWER4 || PPC64
175 default y
176
177config PPC_STD_MMU_32
178 def_bool y
179 depends on PPC_STD_MMU && PPC32
180
181config PPC_MM_SLICES
182 bool
183 default y if HUGETLB_PAGE
184 default n
185
186config VIRT_CPU_ACCOUNTING
187 bool "Deterministic task and CPU time accounting"
188 depends on PPC64
189 default y
190 help
191 Select this option to enable more accurate task and CPU time
192 accounting. This is done by reading a CPU counter on each
193 kernel entry and exit and on transitions within the kernel
194 between system, softirq and hardirq state, so there is a
195 small performance impact. This also enables accounting of
196 stolen time on logically-partitioned systems running on
197 IBM POWER5-based machines.
198
199 If in doubt, say Y here.
200
201config SMP
202 depends on PPC_STD_MMU
203 bool "Symmetric multi-processing support"
204 ---help---
205 This enables support for systems with more than one CPU. If you have
206 a system with only one CPU, say N. If you have a system with more
207 than one CPU, say Y. Note that the kernel does not currently
208 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
209 since they have inadequate hardware support for multiprocessor
210 operation.
211
212 If you say N here, the kernel will run on single and multiprocessor
213 machines, but will use only one CPU of a multiprocessor machine. If
214 you say Y here, the kernel will run on single-processor machines.
215 On a single-processor machine, the kernel will run faster if you say
216 N here.
217
218 If you don't know what to do here, say N.
219
220config NR_CPUS
221 int "Maximum number of CPUs (2-128)"
222 range 2 128
223 depends on SMP
224 default "32" if PPC64
225 default "4"
226
227config NOT_COHERENT_CACHE
228 bool
John Rigbye177edc2008-01-29 04:28:53 +1100229 depends on 4xx || 8xx || E200 || PPC_MPC512x
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000230 default y
231
Robert P. J. Dayf8eb77d2007-07-18 08:21:29 +1000232config CHECK_CACHE_COHERENCY
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000233 bool
234
235endmenu