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Jarkko Nikula85d05fb2007-11-07 06:54:31 +02001/*
2 * linux/arch/arm/plat-omap/i2c.c
3 *
4 * Helper module for board specific I2C bus registration
5 *
6 * Copyright (C) 2007 Nokia Corporation.
7 *
8 * Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/platform_device.h>
28#include <linux/i2c.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/mux.h>
Jarkko Nikula85d05fb2007-11-07 06:54:31 +020030
31#define OMAP_I2C_SIZE 0x3f
32#define OMAP1_I2C_BASE 0xfffb3800
33#define OMAP2_I2C_BASE1 0x48070000
34#define OMAP2_I2C_BASE2 0x48072000
35#define OMAP2_I2C_BASE3 0x48060000
36
37static const char name[] = "i2c_omap";
38
39#define I2C_RESOURCE_BUILDER(base, irq) \
40 { \
41 .start = (base), \
42 .end = (base) + OMAP_I2C_SIZE, \
43 .flags = IORESOURCE_MEM, \
44 }, \
45 { \
46 .start = (irq), \
47 .flags = IORESOURCE_IRQ, \
48 },
49
50static struct resource i2c_resources[][2] = {
51 { I2C_RESOURCE_BUILDER(0, 0) },
52#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
53 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
54#endif
55#if defined(CONFIG_ARCH_OMAP34XX)
56 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
57#endif
58};
59
60#define I2C_DEV_BUILDER(bus_id, res, data) \
61 { \
62 .id = (bus_id), \
63 .name = name, \
64 .num_resources = ARRAY_SIZE(res), \
65 .resource = (res), \
66 .dev = { \
67 .platform_data = (data), \
68 }, \
69 }
70
71static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
72static struct platform_device omap_i2c_devices[] = {
73 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
74#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
75 I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
76#endif
77#if defined(CONFIG_ARCH_OMAP34XX)
78 I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
79#endif
80};
81
Jarkko Nikulaad636ad2008-12-10 17:36:52 -080082#if defined(CONFIG_ARCH_OMAP24XX)
83static const int omap24xx_pins[][2] = {
84 { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
85 { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
86};
87#else
88static const int omap24xx_pins[][2] = {};
89#endif
90#if defined(CONFIG_ARCH_OMAP34XX)
91static const int omap34xx_pins[][2] = {
92 { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
93 { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
94 { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
95};
96#else
97static const int omap34xx_pins[][2] = {};
98#endif
99
100static void __init omap_i2c_mux_pins(int bus)
Jarkko Nikula85d05fb2007-11-07 06:54:31 +0200101{
Jarkko Nikulaad636ad2008-12-10 17:36:52 -0800102 int scl, sda;
103
104 if (cpu_class_is_omap1()) {
105 scl = I2C_SCL;
106 sda = I2C_SDA;
107 } else if (cpu_is_omap24xx()) {
108 scl = omap24xx_pins[bus][0];
109 sda = omap24xx_pins[bus][1];
110 } else if (cpu_is_omap34xx()) {
111 scl = omap34xx_pins[bus][0];
112 sda = omap34xx_pins[bus][1];
113 } else {
114 return;
Jarkko Nikula85d05fb2007-11-07 06:54:31 +0200115 }
Jarkko Nikulaad636ad2008-12-10 17:36:52 -0800116
117 omap_cfg_reg(sda);
118 omap_cfg_reg(scl);
Jarkko Nikula85d05fb2007-11-07 06:54:31 +0200119}
120
121int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
122 struct i2c_board_info const *info,
123 unsigned len)
124{
125 int ports, err;
126 struct platform_device *pdev;
127 struct resource *res;
128 resource_size_t base, irq;
129
130 if (cpu_class_is_omap1())
131 ports = 1;
132 else if (cpu_is_omap24xx())
133 ports = 2;
134 else if (cpu_is_omap34xx())
135 ports = 3;
136
137 BUG_ON(bus_id < 1 || bus_id > ports);
138
139 if (info) {
140 err = i2c_register_board_info(bus_id, info, len);
141 if (err)
142 return err;
143 }
144
145 pdev = &omap_i2c_devices[bus_id - 1];
146 *(u32 *)pdev->dev.platform_data = clkrate;
147
148 if (bus_id == 1) {
149 res = pdev->resource;
150 if (cpu_class_is_omap1()) {
151 base = OMAP1_I2C_BASE;
152 irq = INT_I2C;
153 } else {
154 base = OMAP2_I2C_BASE1;
155 irq = INT_24XX_I2C1_IRQ;
156 }
157 res[0].start = base;
158 res[0].end = base + OMAP_I2C_SIZE;
159 res[1].start = irq;
160 }
161
Jarkko Nikulaad636ad2008-12-10 17:36:52 -0800162 omap_i2c_mux_pins(bus_id - 1);
Jarkko Nikula85d05fb2007-11-07 06:54:31 +0200163 return platform_device_register(pdev);
164}