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Greg Ungerer0e152d82011-06-20 15:49:09 +10001comment "Processor Type"
2
3config M68000
4 bool
5 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +10006 select CPU_HAS_NO_MULDIV64
Greg Ungerer7f73baf2011-10-18 15:49:19 +10007 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +10008 help
9 The Freescale (was Motorola) 68000 CPU is the first generation of
10 the well known M68K family of processors. The CPU core as well as
11 being available as a stand alone CPU was also used in many
12 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
13 a paging MMU.
14
15config MCPU32
16 bool
17 select CPU_HAS_NO_BITFIELDS
18 help
19 The Freescale (was then Motorola) CPU32 is a CPU core that is
20 based on the 68020 processor. For the most part it is used in
21 System-On-Chip parts, and does not contain a paging MMU.
22
23config COLDFIRE
24 bool
25 select GENERIC_GPIO
26 select ARCH_REQUIRE_GPIOLIB
27 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +100028 select CPU_HAS_NO_MULDIV64
Greg Ungerer7f73baf2011-10-18 15:49:19 +100029 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +100030 help
31 The Freescale ColdFire family of processors is a modern derivitive
32 of the 68000 processor family. They are mainly targeted at embedded
33 applications, and are all System-On-Chip (SOC) devices, as opposed
34 to stand alone CPUs. They implement a subset of the original 68000
35 processor instruction set.
36
37config M68020
38 bool "68020 support"
39 depends on MMU
Greg Ungerer5717a022011-10-19 16:27:30 +100040 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100041 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100042 help
43 If you anticipate running this kernel on a computer with a MC68020
44 processor, say Y. Otherwise, say N. Note that the 68020 requires a
45 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
46 Sun 3, which provides its own version.
47
48config M68030
49 bool "68030 support"
50 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100051 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100052 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100053 help
54 If you anticipate running this kernel on a computer with a MC68030
55 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
56 work, as it does not include an MMU (Memory Management Unit).
57
58config M68040
59 bool "68040 support"
60 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100061 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100062 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100063 help
64 If you anticipate running this kernel on a computer with a MC68LC040
65 or MC68040 processor, say Y. Otherwise, say N. Note that an
66 MC68EC040 will not work, as it does not include an MMU (Memory
67 Management Unit).
68
69config M68060
70 bool "68060 support"
71 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100072 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100073 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100074 help
75 If you anticipate running this kernel on a computer with a MC68060
76 processor, say Y. Otherwise, say N.
77
78config M68328
79 bool "MC68328"
80 depends on !MMU
81 select M68000
82 help
83 Motorola 68328 processor support.
84
85config M68EZ328
86 bool "MC68EZ328"
87 depends on !MMU
88 select M68000
89 help
90 Motorola 68EX328 processor support.
91
92config M68VZ328
93 bool "MC68VZ328"
94 depends on !MMU
95 select M68000
96 help
97 Motorola 68VZ328 processor support.
98
99config M68360
100 bool "MC68360"
101 depends on !MMU
102 select MCPU32
103 help
104 Motorola 68360 processor support.
105
106config M5206
107 bool "MCF5206"
108 depends on !MMU
109 select COLDFIRE
110 select COLDFIRE_SW_A7
111 select HAVE_MBAR
112 help
113 Motorola ColdFire 5206 processor support.
114
115config M5206e
116 bool "MCF5206e"
117 depends on !MMU
118 select COLDFIRE
119 select COLDFIRE_SW_A7
120 select HAVE_MBAR
121 help
122 Motorola ColdFire 5206e processor support.
123
124config M520x
125 bool "MCF520x"
126 depends on !MMU
127 select COLDFIRE
128 select GENERIC_CLOCKEVENTS
129 select HAVE_CACHE_SPLIT
130 help
131 Freescale Coldfire 5207/5208 processor support.
132
133config M523x
134 bool "MCF523x"
135 depends on !MMU
136 select COLDFIRE
137 select GENERIC_CLOCKEVENTS
138 select HAVE_CACHE_SPLIT
139 select HAVE_IPSBAR
140 help
141 Freescale Coldfire 5230/1/2/4/5 processor support
142
143config M5249
144 bool "MCF5249"
145 depends on !MMU
146 select COLDFIRE
147 select COLDFIRE_SW_A7
148 select HAVE_MBAR
149 help
150 Motorola ColdFire 5249 processor support.
151
152config M527x
153 bool
154
155config M5271
156 bool "MCF5271"
157 depends on !MMU
158 select COLDFIRE
159 select M527x
160 select HAVE_CACHE_SPLIT
161 select HAVE_IPSBAR
162 select GENERIC_CLOCKEVENTS
163 help
164 Freescale (Motorola) ColdFire 5270/5271 processor support.
165
166config M5272
167 bool "MCF5272"
168 depends on !MMU
169 select COLDFIRE
170 select COLDFIRE_SW_A7
171 select HAVE_MBAR
172 help
173 Motorola ColdFire 5272 processor support.
174
175config M5275
176 bool "MCF5275"
177 depends on !MMU
178 select COLDFIRE
179 select M527x
180 select HAVE_CACHE_SPLIT
181 select HAVE_IPSBAR
182 select GENERIC_CLOCKEVENTS
183 help
184 Freescale (Motorola) ColdFire 5274/5275 processor support.
185
186config M528x
187 bool "MCF528x"
188 depends on !MMU
189 select COLDFIRE
190 select GENERIC_CLOCKEVENTS
191 select HAVE_CACHE_SPLIT
192 select HAVE_IPSBAR
193 help
194 Motorola ColdFire 5280/5282 processor support.
195
196config M5307
197 bool "MCF5307"
198 depends on !MMU
199 select COLDFIRE
200 select COLDFIRE_SW_A7
201 select HAVE_CACHE_CB
202 select HAVE_MBAR
203 help
204 Motorola ColdFire 5307 processor support.
205
206config M532x
207 bool "MCF532x"
208 depends on !MMU
209 select COLDFIRE
210 select HAVE_CACHE_CB
211 help
212 Freescale (Motorola) ColdFire 532x processor support.
213
214config M5407
215 bool "MCF5407"
216 depends on !MMU
217 select COLDFIRE
218 select COLDFIRE_SW_A7
219 select HAVE_CACHE_CB
220 select HAVE_MBAR
221 help
222 Motorola ColdFire 5407 processor support.
223
224config M54xx
225 bool
226
227config M547x
228 bool "MCF547x"
229 depends on !MMU
230 select COLDFIRE
231 select M54xx
232 select HAVE_CACHE_CB
233 select HAVE_MBAR
234 help
235 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
236
237config M548x
238 bool "MCF548x"
239 depends on !MMU
240 select COLDFIRE
241 select M54xx
242 select HAVE_CACHE_CB
243 select HAVE_MBAR
244 help
245 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
246
247
248comment "Processor Specific Options"
249
250config M68KFPU_EMU
251 bool "Math emulation support (EXPERIMENTAL)"
252 depends on MMU
253 depends on EXPERIMENTAL
254 help
255 At some point in the future, this will cause floating-point math
256 instructions to be emulated by the kernel on machines that lack a
257 floating-point math coprocessor. Thrill-seekers and chronically
258 sleep-deprived psychotic hacker types can say Y now, everyone else
259 should probably wait a while.
260
261config M68KFPU_EMU_EXTRAPREC
262 bool "Math emulation extra precision"
263 depends on M68KFPU_EMU
264 help
265 The fpu uses normally a few bit more during calculations for
266 correct rounding, the emulator can (often) do the same but this
267 extra calculation can cost quite some time, so you can disable
268 it here. The emulator will then "only" calculate with a 64 bit
269 mantissa and round slightly incorrect, what is more than enough
270 for normal usage.
271
272config M68KFPU_EMU_ONLY
273 bool "Math emulation only kernel"
274 depends on M68KFPU_EMU
275 help
276 This option prevents any floating-point instructions from being
277 compiled into the kernel, thereby the kernel doesn't save any
278 floating point context anymore during task switches, so this
279 kernel will only be usable on machines without a floating-point
280 math coprocessor. This makes the kernel a bit faster as no tests
281 needs to be executed whether a floating-point instruction in the
282 kernel should be executed or not.
283
284config ADVANCED
285 bool "Advanced configuration options"
286 depends on MMU
287 ---help---
288 This gives you access to some advanced options for the CPU. The
289 defaults should be fine for most users, but these options may make
290 it possible for you to improve performance somewhat if you know what
291 you are doing.
292
293 Note that the answer to this question won't directly affect the
294 kernel: saying N will just cause the configurator to skip all
295 the questions about these options.
296
297 Most users should say N to this question.
298
299config RMW_INSNS
300 bool "Use read-modify-write instructions"
301 depends on ADVANCED
302 ---help---
303 This allows to use certain instructions that work with indivisible
304 read-modify-write bus cycles. While this is faster than the
305 workaround of disabling interrupts, it can conflict with DMA
306 ( = direct memory access) on many Amiga systems, and it is also said
307 to destabilize other machines. It is very likely that this will
308 cause serious problems on any Amiga or Atari Medusa if set. The only
309 configuration where it should work are 68030-based Ataris, where it
310 apparently improves performance. But you've been warned! Unless you
311 really know what you are doing, say N. Try Y only if you're quite
312 adventurous.
313
314config SINGLE_MEMORY_CHUNK
315 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
316 depends on MMU
317 default y if SUN3
318 select NEED_MULTIPLE_NODES
319 help
320 Ignore all but the first contiguous chunk of physical memory for VM
321 purposes. This will save a few bytes kernel size and may speed up
322 some operations. Say N if not sure.
323
324config ARCH_DISCONTIGMEM_ENABLE
325 def_bool MMU && !SINGLE_MEMORY_CHUNK
326
327config 060_WRITETHROUGH
328 bool "Use write-through caching for 68060 supervisor accesses"
329 depends on ADVANCED && M68060
330 ---help---
331 The 68060 generally uses copyback caching of recently accessed data.
332 Copyback caching means that memory writes will be held in an on-chip
333 cache and only written back to memory some time later. Saying Y
334 here will force supervisor (kernel) accesses to use writethrough
335 caching. Writethrough caching means that data is written to memory
336 straight away, so that cache and memory data always agree.
337 Writethrough caching is less efficient, but is needed for some
338 drivers on 68060 based systems where the 68060 bus snooping signal
339 is hardwired on. The 53c710 SCSI driver is known to suffer from
340 this problem.
341
342config M68K_L2_CACHE
343 bool
344 depends on MAC
345 default y
346
347config NODES_SHIFT
348 int
349 default "3"
350 depends on !SINGLE_MEMORY_CHUNK
351
352config FPU
353 bool
354
355config COLDFIRE_SW_A7
356 bool
357
358config HAVE_CACHE_SPLIT
359 bool
360
361config HAVE_CACHE_CB
362 bool
363
364config HAVE_MBAR
365 bool
366
367config HAVE_IPSBAR
368 bool
369
370config CLOCK_SET
371 bool "Enable setting the CPU clock frequency"
372 depends on COLDFIRE
373 default n
374 help
375 On some CPU's you do not need to know what the core CPU clock
376 frequency is. On these you can disable clock setting. On some
377 traditional 68K parts, and on all ColdFire parts you need to set
378 the appropriate CPU clock frequency. On these devices many of the
379 onboard peripherals derive their timing from the master CPU clock
380 frequency.
381
382config CLOCK_FREQ
383 int "Set the core clock frequency"
384 default "66666666"
385 depends on CLOCK_SET
386 help
387 Define the CPU clock frequency in use. This is the core clock
388 frequency, it may or may not be the same as the external clock
389 crystal fitted to your board. Some processors have an internal
390 PLL and can have their frequency programmed at run time, others
391 use internal dividers. In general the kernel won't setup a PLL
392 if it is fitted (there are some exceptions). This value will be
393 specific to the exact CPU that you are using.
394
395config OLDMASK
396 bool "Old mask 5307 (1H55J) silicon"
397 depends on M5307
398 help
399 Build support for the older revision ColdFire 5307 silicon.
400 Specifically this is the 1H55J mask revision.
401
402if HAVE_CACHE_SPLIT
403choice
404 prompt "Split Cache Configuration"
405 default CACHE_I
406
407config CACHE_I
408 bool "Instruction"
409 help
410 Use all of the ColdFire CPU cache memory as an instruction cache.
411
412config CACHE_D
413 bool "Data"
414 help
415 Use all of the ColdFire CPU cache memory as a data cache.
416
417config CACHE_BOTH
418 bool "Both"
419 help
420 Split the ColdFire CPU cache, and use half as an instruction cache
421 and half as a data cache.
422endchoice
423endif
424
425if HAVE_CACHE_CB
426choice
427 prompt "Data cache mode"
428 default CACHE_WRITETHRU
429
430config CACHE_WRITETHRU
431 bool "Write-through"
432 help
433 The ColdFire CPU cache is set into Write-through mode.
434
435config CACHE_COPYBACK
436 bool "Copy-back"
437 help
438 The ColdFire CPU cache is set into Copy-back mode.
439endchoice
440endif
441