Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 1 | /* |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 2 | * MTD SPI driver for ST M25Pxx (and similar) serial flash chips |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 3 | * |
| 4 | * Author: Mike Lavender, mike@steroidmicros.com |
| 5 | * |
| 6 | * Copyright (c) 2005, Intec Automation Inc. |
| 7 | * |
| 8 | * Some parts are based on lart.c by Abraham Van Der Merwe |
| 9 | * |
| 10 | * Cleaned up and generalized based on mtd_dataflash.c |
| 11 | * |
| 12 | * This code is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License version 2 as |
| 14 | * published by the Free Software Foundation. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #include <linux/init.h> |
Anton Vorontsov | 9d2c4f3 | 2010-06-22 20:57:42 +0400 | [diff] [blame] | 19 | #include <linux/err.h> |
| 20 | #include <linux/errno.h> |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 21 | #include <linux/module.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/interrupt.h> |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 24 | #include <linux/mutex.h> |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 25 | #include <linux/math64.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 26 | #include <linux/slab.h> |
Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 27 | #include <linux/sched.h> |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 28 | #include <linux/mod_devicetable.h> |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 29 | |
Kevin Cernekee | aa08465 | 2011-05-08 10:48:00 -0700 | [diff] [blame] | 30 | #include <linux/mtd/cfi.h> |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 31 | #include <linux/mtd/mtd.h> |
| 32 | #include <linux/mtd/partitions.h> |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 33 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 34 | #include <linux/spi/spi.h> |
| 35 | #include <linux/spi/flash.h> |
| 36 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 37 | /* Flash opcodes. */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 38 | #define OPCODE_WREN 0x06 /* Write enable */ |
| 39 | #define OPCODE_RDSR 0x05 /* Read status register */ |
Michael Hennerich | 7228982 | 2008-07-03 23:54:42 -0700 | [diff] [blame] | 40 | #define OPCODE_WRSR 0x01 /* Write status register 1 byte */ |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 41 | #define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 42 | #define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */ |
| 43 | #define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */ |
Chen Gong | 7854643 | 2008-11-26 10:23:57 +0000 | [diff] [blame] | 44 | #define OPCODE_BE_4K 0x20 /* Erase 4KiB block */ |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 45 | #define OPCODE_BE_32K 0x52 /* Erase 32KiB block */ |
Chen Gong | 7854643 | 2008-11-26 10:23:57 +0000 | [diff] [blame] | 46 | #define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 47 | #define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 48 | #define OPCODE_RDID 0x9f /* Read JEDEC ID */ |
| 49 | |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 50 | /* Used for SST flashes only. */ |
| 51 | #define OPCODE_BP 0x02 /* Byte program */ |
| 52 | #define OPCODE_WRDI 0x04 /* Write disable */ |
| 53 | #define OPCODE_AAI_WP 0xad /* Auto address increment word program */ |
| 54 | |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 55 | /* Used for Macronix flashes only. */ |
| 56 | #define OPCODE_EN4B 0xb7 /* Enter 4-byte mode */ |
| 57 | #define OPCODE_EX4B 0xe9 /* Exit 4-byte mode */ |
| 58 | |
Kevin Cernekee | baa9ae3 | 2011-05-08 10:48:01 -0700 | [diff] [blame] | 59 | /* Used for Spansion flashes only. */ |
| 60 | #define OPCODE_BRWR 0x17 /* Bank register write */ |
| 61 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 62 | /* Status Register bits. */ |
| 63 | #define SR_WIP 1 /* Write in progress */ |
| 64 | #define SR_WEL 2 /* Write enable latch */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 65 | /* meaning of other SR_* bits may differ between vendors */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 66 | #define SR_BP0 4 /* Block protect 0 */ |
| 67 | #define SR_BP1 8 /* Block protect 1 */ |
| 68 | #define SR_BP2 0x10 /* Block protect 2 */ |
| 69 | #define SR_SRWD 0x80 /* SR write protect */ |
| 70 | |
| 71 | /* Define max times to check status register before we give up. */ |
Steven A. Falco | 89bb871 | 2009-06-26 12:42:47 -0400 | [diff] [blame] | 72 | #define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */ |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 73 | #define MAX_CMD_SIZE 5 |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 74 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 75 | #ifdef CONFIG_M25PXX_USE_FAST_READ |
| 76 | #define OPCODE_READ OPCODE_FAST_READ |
| 77 | #define FAST_READ_DUMMY_BYTE 1 |
| 78 | #else |
| 79 | #define OPCODE_READ OPCODE_NORM_READ |
| 80 | #define FAST_READ_DUMMY_BYTE 0 |
| 81 | #endif |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 82 | |
Kevin Cernekee | aa08465 | 2011-05-08 10:48:00 -0700 | [diff] [blame] | 83 | #define JEDEC_MFR(_jedec_id) ((_jedec_id) >> 16) |
| 84 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 85 | /****************************************************************************/ |
| 86 | |
| 87 | struct m25p { |
| 88 | struct spi_device *spi; |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 89 | struct mutex lock; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 90 | struct mtd_info mtd; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 91 | u16 page_size; |
| 92 | u16 addr_width; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 93 | u8 erase_opcode; |
Johannes Stezenbach | 61c3506 | 2009-10-28 14:21:37 +0100 | [diff] [blame] | 94 | u8 *command; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) |
| 98 | { |
| 99 | return container_of(mtd, struct m25p, mtd); |
| 100 | } |
| 101 | |
| 102 | /****************************************************************************/ |
| 103 | |
| 104 | /* |
| 105 | * Internal helper functions |
| 106 | */ |
| 107 | |
| 108 | /* |
| 109 | * Read the status register, returning its value in the location |
| 110 | * Return the status register value. |
| 111 | * Returns negative if error occurred. |
| 112 | */ |
| 113 | static int read_sr(struct m25p *flash) |
| 114 | { |
| 115 | ssize_t retval; |
| 116 | u8 code = OPCODE_RDSR; |
| 117 | u8 val; |
| 118 | |
| 119 | retval = spi_write_then_read(flash->spi, &code, 1, &val, 1); |
| 120 | |
| 121 | if (retval < 0) { |
| 122 | dev_err(&flash->spi->dev, "error %d reading SR\n", |
| 123 | (int) retval); |
| 124 | return retval; |
| 125 | } |
| 126 | |
| 127 | return val; |
| 128 | } |
| 129 | |
Michael Hennerich | 7228982 | 2008-07-03 23:54:42 -0700 | [diff] [blame] | 130 | /* |
| 131 | * Write status register 1 byte |
| 132 | * Returns negative if error occurred. |
| 133 | */ |
| 134 | static int write_sr(struct m25p *flash, u8 val) |
| 135 | { |
| 136 | flash->command[0] = OPCODE_WRSR; |
| 137 | flash->command[1] = val; |
| 138 | |
| 139 | return spi_write(flash->spi, flash->command, 2); |
| 140 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 141 | |
| 142 | /* |
| 143 | * Set write enable latch with Write Enable command. |
| 144 | * Returns negative if error occurred. |
| 145 | */ |
| 146 | static inline int write_enable(struct m25p *flash) |
| 147 | { |
| 148 | u8 code = OPCODE_WREN; |
| 149 | |
David Woodhouse | 8a1a627 | 2008-10-20 09:26:16 +0100 | [diff] [blame] | 150 | return spi_write_then_read(flash->spi, &code, 1, NULL, 0); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 151 | } |
| 152 | |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 153 | /* |
| 154 | * Send write disble instruction to the chip. |
| 155 | */ |
| 156 | static inline int write_disable(struct m25p *flash) |
| 157 | { |
| 158 | u8 code = OPCODE_WRDI; |
| 159 | |
| 160 | return spi_write_then_read(flash->spi, &code, 1, NULL, 0); |
| 161 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 162 | |
| 163 | /* |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 164 | * Enable/disable 4-byte addressing mode. |
| 165 | */ |
Kevin Cernekee | baa9ae3 | 2011-05-08 10:48:01 -0700 | [diff] [blame] | 166 | static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable) |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 167 | { |
Kevin Cernekee | baa9ae3 | 2011-05-08 10:48:01 -0700 | [diff] [blame] | 168 | switch (JEDEC_MFR(jedec_id)) { |
| 169 | case CFI_MFR_MACRONIX: |
| 170 | flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B; |
| 171 | return spi_write(flash->spi, flash->command, 1); |
| 172 | default: |
| 173 | /* Spansion style */ |
| 174 | flash->command[0] = OPCODE_BRWR; |
| 175 | flash->command[1] = enable << 7; |
| 176 | return spi_write(flash->spi, flash->command, 2); |
| 177 | } |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 178 | } |
| 179 | |
| 180 | /* |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 181 | * Service routine to read status register until ready, or timeout occurs. |
| 182 | * Returns non-zero if error. |
| 183 | */ |
| 184 | static int wait_till_ready(struct m25p *flash) |
| 185 | { |
Peter Horton | cd1a6de | 2009-05-08 13:51:53 +0100 | [diff] [blame] | 186 | unsigned long deadline; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 187 | int sr; |
| 188 | |
Peter Horton | cd1a6de | 2009-05-08 13:51:53 +0100 | [diff] [blame] | 189 | deadline = jiffies + MAX_READY_WAIT_JIFFIES; |
| 190 | |
| 191 | do { |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 192 | if ((sr = read_sr(flash)) < 0) |
| 193 | break; |
| 194 | else if (!(sr & SR_WIP)) |
| 195 | return 0; |
| 196 | |
Peter Horton | cd1a6de | 2009-05-08 13:51:53 +0100 | [diff] [blame] | 197 | cond_resched(); |
| 198 | |
| 199 | } while (!time_after_eq(jiffies, deadline)); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 200 | |
| 201 | return 1; |
| 202 | } |
| 203 | |
Chen Gong | faff375 | 2008-08-11 16:59:13 +0800 | [diff] [blame] | 204 | /* |
| 205 | * Erase the whole flash memory |
| 206 | * |
| 207 | * Returns 0 if successful, non-zero otherwise. |
| 208 | */ |
Chen Gong | 7854643 | 2008-11-26 10:23:57 +0000 | [diff] [blame] | 209 | static int erase_chip(struct m25p *flash) |
Chen Gong | faff375 | 2008-08-11 16:59:13 +0800 | [diff] [blame] | 210 | { |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 211 | pr_debug("%s: %s %lldKiB\n", dev_name(&flash->spi->dev), __func__, |
| 212 | (long long)(flash->mtd.size >> 10)); |
Chen Gong | faff375 | 2008-08-11 16:59:13 +0800 | [diff] [blame] | 213 | |
| 214 | /* Wait until finished previous write command. */ |
| 215 | if (wait_till_ready(flash)) |
| 216 | return 1; |
| 217 | |
| 218 | /* Send write enable, then erase commands. */ |
| 219 | write_enable(flash); |
| 220 | |
| 221 | /* Set up command buffer. */ |
Chen Gong | 7854643 | 2008-11-26 10:23:57 +0000 | [diff] [blame] | 222 | flash->command[0] = OPCODE_CHIP_ERASE; |
Chen Gong | faff375 | 2008-08-11 16:59:13 +0800 | [diff] [blame] | 223 | |
| 224 | spi_write(flash->spi, flash->command, 1); |
| 225 | |
| 226 | return 0; |
| 227 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 228 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 229 | static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd) |
| 230 | { |
| 231 | /* opcode is in cmd[0] */ |
| 232 | cmd[1] = addr >> (flash->addr_width * 8 - 8); |
| 233 | cmd[2] = addr >> (flash->addr_width * 8 - 16); |
| 234 | cmd[3] = addr >> (flash->addr_width * 8 - 24); |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 235 | cmd[4] = addr >> (flash->addr_width * 8 - 32); |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | static int m25p_cmdsz(struct m25p *flash) |
| 239 | { |
| 240 | return 1 + flash->addr_width; |
| 241 | } |
| 242 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 243 | /* |
| 244 | * Erase one sector of flash memory at offset ``offset'' which is any |
| 245 | * address within the sector which should be erased. |
| 246 | * |
| 247 | * Returns 0 if successful, non-zero otherwise. |
| 248 | */ |
| 249 | static int erase_sector(struct m25p *flash, u32 offset) |
| 250 | { |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 251 | pr_debug("%s: %s %dKiB at 0x%08x\n", dev_name(&flash->spi->dev), |
| 252 | __func__, flash->mtd.erasesize / 1024, offset); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 253 | |
| 254 | /* Wait until finished previous write command. */ |
| 255 | if (wait_till_ready(flash)) |
| 256 | return 1; |
| 257 | |
| 258 | /* Send write enable, then erase commands. */ |
| 259 | write_enable(flash); |
| 260 | |
| 261 | /* Set up command buffer. */ |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 262 | flash->command[0] = flash->erase_opcode; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 263 | m25p_addr2cmd(flash, offset, flash->command); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 264 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 265 | spi_write(flash->spi, flash->command, m25p_cmdsz(flash)); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | |
| 270 | /****************************************************************************/ |
| 271 | |
| 272 | /* |
| 273 | * MTD implementation |
| 274 | */ |
| 275 | |
| 276 | /* |
| 277 | * Erase an address range on the flash chip. The address range may extend |
| 278 | * one or more erase sectors. Return an error is there is a problem erasing. |
| 279 | */ |
| 280 | static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr) |
| 281 | { |
| 282 | struct m25p *flash = mtd_to_m25p(mtd); |
| 283 | u32 addr,len; |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 284 | uint32_t rem; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 285 | |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 286 | pr_debug("%s: %s at 0x%llx, len %lld\n", dev_name(&flash->spi->dev), |
| 287 | __func__, (long long)instr->addr, |
| 288 | (long long)instr->len); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 289 | |
| 290 | /* sanity checks */ |
| 291 | if (instr->addr + instr->len > flash->mtd.size) |
| 292 | return -EINVAL; |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 293 | div_u64_rem(instr->len, mtd->erasesize, &rem); |
| 294 | if (rem) |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 295 | return -EINVAL; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 296 | |
| 297 | addr = instr->addr; |
| 298 | len = instr->len; |
| 299 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 300 | mutex_lock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 301 | |
Chen Gong | 7854643 | 2008-11-26 10:23:57 +0000 | [diff] [blame] | 302 | /* whole-chip erase? */ |
Steven A. Falco | 3f33b0a | 2009-04-27 17:10:10 -0400 | [diff] [blame] | 303 | if (len == flash->mtd.size) { |
| 304 | if (erase_chip(flash)) { |
| 305 | instr->state = MTD_ERASE_FAILED; |
| 306 | mutex_unlock(&flash->lock); |
| 307 | return -EIO; |
| 308 | } |
Chen Gong | 7854643 | 2008-11-26 10:23:57 +0000 | [diff] [blame] | 309 | |
| 310 | /* REVISIT in some cases we could speed up erasing large regions |
| 311 | * by using OPCODE_SE instead of OPCODE_BE_4K. We may have set up |
| 312 | * to use "small sector erase", but that's not always optimal. |
| 313 | */ |
| 314 | |
| 315 | /* "sector"-at-a-time erase */ |
Chen Gong | faff375 | 2008-08-11 16:59:13 +0800 | [diff] [blame] | 316 | } else { |
| 317 | while (len) { |
| 318 | if (erase_sector(flash, addr)) { |
| 319 | instr->state = MTD_ERASE_FAILED; |
| 320 | mutex_unlock(&flash->lock); |
| 321 | return -EIO; |
| 322 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 323 | |
Chen Gong | faff375 | 2008-08-11 16:59:13 +0800 | [diff] [blame] | 324 | addr += mtd->erasesize; |
| 325 | len -= mtd->erasesize; |
| 326 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 327 | } |
| 328 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 329 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 330 | |
| 331 | instr->state = MTD_ERASE_DONE; |
| 332 | mtd_erase_callback(instr); |
| 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | |
| 337 | /* |
| 338 | * Read an address range from the flash chip. The address range |
| 339 | * may be any size provided it is within the physical boundaries. |
| 340 | */ |
| 341 | static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 342 | size_t *retlen, u_char *buf) |
| 343 | { |
| 344 | struct m25p *flash = mtd_to_m25p(mtd); |
| 345 | struct spi_transfer t[2]; |
| 346 | struct spi_message m; |
| 347 | |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 348 | pr_debug("%s: %s from 0x%08x, len %zd\n", dev_name(&flash->spi->dev), |
| 349 | __func__, (u32)from, len); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 350 | |
| 351 | /* sanity checks */ |
| 352 | if (!len) |
| 353 | return 0; |
| 354 | |
| 355 | if (from + len > flash->mtd.size) |
| 356 | return -EINVAL; |
| 357 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 358 | spi_message_init(&m); |
| 359 | memset(t, 0, (sizeof t)); |
| 360 | |
Bryan Wu | 2230b76 | 2008-04-25 12:07:32 +0800 | [diff] [blame] | 361 | /* NOTE: |
| 362 | * OPCODE_FAST_READ (if available) is faster. |
| 363 | * Should add 1 byte DUMMY_BYTE. |
| 364 | */ |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 365 | t[0].tx_buf = flash->command; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 366 | t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 367 | spi_message_add_tail(&t[0], &m); |
| 368 | |
| 369 | t[1].rx_buf = buf; |
| 370 | t[1].len = len; |
| 371 | spi_message_add_tail(&t[1], &m); |
| 372 | |
| 373 | /* Byte count starts at zero. */ |
Dan Carpenter | b06cd21 | 2010-08-12 09:53:52 +0200 | [diff] [blame] | 374 | *retlen = 0; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 375 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 376 | mutex_lock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 377 | |
| 378 | /* Wait till previous write/erase is done. */ |
| 379 | if (wait_till_ready(flash)) { |
| 380 | /* REVISIT status return?? */ |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 381 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 382 | return 1; |
| 383 | } |
| 384 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 385 | /* FIXME switch to OPCODE_FAST_READ. It's required for higher |
| 386 | * clocks; and at this writing, every chip this driver handles |
| 387 | * supports that opcode. |
| 388 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 389 | |
| 390 | /* Set up the write data buffer. */ |
| 391 | flash->command[0] = OPCODE_READ; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 392 | m25p_addr2cmd(flash, from, flash->command); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 393 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 394 | spi_sync(flash->spi, &m); |
| 395 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 396 | *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 397 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 398 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 399 | |
| 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | /* |
| 404 | * Write an address range to the flash chip. Data must be written in |
| 405 | * FLASH_PAGESIZE chunks. The address range may be any size provided |
| 406 | * it is within the physical boundaries. |
| 407 | */ |
| 408 | static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 409 | size_t *retlen, const u_char *buf) |
| 410 | { |
| 411 | struct m25p *flash = mtd_to_m25p(mtd); |
| 412 | u32 page_offset, page_size; |
| 413 | struct spi_transfer t[2]; |
| 414 | struct spi_message m; |
| 415 | |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 416 | pr_debug("%s: %s to 0x%08x, len %zd\n", dev_name(&flash->spi->dev), |
| 417 | __func__, (u32)to, len); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 418 | |
Dan Carpenter | b06cd21 | 2010-08-12 09:53:52 +0200 | [diff] [blame] | 419 | *retlen = 0; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 420 | |
| 421 | /* sanity checks */ |
| 422 | if (!len) |
| 423 | return(0); |
| 424 | |
| 425 | if (to + len > flash->mtd.size) |
| 426 | return -EINVAL; |
| 427 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 428 | spi_message_init(&m); |
| 429 | memset(t, 0, (sizeof t)); |
| 430 | |
| 431 | t[0].tx_buf = flash->command; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 432 | t[0].len = m25p_cmdsz(flash); |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 433 | spi_message_add_tail(&t[0], &m); |
| 434 | |
| 435 | t[1].tx_buf = buf; |
| 436 | spi_message_add_tail(&t[1], &m); |
| 437 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 438 | mutex_lock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 439 | |
| 440 | /* Wait until finished previous write command. */ |
Chen Gong | bc01886 | 2008-06-05 21:50:04 +0800 | [diff] [blame] | 441 | if (wait_till_ready(flash)) { |
| 442 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 443 | return 1; |
Chen Gong | bc01886 | 2008-06-05 21:50:04 +0800 | [diff] [blame] | 444 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 445 | |
| 446 | write_enable(flash); |
| 447 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 448 | /* Set up the opcode in the write buffer. */ |
| 449 | flash->command[0] = OPCODE_PP; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 450 | m25p_addr2cmd(flash, to, flash->command); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 451 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 452 | page_offset = to & (flash->page_size - 1); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 453 | |
| 454 | /* do all the bytes fit onto one page? */ |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 455 | if (page_offset + len <= flash->page_size) { |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 456 | t[1].len = len; |
| 457 | |
| 458 | spi_sync(flash->spi, &m); |
| 459 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 460 | *retlen = m.actual_length - m25p_cmdsz(flash); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 461 | } else { |
| 462 | u32 i; |
| 463 | |
| 464 | /* the size of data remaining on the first page */ |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 465 | page_size = flash->page_size - page_offset; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 466 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 467 | t[1].len = page_size; |
| 468 | spi_sync(flash->spi, &m); |
| 469 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 470 | *retlen = m.actual_length - m25p_cmdsz(flash); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 471 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 472 | /* write everything in flash->page_size chunks */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 473 | for (i = page_size; i < len; i += page_size) { |
| 474 | page_size = len - i; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 475 | if (page_size > flash->page_size) |
| 476 | page_size = flash->page_size; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 477 | |
| 478 | /* write the next page to flash */ |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 479 | m25p_addr2cmd(flash, to + i, flash->command); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 480 | |
| 481 | t[1].tx_buf = buf + i; |
| 482 | t[1].len = page_size; |
| 483 | |
| 484 | wait_till_ready(flash); |
| 485 | |
| 486 | write_enable(flash); |
| 487 | |
| 488 | spi_sync(flash->spi, &m); |
| 489 | |
Dan Carpenter | b06cd21 | 2010-08-12 09:53:52 +0200 | [diff] [blame] | 490 | *retlen += m.actual_length - m25p_cmdsz(flash); |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 491 | } |
| 492 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 493 | |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 494 | mutex_unlock(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 495 | |
| 496 | return 0; |
| 497 | } |
| 498 | |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 499 | static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 500 | size_t *retlen, const u_char *buf) |
| 501 | { |
| 502 | struct m25p *flash = mtd_to_m25p(mtd); |
| 503 | struct spi_transfer t[2]; |
| 504 | struct spi_message m; |
| 505 | size_t actual; |
| 506 | int cmd_sz, ret; |
| 507 | |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 508 | pr_debug("%s: %s to 0x%08x, len %zd\n", dev_name(&flash->spi->dev), |
| 509 | __func__, (u32)to, len); |
Nicolas Ferre | dcf1246 | 2010-12-15 12:59:32 +0100 | [diff] [blame] | 510 | |
Dan Carpenter | b06cd21 | 2010-08-12 09:53:52 +0200 | [diff] [blame] | 511 | *retlen = 0; |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 512 | |
| 513 | /* sanity checks */ |
| 514 | if (!len) |
| 515 | return 0; |
| 516 | |
| 517 | if (to + len > flash->mtd.size) |
| 518 | return -EINVAL; |
| 519 | |
| 520 | spi_message_init(&m); |
| 521 | memset(t, 0, (sizeof t)); |
| 522 | |
| 523 | t[0].tx_buf = flash->command; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 524 | t[0].len = m25p_cmdsz(flash); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 525 | spi_message_add_tail(&t[0], &m); |
| 526 | |
| 527 | t[1].tx_buf = buf; |
| 528 | spi_message_add_tail(&t[1], &m); |
| 529 | |
| 530 | mutex_lock(&flash->lock); |
| 531 | |
| 532 | /* Wait until finished previous write command. */ |
| 533 | ret = wait_till_ready(flash); |
| 534 | if (ret) |
| 535 | goto time_out; |
| 536 | |
| 537 | write_enable(flash); |
| 538 | |
| 539 | actual = to % 2; |
| 540 | /* Start write from odd address. */ |
| 541 | if (actual) { |
| 542 | flash->command[0] = OPCODE_BP; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 543 | m25p_addr2cmd(flash, to, flash->command); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 544 | |
| 545 | /* write one byte. */ |
| 546 | t[1].len = 1; |
| 547 | spi_sync(flash->spi, &m); |
| 548 | ret = wait_till_ready(flash); |
| 549 | if (ret) |
| 550 | goto time_out; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 551 | *retlen += m.actual_length - m25p_cmdsz(flash); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 552 | } |
| 553 | to += actual; |
| 554 | |
| 555 | flash->command[0] = OPCODE_AAI_WP; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 556 | m25p_addr2cmd(flash, to, flash->command); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 557 | |
| 558 | /* Write out most of the data here. */ |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 559 | cmd_sz = m25p_cmdsz(flash); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 560 | for (; actual < len - 1; actual += 2) { |
| 561 | t[0].len = cmd_sz; |
| 562 | /* write two bytes. */ |
| 563 | t[1].len = 2; |
| 564 | t[1].tx_buf = buf + actual; |
| 565 | |
| 566 | spi_sync(flash->spi, &m); |
| 567 | ret = wait_till_ready(flash); |
| 568 | if (ret) |
| 569 | goto time_out; |
| 570 | *retlen += m.actual_length - cmd_sz; |
| 571 | cmd_sz = 1; |
| 572 | to += 2; |
| 573 | } |
| 574 | write_disable(flash); |
| 575 | ret = wait_till_ready(flash); |
| 576 | if (ret) |
| 577 | goto time_out; |
| 578 | |
| 579 | /* Write out trailing byte if it exists. */ |
| 580 | if (actual != len) { |
| 581 | write_enable(flash); |
| 582 | flash->command[0] = OPCODE_BP; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 583 | m25p_addr2cmd(flash, to, flash->command); |
| 584 | t[0].len = m25p_cmdsz(flash); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 585 | t[1].len = 1; |
| 586 | t[1].tx_buf = buf + actual; |
| 587 | |
| 588 | spi_sync(flash->spi, &m); |
| 589 | ret = wait_till_ready(flash); |
| 590 | if (ret) |
| 591 | goto time_out; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 592 | *retlen += m.actual_length - m25p_cmdsz(flash); |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 593 | write_disable(flash); |
| 594 | } |
| 595 | |
| 596 | time_out: |
| 597 | mutex_unlock(&flash->lock); |
| 598 | return ret; |
| 599 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 600 | |
| 601 | /****************************************************************************/ |
| 602 | |
| 603 | /* |
| 604 | * SPI device driver setup and teardown |
| 605 | */ |
| 606 | |
| 607 | struct flash_info { |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 608 | /* JEDEC id zero means "no ID" (most older chips); otherwise it has |
| 609 | * a high byte of zero plus three data bytes: the manufacturer id, |
| 610 | * then a two byte device id. |
| 611 | */ |
| 612 | u32 jedec_id; |
Chen Gong | d0e8c47 | 2008-08-11 16:59:15 +0800 | [diff] [blame] | 613 | u16 ext_id; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 614 | |
| 615 | /* The size listed here is what works with OPCODE_SE, which isn't |
| 616 | * necessarily called a "sector" by the vendor. |
| 617 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 618 | unsigned sector_size; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 619 | u16 n_sectors; |
| 620 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 621 | u16 page_size; |
| 622 | u16 addr_width; |
| 623 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 624 | u16 flags; |
| 625 | #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */ |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 626 | #define M25P_NO_ERASE 0x02 /* No erase command needed */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 627 | }; |
| 628 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 629 | #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ |
| 630 | ((kernel_ulong_t)&(struct flash_info) { \ |
| 631 | .jedec_id = (_jedec_id), \ |
| 632 | .ext_id = (_ext_id), \ |
| 633 | .sector_size = (_sector_size), \ |
| 634 | .n_sectors = (_n_sectors), \ |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 635 | .page_size = 256, \ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 636 | .flags = (_flags), \ |
| 637 | }) |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 638 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 639 | #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \ |
| 640 | ((kernel_ulong_t)&(struct flash_info) { \ |
| 641 | .sector_size = (_sector_size), \ |
| 642 | .n_sectors = (_n_sectors), \ |
| 643 | .page_size = (_page_size), \ |
| 644 | .addr_width = (_addr_width), \ |
| 645 | .flags = M25P_NO_ERASE, \ |
| 646 | }) |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 647 | |
| 648 | /* NOTE: double check command sets and memory organization when you add |
| 649 | * more flash chips. This current list focusses on newer chips, which |
| 650 | * have been converging on command sets which including JEDEC ID. |
| 651 | */ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 652 | static const struct spi_device_id m25p_ids[] = { |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 653 | /* Atmel -- some are (confusingly) marketed as "DataFlash" */ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 654 | { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K) }, |
| 655 | { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 656 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 657 | { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) }, |
Mikhail Kshevetskiy | ada766e | 2011-09-23 19:36:18 +0400 | [diff] [blame^] | 658 | { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 659 | { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 660 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 661 | { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, |
| 662 | { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) }, |
| 663 | { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) }, |
Aleksandr Koltsoff | 8fffed8 | 2011-01-04 10:42:35 +0200 | [diff] [blame] | 664 | { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 665 | |
Gabor Juhos | 37a23c20 | 2011-01-25 11:20:26 +0100 | [diff] [blame] | 666 | /* EON -- en25xxx */ |
| 667 | { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64, SECT_4K) }, |
Gabor Juhos | 60845e7 | 2010-08-04 21:14:25 +0200 | [diff] [blame] | 668 | { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) }, |
| 669 | { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, |
| 670 | |
Gabor Juhos | f80e521 | 2010-08-05 16:58:36 +0200 | [diff] [blame] | 671 | /* Intel/Numonyx -- xxxs33b */ |
| 672 | { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, |
| 673 | { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, |
| 674 | { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, |
| 675 | |
Lennert Buytenhek | ab1ff21 | 2009-05-20 13:07:11 +0200 | [diff] [blame] | 676 | /* Macronix */ |
Simon Guinot | df0094d | 2009-12-05 15:28:00 +0100 | [diff] [blame] | 677 | { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) }, |
Martin Michlmayr | 6175f4a | 2010-06-07 19:31:01 +0100 | [diff] [blame] | 678 | { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) }, |
Gabor Juhos | 9c76b4e | 2011-03-25 08:48:52 +0100 | [diff] [blame] | 679 | { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 680 | { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) }, |
| 681 | { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) }, |
| 682 | { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, |
| 683 | { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 684 | { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, |
Kevin Cernekee | ac622f5 | 2010-10-30 21:11:04 -0700 | [diff] [blame] | 685 | { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, |
Lennert Buytenhek | ab1ff21 | 2009-05-20 13:07:11 +0200 | [diff] [blame] | 686 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 687 | /* Spansion -- single (large) sector size only, at least |
| 688 | * for the chips listed here (without boot sectors). |
| 689 | */ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 690 | { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) }, |
| 691 | { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) }, |
| 692 | { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, 0) }, |
| 693 | { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, 0) }, |
David Jander | d86fbdb | 2010-09-30 13:26:02 +0200 | [diff] [blame] | 694 | { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SECT_4K) }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 695 | { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) }, |
Kevin Cernekee | baa9ae3 | 2011-05-08 10:48:01 -0700 | [diff] [blame] | 696 | { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) }, |
| 697 | { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, 0) }, |
Kevin Cernekee | 3d2d2b6 | 2011-05-08 10:48:02 -0700 | [diff] [blame] | 698 | { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, 0) }, |
| 699 | { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 700 | { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) }, |
| 701 | { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) }, |
| 702 | { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) }, |
| 703 | { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, 0) }, |
Gernot Hoyler | f2df1ae | 2010-09-02 17:27:20 +0200 | [diff] [blame] | 704 | { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32, SECT_4K) }, |
| 705 | { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 706 | |
| 707 | /* SST -- large erase sizes are "overlays", "sectors" are 4K */ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 708 | { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K) }, |
| 709 | { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) }, |
| 710 | { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) }, |
| 711 | { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) }, |
| 712 | { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K) }, |
| 713 | { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) }, |
| 714 | { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) }, |
| 715 | { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 716 | |
| 717 | /* ST Microelectronics -- newer production may have feature updates */ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 718 | { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) }, |
| 719 | { "m25p10", INFO(0x202011, 0, 32 * 1024, 4, 0) }, |
| 720 | { "m25p20", INFO(0x202012, 0, 64 * 1024, 4, 0) }, |
| 721 | { "m25p40", INFO(0x202013, 0, 64 * 1024, 8, 0) }, |
| 722 | { "m25p80", INFO(0x202014, 0, 64 * 1024, 16, 0) }, |
| 723 | { "m25p16", INFO(0x202015, 0, 64 * 1024, 32, 0) }, |
| 724 | { "m25p32", INFO(0x202016, 0, 64 * 1024, 64, 0) }, |
| 725 | { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) }, |
| 726 | { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 727 | |
Anton Vorontsov | f7b0009 | 2010-06-22 20:57:34 +0400 | [diff] [blame] | 728 | { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, 0) }, |
| 729 | { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, 0) }, |
| 730 | { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4, 0) }, |
| 731 | { "m25p40-nonjedec", INFO(0, 0, 64 * 1024, 8, 0) }, |
| 732 | { "m25p80-nonjedec", INFO(0, 0, 64 * 1024, 16, 0) }, |
| 733 | { "m25p16-nonjedec", INFO(0, 0, 64 * 1024, 32, 0) }, |
| 734 | { "m25p32-nonjedec", INFO(0, 0, 64 * 1024, 64, 0) }, |
| 735 | { "m25p64-nonjedec", INFO(0, 0, 64 * 1024, 128, 0) }, |
| 736 | { "m25p128-nonjedec", INFO(0, 0, 256 * 1024, 64, 0) }, |
| 737 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 738 | { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2, 0) }, |
| 739 | { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, 0) }, |
| 740 | { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, 0) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 741 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 742 | { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, 0) }, |
| 743 | { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SECT_4K) }, |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 744 | |
Kevin Cernekee | 16004f3 | 2011-05-08 10:47:59 -0700 | [diff] [blame] | 745 | { "m25px32", INFO(0x207116, 0, 64 * 1024, 64, SECT_4K) }, |
| 746 | { "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64, SECT_4K) }, |
| 747 | { "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64, SECT_4K) }, |
| 748 | { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) }, |
Yoshihiro Shimoda | d8f90b2 | 2011-02-09 17:00:33 +0900 | [diff] [blame] | 749 | |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 750 | /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 751 | { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) }, |
| 752 | { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4, SECT_4K) }, |
| 753 | { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8, SECT_4K) }, |
| 754 | { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SECT_4K) }, |
| 755 | { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) }, |
| 756 | { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) }, |
Gabor Juhos | 0af18d2 | 2010-08-04 21:14:27 +0200 | [diff] [blame] | 757 | { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 758 | { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, |
Thierry Reding | d2ac467 | 2010-08-30 13:00:48 +0200 | [diff] [blame] | 759 | { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 760 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 761 | /* Catalyst / On Semiconductor -- non-JEDEC */ |
| 762 | { "cat25c11", CAT25_INFO( 16, 8, 16, 1) }, |
| 763 | { "cat25c03", CAT25_INFO( 32, 8, 16, 2) }, |
| 764 | { "cat25c09", CAT25_INFO( 128, 8, 32, 2) }, |
| 765 | { "cat25c17", CAT25_INFO( 256, 8, 32, 2) }, |
| 766 | { "cat25128", CAT25_INFO(2048, 8, 64, 2) }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 767 | { }, |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 768 | }; |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 769 | MODULE_DEVICE_TABLE(spi, m25p_ids); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 770 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 771 | static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi) |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 772 | { |
| 773 | int tmp; |
| 774 | u8 code = OPCODE_RDID; |
Chen Gong | daa8473 | 2008-09-16 14:14:12 +0800 | [diff] [blame] | 775 | u8 id[5]; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 776 | u32 jedec; |
Chen Gong | d0e8c47 | 2008-08-11 16:59:15 +0800 | [diff] [blame] | 777 | u16 ext_jedec; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 778 | struct flash_info *info; |
| 779 | |
| 780 | /* JEDEC also defines an optional "extended device information" |
| 781 | * string for after vendor-specific data, after the three bytes |
| 782 | * we use here. Supporting some chips might require using it. |
| 783 | */ |
Chen Gong | daa8473 | 2008-09-16 14:14:12 +0800 | [diff] [blame] | 784 | tmp = spi_write_then_read(spi, &code, 1, id, 5); |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 785 | if (tmp < 0) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 786 | pr_debug("%s: error %d reading JEDEC ID\n", |
Brian Norris | 0a32a10 | 2011-07-19 10:06:10 -0700 | [diff] [blame] | 787 | dev_name(&spi->dev), tmp); |
Anton Vorontsov | 9d2c4f3 | 2010-06-22 20:57:42 +0400 | [diff] [blame] | 788 | return ERR_PTR(tmp); |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 789 | } |
| 790 | jedec = id[0]; |
| 791 | jedec = jedec << 8; |
| 792 | jedec |= id[1]; |
| 793 | jedec = jedec << 8; |
| 794 | jedec |= id[2]; |
| 795 | |
Chen Gong | d0e8c47 | 2008-08-11 16:59:15 +0800 | [diff] [blame] | 796 | ext_jedec = id[3] << 8 | id[4]; |
| 797 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 798 | for (tmp = 0; tmp < ARRAY_SIZE(m25p_ids) - 1; tmp++) { |
| 799 | info = (void *)m25p_ids[tmp].driver_data; |
Mike Frysinger | a3d3f73 | 2008-11-26 10:23:25 +0000 | [diff] [blame] | 800 | if (info->jedec_id == jedec) { |
Mike Frysinger | 9168ab8 | 2008-11-26 10:23:35 +0000 | [diff] [blame] | 801 | if (info->ext_id != 0 && info->ext_id != ext_jedec) |
Chen Gong | d0e8c47 | 2008-08-11 16:59:15 +0800 | [diff] [blame] | 802 | continue; |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 803 | return &m25p_ids[tmp]; |
Mike Frysinger | a3d3f73 | 2008-11-26 10:23:25 +0000 | [diff] [blame] | 804 | } |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 805 | } |
Kevin Cernekee | f0dff9b | 2010-10-30 21:11:02 -0700 | [diff] [blame] | 806 | dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec); |
Anton Vorontsov | 9d2c4f3 | 2010-06-22 20:57:42 +0400 | [diff] [blame] | 807 | return ERR_PTR(-ENODEV); |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 808 | } |
| 809 | |
| 810 | |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 811 | /* |
| 812 | * board specific setup should have ensured the SPI clock used here |
| 813 | * matches what the READ command supports, at least until this driver |
| 814 | * understands FAST_READ (for clocks over 25 MHz). |
| 815 | */ |
| 816 | static int __devinit m25p_probe(struct spi_device *spi) |
| 817 | { |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 818 | const struct spi_device_id *id = spi_get_device_id(spi); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 819 | struct flash_platform_data *data; |
| 820 | struct m25p *flash; |
| 821 | struct flash_info *info; |
| 822 | unsigned i; |
Dmitry Eremin-Solenikov | ea6a472 | 2011-05-30 01:02:20 +0400 | [diff] [blame] | 823 | struct mtd_part_parser_data ppdata; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 824 | |
| 825 | /* Platform data helps sort out which chip type we have, as |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 826 | * well as how this board partitions it. If we don't have |
| 827 | * a chip ID, try the JEDEC id commands; they'll work for most |
| 828 | * newer chips, even if we don't recognize the particular chip. |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 829 | */ |
| 830 | data = spi->dev.platform_data; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 831 | if (data && data->type) { |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 832 | const struct spi_device_id *plat_id; |
| 833 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 834 | for (i = 0; i < ARRAY_SIZE(m25p_ids) - 1; i++) { |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 835 | plat_id = &m25p_ids[i]; |
| 836 | if (strcmp(data->type, plat_id->name)) |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 837 | continue; |
| 838 | break; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 839 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 840 | |
Dan Carpenter | f78ec6b | 2010-08-12 09:58:27 +0200 | [diff] [blame] | 841 | if (i < ARRAY_SIZE(m25p_ids) - 1) |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 842 | id = plat_id; |
| 843 | else |
| 844 | dev_warn(&spi->dev, "unrecognized id %s\n", data->type); |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 845 | } |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 846 | |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 847 | info = (void *)id->driver_data; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 848 | |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 849 | if (info->jedec_id) { |
| 850 | const struct spi_device_id *jid; |
| 851 | |
| 852 | jid = jedec_probe(spi); |
Anton Vorontsov | 9d2c4f3 | 2010-06-22 20:57:42 +0400 | [diff] [blame] | 853 | if (IS_ERR(jid)) { |
| 854 | return PTR_ERR(jid); |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 855 | } else if (jid != id) { |
| 856 | /* |
| 857 | * JEDEC knows better, so overwrite platform ID. We |
| 858 | * can't trust partitions any longer, but we'll let |
| 859 | * mtd apply them anyway, since some partitions may be |
| 860 | * marked read-only, and we don't want to lose that |
| 861 | * information, even if it's not 100% accurate. |
| 862 | */ |
| 863 | dev_warn(&spi->dev, "found %s, expected %s\n", |
| 864 | jid->name, id->name); |
| 865 | id = jid; |
| 866 | info = (void *)jid->driver_data; |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 867 | } |
Anton Vorontsov | 18c6182 | 2009-10-12 20:24:38 +0400 | [diff] [blame] | 868 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 869 | |
Christoph Lameter | e94b176 | 2006-12-06 20:33:17 -0800 | [diff] [blame] | 870 | flash = kzalloc(sizeof *flash, GFP_KERNEL); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 871 | if (!flash) |
| 872 | return -ENOMEM; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 873 | flash->command = kmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE, GFP_KERNEL); |
Johannes Stezenbach | 61c3506 | 2009-10-28 14:21:37 +0100 | [diff] [blame] | 874 | if (!flash->command) { |
| 875 | kfree(flash); |
| 876 | return -ENOMEM; |
| 877 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 878 | |
| 879 | flash->spi = spi; |
David Brownell | 7d5230e | 2007-06-24 15:09:13 -0700 | [diff] [blame] | 880 | mutex_init(&flash->lock); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 881 | dev_set_drvdata(&spi->dev, flash); |
| 882 | |
Michael Hennerich | 7228982 | 2008-07-03 23:54:42 -0700 | [diff] [blame] | 883 | /* |
Gabor Juhos | f80e521 | 2010-08-05 16:58:36 +0200 | [diff] [blame] | 884 | * Atmel, SST and Intel/Numonyx serial flash tend to power |
Graf Yang | ea60658a | 2009-09-24 15:46:22 -0400 | [diff] [blame] | 885 | * up with the software protection bits set |
Michael Hennerich | 7228982 | 2008-07-03 23:54:42 -0700 | [diff] [blame] | 886 | */ |
| 887 | |
Kevin Cernekee | aa08465 | 2011-05-08 10:48:00 -0700 | [diff] [blame] | 888 | if (JEDEC_MFR(info->jedec_id) == CFI_MFR_ATMEL || |
| 889 | JEDEC_MFR(info->jedec_id) == CFI_MFR_INTEL || |
| 890 | JEDEC_MFR(info->jedec_id) == CFI_MFR_SST) { |
Michael Hennerich | 7228982 | 2008-07-03 23:54:42 -0700 | [diff] [blame] | 891 | write_enable(flash); |
| 892 | write_sr(flash, 0); |
| 893 | } |
| 894 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 895 | if (data && data->name) |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 896 | flash->mtd.name = data->name; |
| 897 | else |
Kay Sievers | 160bbab | 2008-12-23 10:00:14 +0000 | [diff] [blame] | 898 | flash->mtd.name = dev_name(&spi->dev); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 899 | |
| 900 | flash->mtd.type = MTD_NORFLASH; |
Artem B. Bityutskiy | 783ed81 | 2006-06-14 19:53:44 +0400 | [diff] [blame] | 901 | flash->mtd.writesize = 1; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 902 | flash->mtd.flags = MTD_CAP_NORFLASH; |
| 903 | flash->mtd.size = info->sector_size * info->n_sectors; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 904 | flash->mtd.erase = m25p80_erase; |
| 905 | flash->mtd.read = m25p80_read; |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 906 | |
| 907 | /* sst flash chips use AAI word program */ |
Kevin Cernekee | aa08465 | 2011-05-08 10:48:00 -0700 | [diff] [blame] | 908 | if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST) |
Graf Yang | 49aac4a | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 909 | flash->mtd.write = sst_write; |
| 910 | else |
| 911 | flash->mtd.write = m25p80_write; |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 912 | |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 913 | /* prefer "small sector" erase if possible */ |
| 914 | if (info->flags & SECT_4K) { |
| 915 | flash->erase_opcode = OPCODE_BE_4K; |
| 916 | flash->mtd.erasesize = 4096; |
| 917 | } else { |
| 918 | flash->erase_opcode = OPCODE_SE; |
| 919 | flash->mtd.erasesize = info->sector_size; |
| 920 | } |
| 921 | |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 922 | if (info->flags & M25P_NO_ERASE) |
| 923 | flash->mtd.flags |= MTD_NO_ERASE; |
David Brownell | 87f39f0 | 2009-03-26 00:42:50 -0700 | [diff] [blame] | 924 | |
Dmitry Eremin-Solenikov | ea6a472 | 2011-05-30 01:02:20 +0400 | [diff] [blame] | 925 | ppdata.of_node = spi->dev.of_node; |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 926 | flash->mtd.dev.parent = &spi->dev; |
Anton Vorontsov | 837479d | 2009-10-12 20:24:40 +0400 | [diff] [blame] | 927 | flash->page_size = info->page_size; |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 928 | |
| 929 | if (info->addr_width) |
| 930 | flash->addr_width = info->addr_width; |
| 931 | else { |
| 932 | /* enable 4-byte addressing if the device exceeds 16MiB */ |
| 933 | if (flash->mtd.size > 0x1000000) { |
| 934 | flash->addr_width = 4; |
Kevin Cernekee | baa9ae3 | 2011-05-08 10:48:01 -0700 | [diff] [blame] | 935 | set_4byte(flash, info->jedec_id, 1); |
Kevin Cernekee | 4b7f742 | 2010-10-30 21:11:03 -0700 | [diff] [blame] | 936 | } else |
| 937 | flash->addr_width = 3; |
| 938 | } |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 939 | |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 940 | dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name, |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 941 | (long long)flash->mtd.size >> 10); |
| 942 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 943 | pr_debug("mtd .name = %s, .size = 0x%llx (%lldMiB) " |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 944 | ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n", |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 945 | flash->mtd.name, |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 946 | (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20), |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 947 | flash->mtd.erasesize, flash->mtd.erasesize / 1024, |
| 948 | flash->mtd.numeraseregions); |
| 949 | |
| 950 | if (flash->mtd.numeraseregions) |
| 951 | for (i = 0; i < flash->mtd.numeraseregions; i++) |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 952 | pr_debug("mtd.eraseregions[%d] = { .offset = 0x%llx, " |
David Woodhouse | 02d087d | 2007-06-28 22:38:38 +0100 | [diff] [blame] | 953 | ".erasesize = 0x%.8x (%uKiB), " |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 954 | ".numblocks = %d }\n", |
Artem Bityutskiy | d85316a | 2008-12-18 14:10:05 +0200 | [diff] [blame] | 955 | i, (long long)flash->mtd.eraseregions[i].offset, |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 956 | flash->mtd.eraseregions[i].erasesize, |
| 957 | flash->mtd.eraseregions[i].erasesize / 1024, |
| 958 | flash->mtd.eraseregions[i].numblocks); |
| 959 | |
| 960 | |
| 961 | /* partitions should match sector boundaries; and it may be good to |
| 962 | * use readonly partitions for writeprotected sectors (BP2..BP0). |
| 963 | */ |
Dmitry Eremin-Solenikov | 871770b | 2011-06-02 17:59:16 +0400 | [diff] [blame] | 964 | return mtd_device_parse_register(&flash->mtd, NULL, &ppdata, |
| 965 | data ? data->parts : NULL, |
| 966 | data ? data->nr_parts : 0); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 967 | } |
| 968 | |
| 969 | |
| 970 | static int __devexit m25p_remove(struct spi_device *spi) |
| 971 | { |
| 972 | struct m25p *flash = dev_get_drvdata(&spi->dev); |
| 973 | int status; |
| 974 | |
| 975 | /* Clean up MTD stuff. */ |
Jamie Iles | ba52f3a | 2011-05-23 10:22:57 +0100 | [diff] [blame] | 976 | status = mtd_device_unregister(&flash->mtd); |
Johannes Stezenbach | 61c3506 | 2009-10-28 14:21:37 +0100 | [diff] [blame] | 977 | if (status == 0) { |
| 978 | kfree(flash->command); |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 979 | kfree(flash); |
Johannes Stezenbach | 61c3506 | 2009-10-28 14:21:37 +0100 | [diff] [blame] | 980 | } |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 981 | return 0; |
| 982 | } |
| 983 | |
| 984 | |
| 985 | static struct spi_driver m25p80_driver = { |
| 986 | .driver = { |
| 987 | .name = "m25p80", |
| 988 | .bus = &spi_bus_type, |
| 989 | .owner = THIS_MODULE, |
| 990 | }, |
Anton Vorontsov | b34bc03 | 2009-10-12 20:24:35 +0400 | [diff] [blame] | 991 | .id_table = m25p_ids, |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 992 | .probe = m25p_probe, |
| 993 | .remove = __devexit_p(m25p_remove), |
David Brownell | fa0a8c7 | 2007-06-24 15:12:35 -0700 | [diff] [blame] | 994 | |
| 995 | /* REVISIT: many of these chips have deep power-down modes, which |
| 996 | * should clearly be entered on suspend() to minimize power use. |
| 997 | * And also when they're otherwise idle... |
| 998 | */ |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 999 | }; |
| 1000 | |
| 1001 | |
Peter Huewe | 627df23 | 2009-06-11 02:23:33 +0200 | [diff] [blame] | 1002 | static int __init m25p80_init(void) |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 1003 | { |
| 1004 | return spi_register_driver(&m25p80_driver); |
| 1005 | } |
| 1006 | |
| 1007 | |
Peter Huewe | 627df23 | 2009-06-11 02:23:33 +0200 | [diff] [blame] | 1008 | static void __exit m25p80_exit(void) |
Mike Lavender | 2f9f762 | 2006-01-08 13:34:27 -0800 | [diff] [blame] | 1009 | { |
| 1010 | spi_unregister_driver(&m25p80_driver); |
| 1011 | } |
| 1012 | |
| 1013 | |
| 1014 | module_init(m25p80_init); |
| 1015 | module_exit(m25p80_exit); |
| 1016 | |
| 1017 | MODULE_LICENSE("GPL"); |
| 1018 | MODULE_AUTHOR("Mike Lavender"); |
| 1019 | MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips"); |