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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
27
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
Graeme Gregory518fb722011-05-02 16:20:08 -050032
33/* supported VIO voltages in milivolts */
34static const u16 VIO_VSEL_table[] = {
35 1500, 1800, 2500, 3300,
36};
37
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050038/* VSEL tables for TPS65910 specific LDOs and dcdc's */
39
40/* supported VDD3 voltages in milivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050041static const u16 VDD3_VSEL_table[] = {
42 5000,
43};
44
45/* supported VDIG1 voltages in milivolts */
46static const u16 VDIG1_VSEL_table[] = {
47 1200, 1500, 1800, 2700,
48};
49
50/* supported VDIG2 voltages in milivolts */
51static const u16 VDIG2_VSEL_table[] = {
52 1000, 1100, 1200, 1800,
53};
54
55/* supported VPLL voltages in milivolts */
56static const u16 VPLL_VSEL_table[] = {
57 1000, 1100, 1800, 2500,
58};
59
60/* supported VDAC voltages in milivolts */
61static const u16 VDAC_VSEL_table[] = {
62 1800, 2600, 2800, 2850,
63};
64
65/* supported VAUX1 voltages in milivolts */
66static const u16 VAUX1_VSEL_table[] = {
67 1800, 2500, 2800, 2850,
68};
69
70/* supported VAUX2 voltages in milivolts */
71static const u16 VAUX2_VSEL_table[] = {
72 1800, 2800, 2900, 3300,
73};
74
75/* supported VAUX33 voltages in milivolts */
76static const u16 VAUX33_VSEL_table[] = {
77 1800, 2000, 2800, 3300,
78};
79
80/* supported VMMC voltages in milivolts */
81static const u16 VMMC_VSEL_table[] = {
82 1800, 2800, 3000, 3300,
83};
84
85struct tps_info {
86 const char *name;
87 unsigned min_uV;
88 unsigned max_uV;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053089 u8 n_voltages;
90 const u16 *voltage_table;
Graeme Gregory518fb722011-05-02 16:20:08 -050091};
92
93static struct tps_info tps65910_regs[] = {
94 {
95 .name = "VRTC",
96 },
97 {
98 .name = "VIO",
99 .min_uV = 1500000,
100 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530101 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
102 .voltage_table = VIO_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500103 },
104 {
105 .name = "VDD1",
106 .min_uV = 600000,
107 .max_uV = 4500000,
108 },
109 {
110 .name = "VDD2",
111 .min_uV = 600000,
112 .max_uV = 4500000,
113 },
114 {
115 .name = "VDD3",
116 .min_uV = 5000000,
117 .max_uV = 5000000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530118 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
119 .voltage_table = VDD3_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500120 },
121 {
122 .name = "VDIG1",
123 .min_uV = 1200000,
124 .max_uV = 2700000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530125 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
126 .voltage_table = VDIG1_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500127 },
128 {
129 .name = "VDIG2",
130 .min_uV = 1000000,
131 .max_uV = 1800000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
133 .voltage_table = VDIG2_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500134 },
135 {
136 .name = "VPLL",
137 .min_uV = 1000000,
138 .max_uV = 2500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530139 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
140 .voltage_table = VPLL_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500141 },
142 {
143 .name = "VDAC",
144 .min_uV = 1800000,
145 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530146 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
147 .voltage_table = VDAC_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500148 },
149 {
150 .name = "VAUX1",
151 .min_uV = 1800000,
152 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530153 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
154 .voltage_table = VAUX1_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500155 },
156 {
157 .name = "VAUX2",
158 .min_uV = 1800000,
159 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530160 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
161 .voltage_table = VAUX2_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500162 },
163 {
164 .name = "VAUX33",
165 .min_uV = 1800000,
166 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530167 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
168 .voltage_table = VAUX33_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500169 },
170 {
171 .name = "VMMC",
172 .min_uV = 1800000,
173 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530174 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
175 .voltage_table = VMMC_VSEL_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500176 },
177};
178
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500179static struct tps_info tps65911_regs[] = {
180 {
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530181 .name = "VRTC",
182 },
183 {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500184 .name = "VIO",
185 .min_uV = 1500000,
186 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530187 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
188 .voltage_table = VIO_VSEL_table,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500189 },
190 {
191 .name = "VDD1",
192 .min_uV = 600000,
193 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530194 .n_voltages = 73,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500195 },
196 {
197 .name = "VDD2",
198 .min_uV = 600000,
199 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530200 .n_voltages = 73,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500201 },
202 {
203 .name = "VDDCTRL",
204 .min_uV = 600000,
205 .max_uV = 1400000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530206 .n_voltages = 65,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500207 },
208 {
209 .name = "LDO1",
210 .min_uV = 1000000,
211 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530212 .n_voltages = 47,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
215 .name = "LDO2",
216 .min_uV = 1000000,
217 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530218 .n_voltages = 47,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500219 },
220 {
221 .name = "LDO3",
222 .min_uV = 1000000,
223 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530224 .n_voltages = 24,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500225 },
226 {
227 .name = "LDO4",
228 .min_uV = 1000000,
229 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530230 .n_voltages = 47,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500231 },
232 {
233 .name = "LDO5",
234 .min_uV = 1000000,
235 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530236 .n_voltages = 24,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500237 },
238 {
239 .name = "LDO6",
240 .min_uV = 1000000,
241 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530242 .n_voltages = 24,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500243 },
244 {
245 .name = "LDO7",
246 .min_uV = 1000000,
247 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530248 .n_voltages = 24,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500249 },
250 {
251 .name = "LDO8",
252 .min_uV = 1000000,
253 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530254 .n_voltages = 24,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500255 },
256};
257
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530258#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
259static unsigned int tps65910_ext_sleep_control[] = {
260 0,
261 EXT_CONTROL_REG_BITS(VIO, 1, 0),
262 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
263 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
264 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
265 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
266 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
267 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
268 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
269 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
270 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
271 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
272 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
273};
274
275static unsigned int tps65911_ext_sleep_control[] = {
276 0,
277 EXT_CONTROL_REG_BITS(VIO, 1, 0),
278 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
279 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
280 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
281 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
282 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
283 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
284 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
285 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
286 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
287 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
288 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
289};
290
Graeme Gregory518fb722011-05-02 16:20:08 -0500291struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800292 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500293 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800294 struct regulator_dev **rdev;
295 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500296 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800297 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500298 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500299 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530300 unsigned int *ext_sleep_control;
301 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500302};
303
304static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
305{
306 u8 val;
307 int err;
308
309 err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
310 if (err)
311 return err;
312
313 return val;
314}
315
316static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
317{
318 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
319}
320
321static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
322 u8 set_mask, u8 clear_mask)
323{
324 int err, data;
325
326 mutex_lock(&pmic->mutex);
327
328 data = tps65910_read(pmic, reg);
329 if (data < 0) {
330 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
331 err = data;
332 goto out;
333 }
334
335 data &= ~clear_mask;
336 data |= set_mask;
337 err = tps65910_write(pmic, reg, data);
338 if (err)
339 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
340
341out:
342 mutex_unlock(&pmic->mutex);
343 return err;
344}
345
346static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
347{
348 int data;
349
350 mutex_lock(&pmic->mutex);
351
352 data = tps65910_read(pmic, reg);
353 if (data < 0)
354 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
355
356 mutex_unlock(&pmic->mutex);
357 return data;
358}
359
360static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
361{
362 int err;
363
364 mutex_lock(&pmic->mutex);
365
366 err = tps65910_write(pmic, reg, val);
367 if (err < 0)
368 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
369
370 mutex_unlock(&pmic->mutex);
371 return err;
372}
373
374static int tps65910_get_ctrl_register(int id)
375{
376 switch (id) {
377 case TPS65910_REG_VRTC:
378 return TPS65910_VRTC;
379 case TPS65910_REG_VIO:
380 return TPS65910_VIO;
381 case TPS65910_REG_VDD1:
382 return TPS65910_VDD1;
383 case TPS65910_REG_VDD2:
384 return TPS65910_VDD2;
385 case TPS65910_REG_VDD3:
386 return TPS65910_VDD3;
387 case TPS65910_REG_VDIG1:
388 return TPS65910_VDIG1;
389 case TPS65910_REG_VDIG2:
390 return TPS65910_VDIG2;
391 case TPS65910_REG_VPLL:
392 return TPS65910_VPLL;
393 case TPS65910_REG_VDAC:
394 return TPS65910_VDAC;
395 case TPS65910_REG_VAUX1:
396 return TPS65910_VAUX1;
397 case TPS65910_REG_VAUX2:
398 return TPS65910_VAUX2;
399 case TPS65910_REG_VAUX33:
400 return TPS65910_VAUX33;
401 case TPS65910_REG_VMMC:
402 return TPS65910_VMMC;
403 default:
404 return -EINVAL;
405 }
406}
407
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500408static int tps65911_get_ctrl_register(int id)
409{
410 switch (id) {
411 case TPS65910_REG_VRTC:
412 return TPS65910_VRTC;
413 case TPS65910_REG_VIO:
414 return TPS65910_VIO;
415 case TPS65910_REG_VDD1:
416 return TPS65910_VDD1;
417 case TPS65910_REG_VDD2:
418 return TPS65910_VDD2;
419 case TPS65911_REG_VDDCTRL:
420 return TPS65911_VDDCTRL;
421 case TPS65911_REG_LDO1:
422 return TPS65911_LDO1;
423 case TPS65911_REG_LDO2:
424 return TPS65911_LDO2;
425 case TPS65911_REG_LDO3:
426 return TPS65911_LDO3;
427 case TPS65911_REG_LDO4:
428 return TPS65911_LDO4;
429 case TPS65911_REG_LDO5:
430 return TPS65911_LDO5;
431 case TPS65911_REG_LDO6:
432 return TPS65911_LDO6;
433 case TPS65911_REG_LDO7:
434 return TPS65911_LDO7;
435 case TPS65911_REG_LDO8:
436 return TPS65911_LDO8;
437 default:
438 return -EINVAL;
439 }
440}
441
Graeme Gregory518fb722011-05-02 16:20:08 -0500442static int tps65910_is_enabled(struct regulator_dev *dev)
443{
444 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
445 int reg, value, id = rdev_get_id(dev);
446
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500447 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500448 if (reg < 0)
449 return reg;
450
451 value = tps65910_reg_read(pmic, reg);
452 if (value < 0)
453 return value;
454
455 return value & TPS65910_SUPPLY_STATE_ENABLED;
456}
457
458static int tps65910_enable(struct regulator_dev *dev)
459{
460 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
461 struct tps65910 *mfd = pmic->mfd;
462 int reg, id = rdev_get_id(dev);
463
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500464 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500465 if (reg < 0)
466 return reg;
467
468 return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
469}
470
471static int tps65910_disable(struct regulator_dev *dev)
472{
473 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
474 struct tps65910 *mfd = pmic->mfd;
475 int reg, id = rdev_get_id(dev);
476
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500477 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500478 if (reg < 0)
479 return reg;
480
481 return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
482}
483
484
485static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
486{
487 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
488 struct tps65910 *mfd = pmic->mfd;
489 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500490
491 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500492 if (reg < 0)
493 return reg;
494
495 switch (mode) {
496 case REGULATOR_MODE_NORMAL:
497 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
498 LDO_ST_MODE_BIT);
499 case REGULATOR_MODE_IDLE:
500 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
501 return tps65910_set_bits(mfd, reg, value);
502 case REGULATOR_MODE_STANDBY:
503 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
504 }
505
506 return -EINVAL;
507}
508
509static unsigned int tps65910_get_mode(struct regulator_dev *dev)
510{
511 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
512 int reg, value, id = rdev_get_id(dev);
513
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500514 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500515 if (reg < 0)
516 return reg;
517
518 value = tps65910_reg_read(pmic, reg);
519 if (value < 0)
520 return value;
521
522 if (value & LDO_ST_ON_BIT)
523 return REGULATOR_MODE_STANDBY;
524 else if (value & LDO_ST_MODE_BIT)
525 return REGULATOR_MODE_IDLE;
526 else
527 return REGULATOR_MODE_NORMAL;
528}
529
530static int tps65910_get_voltage_dcdc(struct regulator_dev *dev)
531{
532 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
533 int id = rdev_get_id(dev), voltage = 0;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500534 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500535
536 switch (id) {
537 case TPS65910_REG_VDD1:
538 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
539 mult = tps65910_reg_read(pmic, TPS65910_VDD1);
540 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
541 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
542 sr = opvsel & VDD1_OP_CMD_MASK;
543 opvsel &= VDD1_OP_SEL_MASK;
544 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500545 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500546 break;
547 case TPS65910_REG_VDD2:
548 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
549 mult = tps65910_reg_read(pmic, TPS65910_VDD2);
550 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
551 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
552 sr = opvsel & VDD2_OP_CMD_MASK;
553 opvsel &= VDD2_OP_SEL_MASK;
554 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500555 vselmax = 75;
556 break;
557 case TPS65911_REG_VDDCTRL:
558 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
559 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
560 sr = opvsel & VDDCTRL_OP_CMD_MASK;
561 opvsel &= VDDCTRL_OP_SEL_MASK;
562 srvsel &= VDDCTRL_SR_SEL_MASK;
563 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500564 break;
565 }
566
567 /* multiplier 0 == 1 but 2,3 normal */
568 if (!mult)
569 mult=1;
570
571 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500572 /* normalise to valid range */
573 if (srvsel < 3)
574 srvsel = 3;
575 if (srvsel > vselmax)
576 srvsel = vselmax;
Graeme Gregory518fb722011-05-02 16:20:08 -0500577 srvsel -= 3;
578
579 voltage = (srvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
580 } else {
581
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500582 /* normalise to valid range*/
583 if (opvsel < 3)
584 opvsel = 3;
585 if (opvsel > vselmax)
586 opvsel = vselmax;
Graeme Gregory518fb722011-05-02 16:20:08 -0500587 opvsel -= 3;
588
589 voltage = (opvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
590 }
591
592 voltage *= mult;
593
594 return voltage;
595}
596
597static int tps65910_get_voltage(struct regulator_dev *dev)
598{
599 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
600 int reg, value, id = rdev_get_id(dev), voltage = 0;
601
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500602 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500603 if (reg < 0)
604 return reg;
605
606 value = tps65910_reg_read(pmic, reg);
607 if (value < 0)
608 return value;
609
610 switch (id) {
611 case TPS65910_REG_VIO:
612 case TPS65910_REG_VDIG1:
613 case TPS65910_REG_VDIG2:
614 case TPS65910_REG_VPLL:
615 case TPS65910_REG_VDAC:
616 case TPS65910_REG_VAUX1:
617 case TPS65910_REG_VAUX2:
618 case TPS65910_REG_VAUX33:
619 case TPS65910_REG_VMMC:
620 value &= LDO_SEL_MASK;
621 value >>= LDO_SEL_SHIFT;
622 break;
623 default:
624 return -EINVAL;
625 }
626
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530627 voltage = pmic->info[id]->voltage_table[value] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500628
629 return voltage;
630}
631
632static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
633{
634 return 5 * 1000 * 1000;
635}
636
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500637static int tps65911_get_voltage(struct regulator_dev *dev)
638{
639 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
640 int step_mv, id = rdev_get_id(dev);
641 u8 value, reg;
642
643 reg = pmic->get_ctrl_reg(id);
644
645 value = tps65910_reg_read(pmic, reg);
646
647 switch (id) {
648 case TPS65911_REG_LDO1:
649 case TPS65911_REG_LDO2:
650 case TPS65911_REG_LDO4:
651 value &= LDO1_SEL_MASK;
652 value >>= LDO_SEL_SHIFT;
653 /* The first 5 values of the selector correspond to 1V */
654 if (value < 5)
655 value = 0;
656 else
657 value -= 4;
658
659 step_mv = 50;
660 break;
661 case TPS65911_REG_LDO3:
662 case TPS65911_REG_LDO5:
663 case TPS65911_REG_LDO6:
664 case TPS65911_REG_LDO7:
665 case TPS65911_REG_LDO8:
666 value &= LDO3_SEL_MASK;
667 value >>= LDO_SEL_SHIFT;
668 /* The first 3 values of the selector correspond to 1V */
669 if (value < 3)
670 value = 0;
671 else
672 value -= 2;
673
674 step_mv = 100;
675 break;
676 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530677 value &= LDO_SEL_MASK;
678 value >>= LDO_SEL_SHIFT;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530679 return pmic->info[id]->voltage_table[value] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500680 default:
681 return -EINVAL;
682 }
683
684 return (LDO_MIN_VOLT + value * step_mv) * 1000;
685}
686
Graeme Gregory518fb722011-05-02 16:20:08 -0500687static int tps65910_set_voltage_dcdc(struct regulator_dev *dev,
688 unsigned selector)
689{
690 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
691 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500692 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500693
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500694 switch (id) {
695 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530696 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500697 if (dcdc_mult == 1)
698 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530699 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500700
Graeme Gregory518fb722011-05-02 16:20:08 -0500701 tps65910_modify_bits(pmic, TPS65910_VDD1,
702 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
703 VDD1_VGAIN_SEL_MASK);
704 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500705 break;
706 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530707 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500708 if (dcdc_mult == 1)
709 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530710 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500711
Graeme Gregory518fb722011-05-02 16:20:08 -0500712 tps65910_modify_bits(pmic, TPS65910_VDD2,
713 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
714 VDD1_VGAIN_SEL_MASK);
715 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500716 break;
717 case TPS65911_REG_VDDCTRL:
718 vsel = selector;
719 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500720 }
721
722 return 0;
723}
724
725static int tps65910_set_voltage(struct regulator_dev *dev, unsigned selector)
726{
727 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
728 int reg, id = rdev_get_id(dev);
729
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500730 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500731 if (reg < 0)
732 return reg;
733
734 switch (id) {
735 case TPS65910_REG_VIO:
736 case TPS65910_REG_VDIG1:
737 case TPS65910_REG_VDIG2:
738 case TPS65910_REG_VPLL:
739 case TPS65910_REG_VDAC:
740 case TPS65910_REG_VAUX1:
741 case TPS65910_REG_VAUX2:
742 case TPS65910_REG_VAUX33:
743 case TPS65910_REG_VMMC:
744 return tps65910_modify_bits(pmic, reg,
745 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
746 }
747
748 return -EINVAL;
749}
750
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500751static int tps65911_set_voltage(struct regulator_dev *dev, unsigned selector)
752{
753 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
754 int reg, id = rdev_get_id(dev);
755
756 reg = pmic->get_ctrl_reg(id);
757 if (reg < 0)
758 return reg;
759
760 switch (id) {
761 case TPS65911_REG_LDO1:
762 case TPS65911_REG_LDO2:
763 case TPS65911_REG_LDO4:
764 return tps65910_modify_bits(pmic, reg,
765 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
766 case TPS65911_REG_LDO3:
767 case TPS65911_REG_LDO5:
768 case TPS65911_REG_LDO6:
769 case TPS65911_REG_LDO7:
770 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500771 return tps65910_modify_bits(pmic, reg,
772 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530773 case TPS65910_REG_VIO:
774 return tps65910_modify_bits(pmic, reg,
775 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500776 }
777
778 return -EINVAL;
779}
780
781
Graeme Gregory518fb722011-05-02 16:20:08 -0500782static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
783 unsigned selector)
784{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500785 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500786
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500787 switch (id) {
788 case TPS65910_REG_VDD1:
789 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530790 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500791 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530792 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800793 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500794 case TPS65911_REG_VDDCTRL:
795 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800796 break;
797 default:
798 BUG();
799 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500800 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500801
802 return volt * 100 * mult;
803}
804
805static int tps65910_list_voltage(struct regulator_dev *dev,
806 unsigned selector)
807{
808 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
809 int id = rdev_get_id(dev), voltage;
810
811 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
812 return -EINVAL;
813
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530814 if (selector >= pmic->info[id]->n_voltages)
Graeme Gregory518fb722011-05-02 16:20:08 -0500815 return -EINVAL;
816 else
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530817 voltage = pmic->info[id]->voltage_table[selector] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500818
819 return voltage;
820}
821
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500822static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
823{
824 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
825 int step_mv = 0, id = rdev_get_id(dev);
826
827 switch(id) {
828 case TPS65911_REG_LDO1:
829 case TPS65911_REG_LDO2:
830 case TPS65911_REG_LDO4:
831 /* The first 5 values of the selector correspond to 1V */
832 if (selector < 5)
833 selector = 0;
834 else
835 selector -= 4;
836
837 step_mv = 50;
838 break;
839 case TPS65911_REG_LDO3:
840 case TPS65911_REG_LDO5:
841 case TPS65911_REG_LDO6:
842 case TPS65911_REG_LDO7:
843 case TPS65911_REG_LDO8:
844 /* The first 3 values of the selector correspond to 1V */
845 if (selector < 3)
846 selector = 0;
847 else
848 selector -= 2;
849
850 step_mv = 100;
851 break;
852 case TPS65910_REG_VIO:
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530853 return pmic->info[id]->voltage_table[selector] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500854 default:
855 return -EINVAL;
856 }
857
858 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
859}
860
Graeme Gregory518fb722011-05-02 16:20:08 -0500861/* Regulator ops (except VRTC) */
862static struct regulator_ops tps65910_ops_dcdc = {
863 .is_enabled = tps65910_is_enabled,
864 .enable = tps65910_enable,
865 .disable = tps65910_disable,
866 .set_mode = tps65910_set_mode,
867 .get_mode = tps65910_get_mode,
868 .get_voltage = tps65910_get_voltage_dcdc,
869 .set_voltage_sel = tps65910_set_voltage_dcdc,
870 .list_voltage = tps65910_list_voltage_dcdc,
871};
872
873static struct regulator_ops tps65910_ops_vdd3 = {
874 .is_enabled = tps65910_is_enabled,
875 .enable = tps65910_enable,
876 .disable = tps65910_disable,
877 .set_mode = tps65910_set_mode,
878 .get_mode = tps65910_get_mode,
879 .get_voltage = tps65910_get_voltage_vdd3,
880 .list_voltage = tps65910_list_voltage,
881};
882
883static struct regulator_ops tps65910_ops = {
884 .is_enabled = tps65910_is_enabled,
885 .enable = tps65910_enable,
886 .disable = tps65910_disable,
887 .set_mode = tps65910_set_mode,
888 .get_mode = tps65910_get_mode,
889 .get_voltage = tps65910_get_voltage,
890 .set_voltage_sel = tps65910_set_voltage,
891 .list_voltage = tps65910_list_voltage,
892};
893
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500894static struct regulator_ops tps65911_ops = {
895 .is_enabled = tps65910_is_enabled,
896 .enable = tps65910_enable,
897 .disable = tps65910_disable,
898 .set_mode = tps65910_set_mode,
899 .get_mode = tps65910_get_mode,
900 .get_voltage = tps65911_get_voltage,
901 .set_voltage_sel = tps65911_set_voltage,
902 .list_voltage = tps65911_list_voltage,
903};
904
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530905static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
906 int id, int ext_sleep_config)
907{
908 struct tps65910 *mfd = pmic->mfd;
909 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
910 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
911 int ret;
912
913 /*
914 * Regulator can not be control from multiple external input EN1, EN2
915 * and EN3 together.
916 */
917 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
918 int en_count;
919 en_count = ((ext_sleep_config &
920 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
921 en_count += ((ext_sleep_config &
922 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
923 en_count += ((ext_sleep_config &
924 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
925 if (en_count > 1) {
926 dev_err(mfd->dev,
927 "External sleep control flag is not proper\n");
928 return -EINVAL;
929 }
930 }
931
932 pmic->board_ext_control[id] = ext_sleep_config;
933
934 /* External EN1 control */
935 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
936 ret = tps65910_set_bits(mfd,
937 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
938 else
939 ret = tps65910_clear_bits(mfd,
940 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
941 if (ret < 0) {
942 dev_err(mfd->dev,
943 "Error in configuring external control EN1\n");
944 return ret;
945 }
946
947 /* External EN2 control */
948 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
949 ret = tps65910_set_bits(mfd,
950 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
951 else
952 ret = tps65910_clear_bits(mfd,
953 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
954 if (ret < 0) {
955 dev_err(mfd->dev,
956 "Error in configuring external control EN2\n");
957 return ret;
958 }
959
960 /* External EN3 control for TPS65910 LDO only */
961 if ((tps65910_chip_id(mfd) == TPS65910) &&
962 (id >= TPS65910_REG_VDIG1)) {
963 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
964 ret = tps65910_set_bits(mfd,
965 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
966 else
967 ret = tps65910_clear_bits(mfd,
968 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
969 if (ret < 0) {
970 dev_err(mfd->dev,
971 "Error in configuring external control EN3\n");
972 return ret;
973 }
974 }
975
976 /* Return if no external control is selected */
977 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
978 /* Clear all sleep controls */
979 ret = tps65910_clear_bits(mfd,
980 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
981 if (!ret)
982 ret = tps65910_clear_bits(mfd,
983 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
984 if (ret < 0)
985 dev_err(mfd->dev,
986 "Error in configuring SLEEP register\n");
987 return ret;
988 }
989
990 /*
991 * For regulator that has separate operational and sleep register make
992 * sure that operational is used and clear sleep register to turn
993 * regulator off when external control is inactive
994 */
995 if ((id == TPS65910_REG_VDD1) ||
996 (id == TPS65910_REG_VDD2) ||
997 ((id == TPS65911_REG_VDDCTRL) &&
998 (tps65910_chip_id(mfd) == TPS65911))) {
999 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
1000 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
1001 int opvsel = tps65910_reg_read(pmic, op_reg_add);
1002 int srvsel = tps65910_reg_read(pmic, sr_reg_add);
1003 if (opvsel & VDD1_OP_CMD_MASK) {
1004 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1005 ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
1006 if (ret < 0) {
1007 dev_err(mfd->dev,
1008 "Error in configuring op register\n");
1009 return ret;
1010 }
1011 }
1012 ret = tps65910_reg_write(pmic, sr_reg_add, 0);
1013 if (ret < 0) {
1014 dev_err(mfd->dev, "Error in settting sr register\n");
1015 return ret;
1016 }
1017 }
1018
1019 ret = tps65910_clear_bits(mfd,
1020 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1021 if (!ret)
1022 ret = tps65910_set_bits(mfd,
1023 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1024 if (ret < 0)
1025 dev_err(mfd->dev,
1026 "Error in configuring SLEEP register\n");
1027 return ret;
1028}
1029
Graeme Gregory518fb722011-05-02 16:20:08 -05001030static __devinit int tps65910_probe(struct platform_device *pdev)
1031{
1032 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001033 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001034 struct regulator_init_data *reg_data;
1035 struct regulator_dev *rdev;
1036 struct tps65910_reg *pmic;
1037 struct tps65910_board *pmic_plat_data;
Graeme Gregory518fb722011-05-02 16:20:08 -05001038 int i, err;
1039
1040 pmic_plat_data = dev_get_platdata(tps65910->dev);
1041 if (!pmic_plat_data)
1042 return -EINVAL;
1043
Graeme Gregory518fb722011-05-02 16:20:08 -05001044 pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);
1045 if (!pmic)
1046 return -ENOMEM;
1047
1048 mutex_init(&pmic->mutex);
1049 pmic->mfd = tps65910;
1050 platform_set_drvdata(pdev, pmic);
1051
1052 /* Give control of all register to control port */
1053 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1054 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1055
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001056 switch(tps65910_chip_id(tps65910)) {
1057 case TPS65910:
1058 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001059 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301060 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001061 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001062 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001063 case TPS65911:
1064 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001065 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301066 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001067 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001068 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001069 default:
1070 pr_err("Invalid tps chip version\n");
Axel Lina3ee13e2011-07-10 18:52:07 +08001071 kfree(pmic);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001072 return -ENODEV;
1073 }
1074
Axel Lin39aa9b62011-07-11 09:57:43 +08001075 pmic->desc = kcalloc(pmic->num_regulators,
1076 sizeof(struct regulator_desc), GFP_KERNEL);
1077 if (!pmic->desc) {
1078 err = -ENOMEM;
1079 goto err_free_pmic;
1080 }
1081
1082 pmic->info = kcalloc(pmic->num_regulators,
1083 sizeof(struct tps_info *), GFP_KERNEL);
1084 if (!pmic->info) {
1085 err = -ENOMEM;
1086 goto err_free_desc;
1087 }
1088
1089 pmic->rdev = kcalloc(pmic->num_regulators,
1090 sizeof(struct regulator_dev *), GFP_KERNEL);
1091 if (!pmic->rdev) {
1092 err = -ENOMEM;
1093 goto err_free_info;
1094 }
1095
Kyle Mannac1fc1482011-11-03 12:08:06 -05001096 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1097 i++, info++) {
1098
1099 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1100
1101 /* Regulator API handles empty constraints but not NULL
1102 * constraints */
1103 if (!reg_data)
1104 continue;
1105
Graeme Gregory518fb722011-05-02 16:20:08 -05001106 /* Register the regulators */
1107 pmic->info[i] = info;
1108
1109 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001110 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301111 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001112
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001113 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001114 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301115 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1116 VDD1_2_NUM_VOLT_COARSE;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001117 } else if (i == TPS65910_REG_VDD3) {
1118 if (tps65910_chip_id(tps65910) == TPS65910)
1119 pmic->desc[i].ops = &tps65910_ops_vdd3;
1120 else
1121 pmic->desc[i].ops = &tps65910_ops_dcdc;
1122 } else {
1123 if (tps65910_chip_id(tps65910) == TPS65910)
1124 pmic->desc[i].ops = &tps65910_ops;
1125 else
1126 pmic->desc[i].ops = &tps65911_ops;
1127 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001128
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301129 err = tps65910_set_ext_sleep_config(pmic, i,
1130 pmic_plat_data->regulator_ext_sleep_control[i]);
1131 /*
1132 * Failing on regulator for configuring externally control
1133 * is not a serious issue, just throw warning.
1134 */
1135 if (err < 0)
1136 dev_warn(tps65910->dev,
1137 "Failed to initialise ext control config\n");
1138
Graeme Gregory518fb722011-05-02 16:20:08 -05001139 pmic->desc[i].type = REGULATOR_VOLTAGE;
1140 pmic->desc[i].owner = THIS_MODULE;
1141
1142 rdev = regulator_register(&pmic->desc[i],
Rajendra Nayak2c043bc2011-11-18 16:47:19 +05301143 tps65910->dev, reg_data, pmic, NULL);
Graeme Gregory518fb722011-05-02 16:20:08 -05001144 if (IS_ERR(rdev)) {
1145 dev_err(tps65910->dev,
1146 "failed to register %s regulator\n",
1147 pdev->name);
1148 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001149 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001150 }
1151
1152 /* Save regulator for cleanup */
1153 pmic->rdev[i] = rdev;
1154 }
1155 return 0;
1156
Axel Lin39aa9b62011-07-11 09:57:43 +08001157err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001158 while (--i >= 0)
1159 regulator_unregister(pmic->rdev[i]);
Axel Lin39aa9b62011-07-11 09:57:43 +08001160 kfree(pmic->rdev);
1161err_free_info:
1162 kfree(pmic->info);
1163err_free_desc:
1164 kfree(pmic->desc);
1165err_free_pmic:
Graeme Gregory518fb722011-05-02 16:20:08 -05001166 kfree(pmic);
1167 return err;
1168}
1169
1170static int __devexit tps65910_remove(struct platform_device *pdev)
1171{
Axel Lin39aa9b62011-07-11 09:57:43 +08001172 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001173 int i;
1174
Axel Lin39aa9b62011-07-11 09:57:43 +08001175 for (i = 0; i < pmic->num_regulators; i++)
1176 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001177
Axel Lin39aa9b62011-07-11 09:57:43 +08001178 kfree(pmic->rdev);
1179 kfree(pmic->info);
1180 kfree(pmic->desc);
1181 kfree(pmic);
Graeme Gregory518fb722011-05-02 16:20:08 -05001182 return 0;
1183}
1184
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301185static void tps65910_shutdown(struct platform_device *pdev)
1186{
1187 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1188 int i;
1189
1190 /*
1191 * Before bootloader jumps to kernel, it makes sure that required
1192 * external control signals are in desired state so that given rails
1193 * can be configure accordingly.
1194 * If rails are configured to be controlled from external control
1195 * then before shutting down/rebooting the system, the external
1196 * control configuration need to be remove from the rails so that
1197 * its output will be available as per register programming even
1198 * if external controls are removed. This is require when the POR
1199 * value of the control signals are not in active state and before
1200 * bootloader initializes it, the system requires the rail output
1201 * to be active for booting.
1202 */
1203 for (i = 0; i < pmic->num_regulators; i++) {
1204 int err;
1205 if (!pmic->rdev[i])
1206 continue;
1207
1208 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1209 if (err < 0)
1210 dev_err(&pdev->dev,
1211 "Error in clearing external control\n");
1212 }
1213}
1214
Graeme Gregory518fb722011-05-02 16:20:08 -05001215static struct platform_driver tps65910_driver = {
1216 .driver = {
1217 .name = "tps65910-pmic",
1218 .owner = THIS_MODULE,
1219 },
1220 .probe = tps65910_probe,
1221 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301222 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001223};
1224
1225static int __init tps65910_init(void)
1226{
1227 return platform_driver_register(&tps65910_driver);
1228}
1229subsys_initcall(tps65910_init);
1230
1231static void __exit tps65910_cleanup(void)
1232{
1233 platform_driver_unregister(&tps65910_driver);
1234}
1235module_exit(tps65910_cleanup);
1236
1237MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001238MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001239MODULE_LICENSE("GPL v2");
1240MODULE_ALIAS("platform:tps65910-pmic");