Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * Copyright 2009 Holger Schurig, hs4233@mail.mn-solutions.de |
| 5 | * |
| 6 | * This contains i.MX21-specific hardware definitions. For those |
| 7 | * hardware pieces that are common between i.MX21 and i.MX27, have a |
| 8 | * look at mx2x.h. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * as published by the Free Software Foundation; either version 2 |
| 13 | * of the License, or (at your option) any later version. |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 22 | * MA 02110-1301, USA. |
| 23 | */ |
| 24 | |
| 25 | #ifndef __ASM_ARCH_MXC_MX21_H__ |
| 26 | #define __ASM_ARCH_MXC_MX21_H__ |
| 27 | |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 28 | /* Memory regions and CS */ |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 29 | #define MX21_SDRAM_BASE_ADDR 0xc0000000 |
| 30 | #define MX21_CSD1_BASE_ADDR 0xc4000000 |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 31 | |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 32 | #define MX21_CS0_BASE_ADDR 0xc8000000 |
| 33 | #define MX21_CS1_BASE_ADDR 0xcc000000 |
| 34 | #define MX21_CS2_BASE_ADDR 0xd0000000 |
| 35 | #define MX21_CS3_BASE_ADDR 0xd1000000 |
| 36 | #define MX21_CS4_BASE_ADDR 0xd2000000 |
| 37 | #define MX21_PCMCIA_MEM_BASE_ADDR 0xd4000000 |
| 38 | #define MX21_CS5_BASE_ADDR 0xdd000000 |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 39 | |
| 40 | /* NAND, SDRAM, WEIM etc controllers */ |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 41 | #define MX21_X_MEMC_BASE_ADDR 0xdf000000 |
| 42 | #define MX21_X_MEMC_BASE_ADDR_VIRT 0xf4200000 |
| 43 | #define MX21_X_MEMC_SIZE SZ_256K |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 44 | |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 45 | #define MX21_SDRAMC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x0000) |
| 46 | #define MX21_EIM_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x1000) |
| 47 | #define MX21_PCMCIA_CTL_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x2000) |
| 48 | #define MX21_NFC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x3000) |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 49 | |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 50 | #define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 51 | |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 52 | /* fixed interrupt numbers */ |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 53 | #define MX21_INT_FIRI 9 |
| 54 | #define MX21_INT_BMI 30 |
| 55 | #define MX21_INT_EMMAENC 49 |
| 56 | #define MX21_INT_EMMADEC 50 |
| 57 | #define MX21_INT_USBWKUP 53 |
| 58 | #define MX21_INT_USBDMA 54 |
| 59 | #define MX21_INT_USBHOST 55 |
| 60 | #define MX21_INT_USBFUNC 56 |
| 61 | #define MX21_INT_USBMNP 57 |
| 62 | #define MX21_INT_USBCTRL 58 |
| 63 | #define MX21_INT_USBCTRL 58 |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 64 | |
| 65 | /* fixed DMA request numbers */ |
Uwe Kleine-König | c112931 | 2009-11-10 14:59:54 +0100 | [diff] [blame] | 66 | #define MX21_DMA_REQ_FIRI_RX 4 |
| 67 | #define MX21_DMA_REQ_BMI_TX 28 |
| 68 | #define MX21_DMA_REQ_BMI_RX 29 |
| 69 | |
| 70 | /* these should go away */ |
| 71 | #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR |
| 72 | #define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR |
| 73 | #define CS0_BASE_ADDR MX21_CS0_BASE_ADDR |
| 74 | #define CS1_BASE_ADDR MX21_CS1_BASE_ADDR |
| 75 | #define CS2_BASE_ADDR MX21_CS2_BASE_ADDR |
| 76 | #define CS3_BASE_ADDR MX21_CS3_BASE_ADDR |
| 77 | #define CS4_BASE_ADDR MX21_CS4_BASE_ADDR |
| 78 | #define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR |
| 79 | #define CS5_BASE_ADDR MX21_CS5_BASE_ADDR |
| 80 | #define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR |
| 81 | #define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT |
| 82 | #define X_MEMC_SIZE MX21_X_MEMC_SIZE |
| 83 | #define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR |
| 84 | #define EIM_BASE_ADDR MX21_EIM_BASE_ADDR |
| 85 | #define PCMCIA_CTL_BASE_ADDR MX21_PCMCIA_CTL_BASE_ADDR |
| 86 | #define NFC_BASE_ADDR MX21_NFC_BASE_ADDR |
| 87 | #define IRAM_BASE_ADDR MX21_IRAM_BASE_ADDR |
| 88 | #define MXC_INT_FIRI MX21_INT_FIRI |
| 89 | #define MXC_INT_BMI MX21_INT_BMI |
| 90 | #define MXC_INT_EMMAENC MX21_INT_EMMAENC |
| 91 | #define MXC_INT_EMMADEC MX21_INT_EMMADEC |
| 92 | #define MXC_INT_USBWKUP MX21_INT_USBWKUP |
| 93 | #define MXC_INT_USBDMA MX21_INT_USBDMA |
| 94 | #define MXC_INT_USBHOST MX21_INT_USBHOST |
| 95 | #define MXC_INT_USBFUNC MX21_INT_USBFUNC |
| 96 | #define MXC_INT_USBMNP MX21_INT_USBMNP |
| 97 | #define MXC_INT_USBCTRL MX21_INT_USBCTRL |
| 98 | #define MXC_INT_USBCTRL MX21_INT_USBCTRL |
| 99 | #define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX |
| 100 | #define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX |
| 101 | #define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX |
Holger Schurig | 260a1fd | 2009-01-26 16:34:53 +0100 | [diff] [blame] | 102 | |
| 103 | #endif /* __ASM_ARCH_MXC_MX21_H__ */ |