| Vineet Gupta | abe11dd | 2013-01-18 15:12:21 +0530 | [diff] [blame] | 1 | * ARC700 incore Interrupt Controller |
| 2 | |
| 3 | The core interrupt controller provides 32 prioritised interrupts (2 levels) |
| 4 | to ARC700 core. |
| 5 | |
| 6 | Properties: |
| 7 | |
| 8 | - compatible: "snps,arc700-intc" |
| 9 | - interrupt-controller: This is an interrupt controller. |
| 10 | - #interrupt-cells: Must be <1>. |
| 11 | |
| 12 | Single Cell "interrupts" property of a device specifies the IRQ number |
| 13 | between 0 to 31 |
| 14 | |
| 15 | intc accessed via the special ARC AUX register interface, hence "reg" property |
| 16 | is not specified. |
| 17 | |
| 18 | Example: |
| 19 | |
| 20 | intc: interrupt-controller { |
| 21 | compatible = "snps,arc700-intc"; |
| 22 | interrupt-controller; |
| 23 | #interrupt-cells = <1>; |
| 24 | }; |