blob: cc5709d183502be10785b8dfc4312a459d9fcef1 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001config FRV
2 bool
3 default y
Sam Ravnborgec7748b2008-02-09 10:46:40 +01004 select HAVE_IDE
David Howells4a3b9892009-06-11 13:05:24 +01005 select HAVE_ARCH_TRACEHOOK
Peter Zijlstrae360adb2010-10-14 14:01:34 +08006 select HAVE_IRQ_WORK
Ingo Molnarcdd6c482009-09-21 12:02:48 +02007 select HAVE_PERF_EVENTS
Catalin Marinasaf1839e2012-10-08 16:28:08 -07008 select HAVE_UID16
Thomas Gleixnerf39b02d2011-01-19 20:32:04 +01009 select HAVE_GENERIC_HARDIRQS
Thomas Gleixner3062aa52011-03-29 14:05:13 +010010 select GENERIC_IRQ_SHOW
Huang Yingdf013ff2011-07-13 13:14:22 +080011 select ARCH_HAVE_NMI_SAFE_CMPXCHG
Ben Hutchings9f13a1f2012-01-10 03:04:32 +000012 select GENERIC_CPU_DEVICES
Will Deaconc1d7e012012-07-30 14:42:46 -070013 select ARCH_WANT_IPC_PARSE_VERSION
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
Christoph Lameter66701b12007-02-10 01:43:09 -080015config ZONE_DMA
16 bool
17 default y
18
Linus Torvalds1da177e2005-04-16 15:20:36 -070019config RWSEM_GENERIC_SPINLOCK
20 bool
21 default y
22
23config RWSEM_XCHGADD_ALGORITHM
24 bool
25
Akinobu Mita1f6d7a92006-03-26 01:39:22 -080026config GENERIC_HWEIGHT
27 bool
28 default y
29
Linus Torvalds1da177e2005-04-16 15:20:36 -070030config GENERIC_CALIBRATE_DELAY
31 bool
32 default n
33
Ingo Molnar06027bd2006-02-14 13:53:15 -080034config TIME_LOW_RES
35 bool
36 default y
37
Christoph Lameter8defab32007-05-09 02:32:48 -070038config QUICKLIST
39 bool
40 default y
41
David Howellsf0d1b0b2006-12-08 02:37:49 -080042config ARCH_HAS_ILOG2_U32
43 bool
44 default y
45
46config ARCH_HAS_ILOG2_U64
47 bool
48 default y
49
H. Peter Anvinbdc80782008-02-08 04:21:26 -080050config HZ
51 int
52 default 1000
53
Linus Torvalds1da177e2005-04-16 15:20:36 -070054source "init/Kconfig"
55
Matt Helsleydc52ddc2008-10-18 20:27:21 -070056source "kernel/Kconfig.freezer"
57
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
59menu "Fujitsu FR-V system setup"
60
61config MMU
62 bool "MMU support"
63 help
64 This options switches on and off support for the FR-V MMU
65 (effectively switching between vmlinux and uClinux). Not all FR-V
66 CPUs support this. Currently only the FR451 has a sufficiently
67 featured MMU.
68
69config FRV_OUTOFLINE_ATOMIC_OPS
70 bool "Out-of-line the FRV atomic operations"
71 default n
72 help
73 Setting this option causes the FR-V atomic operations to be mostly
74 implemented out-of-line.
75
Adrian Bunk0868ff72008-02-03 15:54:28 +020076 See Documentation/frv/atomic-ops.txt for more information.
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
78config HIGHMEM
79 bool "High memory support"
80 depends on MMU
81 default y
82 help
83 If you wish to use more than 256MB of memory with your MMU based
84 system, you will need to select this option. The kernel can only see
85 the memory between 0xC0000000 and 0xD0000000 directly... everything
86 else must be kmapped.
87
88 The arch is, however, capable of supporting up to 3GB of SDRAM.
89
90config HIGHPTE
91 bool "Allocate page tables in highmem"
92 depends on HIGHMEM
93 default y
94 help
95 The VM uses one page of memory for each page table. For systems
96 with a lot of RAM, this can be wasteful of precious low memory.
97 Setting this option will put user-space page tables in high memory.
98
Dave Hansen3f22ab22005-06-23 00:07:43 -070099source "mm/Kconfig"
100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101choice
102 prompt "uClinux kernel load address"
103 depends on !MMU
104 default UCPAGE_OFFSET_C0000000
105 help
106 This option sets the base address for the uClinux kernel. The kernel
107 will rearrange the SDRAM layout to start at this address, and move
108 itself to start there. It must be greater than 0, and it must be
109 sufficiently less than 0xE0000000 that the SDRAM does not intersect
110 the I/O region.
111
112 The base address must also be aligned such that the SDRAM controller
113 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
114
115config UCPAGE_OFFSET_20000000
116 bool "0x20000000"
117
118config UCPAGE_OFFSET_40000000
119 bool "0x40000000"
120
121config UCPAGE_OFFSET_60000000
122 bool "0x60000000"
123
124config UCPAGE_OFFSET_80000000
125 bool "0x80000000"
126
127config UCPAGE_OFFSET_A0000000
128 bool "0xA0000000"
129
130config UCPAGE_OFFSET_C0000000
131 bool "0xC0000000 (Recommended)"
132
133endchoice
134
David Howells70382202008-02-04 22:29:53 -0800135config PAGE_OFFSET
136 hex
137 default 0x20000000 if UCPAGE_OFFSET_20000000
138 default 0x40000000 if UCPAGE_OFFSET_40000000
139 default 0x60000000 if UCPAGE_OFFSET_60000000
140 default 0x80000000 if UCPAGE_OFFSET_80000000
141 default 0xA0000000 if UCPAGE_OFFSET_A0000000
142 default 0xC0000000
143
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144config PROTECT_KERNEL
145 bool "Protect core kernel against userspace"
146 depends on !MMU
147 default y
148 help
149 Selecting this option causes the uClinux kernel to change the
150 permittivity of DAMPR register covering the core kernel image to
151 prevent userspace accessing the underlying memory directly.
152
153choice
154 prompt "CPU Caching mode"
155 default FRV_DEFL_CACHE_WBACK
156 help
157 This option determines the default caching mode for the kernel.
158
159 Write-Back caching mode involves the all reads and writes causing
160 the affected cacheline to be read into the cache first before being
161 operated upon. Memory is not then updated by a write until the cache
162 is filled and a cacheline needs to be displaced from the cache to
163 make room. Only at that point is it written back.
164
165 Write-Behind caching is similar to Write-Back caching, except that a
166 write won't fetch a cacheline into the cache if there isn't already
167 one there; it will write directly to memory instead.
168
169 Write-Through caching only fetches cachelines from memory on a
170 read. Writes always get written directly to memory. If the affected
171 cacheline is also in cache, it will be updated too.
172
173 The final option is to turn of caching entirely.
174
175 Note that not all CPUs support Write-Behind caching. If the CPU on
176 which the kernel is running doesn't, it'll fall back to Write-Back
177 caching.
178
179config FRV_DEFL_CACHE_WBACK
180 bool "Write-Back"
181
182config FRV_DEFL_CACHE_WBEHIND
183 bool "Write-Behind"
184
185config FRV_DEFL_CACHE_WTHRU
186 bool "Write-Through"
187
188config FRV_DEFL_CACHE_DISABLED
189 bool "Disabled"
190
191endchoice
192
193menu "CPU core support"
194
195config CPU_FR401
196 bool "Include FR401 core support"
197 depends on !MMU
198 default y
199 help
200 This enables support for the FR401, FR401A and FR403 CPUs
201
202config CPU_FR405
203 bool "Include FR405 core support"
204 depends on !MMU
205 default y
206 help
207 This enables support for the FR405 CPU
208
209config CPU_FR451
210 bool "Include FR451 core support"
211 default y
212 help
213 This enables support for the FR451 CPU
214
215config CPU_FR451_COMPILE
216 bool "Specifically compile for FR451 core"
217 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
218 default y
219 help
220 This causes appropriate flags to be passed to the compiler to
221 optimise for the FR451 CPU
222
223config CPU_FR551
224 bool "Include FR551 core support"
225 depends on !MMU
226 default y
227 help
228 This enables support for the FR555 CPU
229
230config CPU_FR551_COMPILE
231 bool "Specifically compile for FR551 core"
232 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
233 default y
234 help
235 This causes appropriate flags to be passed to the compiler to
236 optimise for the FR555 CPU
237
238config FRV_L1_CACHE_SHIFT
239 int
240 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
241 default "6" if CPU_FR551
242
243endmenu
244
245choice
246 prompt "System support"
247 default MB93091_VDK
248
249config MB93091_VDK
250 bool "MB93091 CPU board with or without motherboard"
251
252config MB93093_PDK
253 bool "MB93093 PDK unit"
254
255endchoice
256
257if MB93091_VDK
258choice
259 prompt "Motherboard support"
260 default MB93090_MB00
261
262config MB93090_MB00
263 bool "Use the MB93090-MB00 motherboard"
264 help
265 Select this option if the MB93091 CPU board is going to be used with
266 a MB93090-MB00 VDK motherboard
267
268config MB93091_NO_MB
269 bool "Use standalone"
270 help
271 Select this option if the MB93091 CPU board is going to be used
272 without a motherboard
273
274endchoice
275endif
276
David Howells1bcbba32006-09-25 23:32:04 -0700277config FUJITSU_MB93493
278 bool "MB93493 Multimedia chip"
279 help
280 Select this option if the MB93493 multimedia chip is going to be
281 used.
282
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283choice
284 prompt "GP-Relative data support"
285 default GPREL_DATA_8
286 help
287 This option controls what data, if any, should be placed in the GP
288 relative data sections. Using this means that the compiler can
289 generate accesses to the data using GR16-relative addressing which
290 is faster than absolute instructions and saves space (2 instructions
291 per access).
292
293 However, the GPREL region is limited in size because the immediate
294 value used in the load and store instructions is limited to a 12-bit
295 signed number.
296
297 So if the linker starts complaining that accesses to GPREL data are
298 out of range, try changing this option from the default.
299
300 Note that modules will always be compiled with this feature disabled
301 as the module data will not be in range of the GP base address.
302
303config GPREL_DATA_8
304 bool "Put data objects of up to 8 bytes into GP-REL"
305
306config GPREL_DATA_4
307 bool "Put data objects of up to 4 bytes into GP-REL"
308
309config GPREL_DATA_NONE
310 bool "Don't use GP-REL"
311
312endchoice
313
David Howellsf8aec752006-01-08 01:01:23 -0800314config FRV_ONCPU_SERIAL
315 bool "Use on-CPU serial ports"
316 select SERIAL_8250
317 default y
318
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319config PCI
320 bool "Use PCI"
321 depends on MB93090_MB00
322 default y
Michael S. Tsirkin53224182011-11-29 21:20:06 +0200323 select GENERIC_PCI_IOMAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 help
325 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
326 onboard. If you have one of these boards and you wish to use the PCI
327 facilities, say Y here.
328
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329config RESERVE_DMA_COHERENT
330 bool "Reserve DMA coherent memory"
331 depends on PCI && !MMU
332 default y
333 help
334 Many PCI drivers require access to uncached memory for DMA device
335 communications (such as is done with some Ethernet buffer rings). If
336 a fully featured MMU is available, this can be done through page
337 table settings, but if not, a region has to be set aside and marked
338 with a special DAMPR register.
339
340 Setting this option causes uClinux to set aside a portion of the
341 available memory for use in this manner. The memory will then be
342 unavailable for normal kernel use.
343
344source "drivers/pci/Kconfig"
345
David Howells7a758312006-01-08 01:01:22 -0800346source "drivers/pcmcia/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348menu "Power management options"
Johannes Bergf4cb5702007-12-08 02:14:00 +0100349
350config ARCH_SUSPEND_POSSIBLE
351 def_bool y
Johannes Bergf4cb5702007-12-08 02:14:00 +0100352
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353source kernel/power/Kconfig
354endmenu
355
356endmenu
357
358
359menu "Executable formats"
360
361source "fs/Kconfig.binfmt"
362
363endmenu
364
Sam Ravnborgd5950b42005-07-11 21:03:49 -0700365source "net/Kconfig"
366
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367source "drivers/Kconfig"
368
369source "fs/Kconfig"
370
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371source "arch/frv/Kconfig.debug"
372
373source "security/Kconfig"
374
375source "crypto/Kconfig"
376
377source "lib/Kconfig"