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Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * DaVinci serial device definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_SERIAL_H
12#define __ASM_ARCH_SERIAL_H
13
Cyril Chemparathydc2eb762010-05-18 12:51:17 -040014#include <asm/memory.h>
15
Hemant Pedanekar9eb71152009-06-24 10:15:47 +053016#include <mach/hardware.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010017
Cyril Chemparathydc2eb762010-05-18 12:51:17 -040018/*
19 * Stolen area that contains debug uart physical and virtual addresses. These
20 * addresses are filled in by the uncompress.h code, and are used by the debug
21 * macros in debug-macro.S.
22 *
23 * This area sits just below the page tables (see arch/arm/kernel/head.S).
Nicolas Pitree020fe32011-09-01 20:32:21 -040024 * We define it as a relative offset from start of usable RAM.
Cyril Chemparathydc2eb762010-05-18 12:51:17 -040025 */
Nicolas Pitree020fe32011-09-01 20:32:21 -040026#define DAVINCI_UART_INFO_OFS 0x3ff8
Cyril Chemparathydc2eb762010-05-18 12:51:17 -040027
Kevin Hilman617b9252009-04-14 08:04:26 -050028#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
29#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
30#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
31
Mark A. Greer55c79a42009-06-03 18:36:54 -070032#define DA8XX_UART0_BASE (IO_PHYS + 0x042000)
33#define DA8XX_UART1_BASE (IO_PHYS + 0x10c000)
34#define DA8XX_UART2_BASE (IO_PHYS + 0x10d000)
35
Cyril Chemparathy38db0502010-05-18 12:51:18 -040036#define TNETV107X_UART0_BASE 0x08108100
37#define TNETV107X_UART1_BASE 0x08088400
38#define TNETV107X_UART2_BASE 0x08108300
39
40#define TNETV107X_UART0_VIRT IOMEM(0xfee08100)
41#define TNETV107X_UART1_VIRT IOMEM(0xfed88400)
42#define TNETV107X_UART2_VIRT IOMEM(0xfee08300)
43
Kevin Hilman617b9252009-04-14 08:04:26 -050044/* DaVinci UART register offsets */
45#define UART_DAVINCI_PWREMU 0x0c
46#define UART_DM646X_SCR 0x10
47#define UART_DM646X_SCR_TX_WATERMARK 0x08
48
Cyril Chemparathydc2eb762010-05-18 12:51:17 -040049#ifndef __ASSEMBLY__
Kevin Hilman617b9252009-04-14 08:04:26 -050050struct davinci_uart_config {
51 /* Bit field of UARTs present; bit 0 --> UART1 */
52 unsigned int enabled_uarts;
53};
54
Mark A. Greer65e866a2009-03-18 12:36:08 -050055extern int davinci_serial_init(struct davinci_uart_config *);
Cyril Chemparathydc2eb762010-05-18 12:51:17 -040056#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010057
58#endif /* __ASM_ARCH_SERIAL_H */