Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 1 | /* |
| 2 | * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. |
| 3 | * |
| 4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * Copyright (c) 2012 Linaro Ltd |
| 7 | * http://www.linaro.org |
| 8 | * |
| 9 | * Author: Thomas Abraham <thomas.ab@samsung.com> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | */ |
| 16 | |
| 17 | #ifndef __PINCTRL_SAMSUNG_H |
| 18 | #define __PINCTRL_SAMSUNG_H |
| 19 | |
| 20 | #include <linux/pinctrl/pinctrl.h> |
| 21 | #include <linux/pinctrl/pinmux.h> |
| 22 | #include <linux/pinctrl/pinconf.h> |
| 23 | #include <linux/pinctrl/consumer.h> |
| 24 | #include <linux/pinctrl/machine.h> |
| 25 | |
Tomasz Figa | d3a7b9e | 2012-10-11 10:11:17 +0200 | [diff] [blame] | 26 | #include <linux/gpio.h> |
| 27 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 28 | /* pinmux function number for pin as gpio output line */ |
| 29 | #define FUNC_OUTPUT 0x1 |
| 30 | |
| 31 | /** |
| 32 | * enum pincfg_type - possible pin configuration types supported. |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 33 | * @PINCFG_TYPE_FUNC: Function configuration. |
| 34 | * @PINCFG_TYPE_DAT: Pin value configuration. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 35 | * @PINCFG_TYPE_PUD: Pull up/down configuration. |
| 36 | * @PINCFG_TYPE_DRV: Drive strength configuration. |
| 37 | * @PINCFG_TYPE_CON_PDN: Pin function in power down mode. |
| 38 | * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode. |
| 39 | */ |
| 40 | enum pincfg_type { |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 41 | PINCFG_TYPE_FUNC, |
| 42 | PINCFG_TYPE_DAT, |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 43 | PINCFG_TYPE_PUD, |
| 44 | PINCFG_TYPE_DRV, |
| 45 | PINCFG_TYPE_CON_PDN, |
| 46 | PINCFG_TYPE_PUD_PDN, |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 47 | |
| 48 | PINCFG_TYPE_NUM |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 49 | }; |
| 50 | |
| 51 | /* |
| 52 | * pin configuration (pull up/down and drive strength) type and its value are |
| 53 | * packed together into a 16-bits. The upper 8-bits represent the configuration |
| 54 | * type and the lower 8-bits hold the value of the configuration type. |
| 55 | */ |
| 56 | #define PINCFG_TYPE_MASK 0xFF |
| 57 | #define PINCFG_VALUE_SHIFT 8 |
| 58 | #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT) |
| 59 | #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type) |
| 60 | #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK) |
| 61 | #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \ |
| 62 | PINCFG_VALUE_SHIFT) |
| 63 | /** |
| 64 | * enum eint_type - possible external interrupt types. |
| 65 | * @EINT_TYPE_NONE: bank does not support external interrupts |
| 66 | * @EINT_TYPE_GPIO: bank supportes external gpio interrupts |
| 67 | * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 68 | * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 69 | * |
| 70 | * Samsung GPIO controller groups all the available pins into banks. The pins |
| 71 | * in a pin bank can support external gpio interrupts or external wakeup |
| 72 | * interrupts or no interrupts at all. From a software perspective, the only |
| 73 | * difference between external gpio and external wakeup interrupts is that |
| 74 | * the wakeup interrupts can additionally wakeup the system if it is in |
| 75 | * suspended state. |
| 76 | */ |
| 77 | enum eint_type { |
| 78 | EINT_TYPE_NONE, |
| 79 | EINT_TYPE_GPIO, |
| 80 | EINT_TYPE_WKUP, |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 81 | EINT_TYPE_WKUP_MUX, |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 82 | }; |
| 83 | |
| 84 | /* maximum length of a pin in pin descriptor (example: "gpa0-0") */ |
| 85 | #define PIN_NAME_LENGTH 10 |
| 86 | |
| 87 | #define PIN_GROUP(n, p, f) \ |
| 88 | { \ |
| 89 | .name = n, \ |
| 90 | .pins = p, \ |
| 91 | .num_pins = ARRAY_SIZE(p), \ |
| 92 | .func = f \ |
| 93 | } |
| 94 | |
| 95 | #define PMX_FUNC(n, g) \ |
| 96 | { \ |
| 97 | .name = n, \ |
| 98 | .groups = g, \ |
| 99 | .num_groups = ARRAY_SIZE(g), \ |
| 100 | } |
| 101 | |
| 102 | struct samsung_pinctrl_drv_data; |
| 103 | |
| 104 | /** |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 105 | * struct samsung_pin_bank_type: pin bank type description |
| 106 | * @fld_width: widths of configuration bitfields (0 if unavailable) |
Tomasz Figa | 43fc9e7 | 2013-03-18 22:31:53 +0100 | [diff] [blame] | 107 | * @reg_offset: offsets of configuration registers (don't care of width is 0) |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 108 | */ |
| 109 | struct samsung_pin_bank_type { |
| 110 | u8 fld_width[PINCFG_TYPE_NUM]; |
Tomasz Figa | 43fc9e7 | 2013-03-18 22:31:53 +0100 | [diff] [blame] | 111 | u8 reg_offset[PINCFG_TYPE_NUM]; |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 112 | }; |
| 113 | |
| 114 | /** |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 115 | * struct samsung_pin_bank: represent a controller pin-bank. |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 116 | * @type: type of the bank (register offsets and bitfield widths) |
Sachin Kamat | 88f2324 | 2012-12-10 09:45:55 +0900 | [diff] [blame] | 117 | * @pctl_offset: starting offset of the pin-bank registers. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 118 | * @pin_base: starting pin number of the bank. |
| 119 | * @nr_pins: number of pins included in this bank. |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 120 | * @eint_func: function to set in CON register to configure pin as EINT. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 121 | * @eint_type: type of the external interrupt supported by the bank. |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 122 | * @eint_mask: bit mask of pins which support EINT function. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 123 | * @name: name to be prefixed for each pin in this pin bank. |
Tomasz Figa | ab66378 | 2012-10-11 10:11:13 +0200 | [diff] [blame] | 124 | * @of_node: OF node of the bank. |
Tomasz Figa | 6defe9a | 2012-10-11 10:11:14 +0200 | [diff] [blame] | 125 | * @drvdata: link to controller driver data |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 126 | * @irq_domain: IRQ domain of the bank. |
Tomasz Figa | d3a7b9e | 2012-10-11 10:11:17 +0200 | [diff] [blame] | 127 | * @gpio_chip: GPIO chip of the bank. |
| 128 | * @grange: linux gpio pin range supported by this bank. |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 129 | * @slock: spinlock protecting bank registers |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 130 | */ |
| 131 | struct samsung_pin_bank { |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 132 | struct samsung_pin_bank_type *type; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 133 | u32 pctl_offset; |
| 134 | u32 pin_base; |
| 135 | u8 nr_pins; |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 136 | u8 eint_func; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 137 | enum eint_type eint_type; |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 138 | u32 eint_mask; |
Tomasz Figa | 1b6056d | 2012-10-11 10:11:15 +0200 | [diff] [blame] | 139 | u32 eint_offset; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 140 | char *name; |
Tomasz Figa | ab66378 | 2012-10-11 10:11:13 +0200 | [diff] [blame] | 141 | struct device_node *of_node; |
Tomasz Figa | 6defe9a | 2012-10-11 10:11:14 +0200 | [diff] [blame] | 142 | struct samsung_pinctrl_drv_data *drvdata; |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 143 | struct irq_domain *irq_domain; |
Tomasz Figa | d3a7b9e | 2012-10-11 10:11:17 +0200 | [diff] [blame] | 144 | struct gpio_chip gpio_chip; |
| 145 | struct pinctrl_gpio_range grange; |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 146 | spinlock_t slock; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 147 | }; |
| 148 | |
| 149 | /** |
| 150 | * struct samsung_pin_ctrl: represent a pin controller. |
| 151 | * @pin_banks: list of pin banks included in this controller. |
| 152 | * @nr_banks: number of pin banks. |
| 153 | * @base: starting system wide pin number. |
| 154 | * @nr_pins: number of pins supported by the controller. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 155 | * @geint_con: offset of the ext-gpio controller registers. |
| 156 | * @geint_mask: offset of the ext-gpio interrupt mask registers. |
| 157 | * @geint_pend: offset of the ext-gpio interrupt pending registers. |
| 158 | * @weint_con: offset of the ext-wakeup controller registers. |
| 159 | * @weint_mask: offset of the ext-wakeup interrupt mask registers. |
| 160 | * @weint_pend: offset of the ext-wakeup interrupt pending registers. |
| 161 | * @svc: offset of the interrupt service register. |
| 162 | * @eint_gpio_init: platform specific callback to setup the external gpio |
| 163 | * interrupts for the controller. |
| 164 | * @eint_wkup_init: platform specific callback to setup the external wakeup |
| 165 | * interrupts for the controller. |
| 166 | * @label: for debug information. |
| 167 | */ |
| 168 | struct samsung_pin_ctrl { |
| 169 | struct samsung_pin_bank *pin_banks; |
| 170 | u32 nr_banks; |
| 171 | |
| 172 | u32 base; |
| 173 | u32 nr_pins; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 174 | |
| 175 | u32 geint_con; |
| 176 | u32 geint_mask; |
| 177 | u32 geint_pend; |
| 178 | |
| 179 | u32 weint_con; |
| 180 | u32 weint_mask; |
| 181 | u32 weint_pend; |
| 182 | |
| 183 | u32 svc; |
| 184 | |
| 185 | int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *); |
| 186 | int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *); |
| 187 | char *label; |
| 188 | }; |
| 189 | |
| 190 | /** |
| 191 | * struct samsung_pinctrl_drv_data: wrapper for holding driver data together. |
| 192 | * @virt_base: register base address of the controller. |
| 193 | * @dev: device instance representing the controller. |
| 194 | * @irq: interrpt number used by the controller to notify gpio interrupts. |
| 195 | * @ctrl: pin controller instance managed by the driver. |
| 196 | * @pctl: pin controller descriptor registered with the pinctrl subsystem. |
| 197 | * @pctl_dev: cookie representing pinctrl device instance. |
| 198 | * @pin_groups: list of pin groups available to the driver. |
| 199 | * @nr_groups: number of such pin groups. |
| 200 | * @pmx_functions: list of pin functions available to the driver. |
| 201 | * @nr_function: number of such pin functions. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 202 | */ |
| 203 | struct samsung_pinctrl_drv_data { |
| 204 | void __iomem *virt_base; |
| 205 | struct device *dev; |
| 206 | int irq; |
| 207 | |
| 208 | struct samsung_pin_ctrl *ctrl; |
| 209 | struct pinctrl_desc pctl; |
| 210 | struct pinctrl_dev *pctl_dev; |
| 211 | |
| 212 | const struct samsung_pin_group *pin_groups; |
| 213 | unsigned int nr_groups; |
| 214 | const struct samsung_pmx_func *pmx_functions; |
| 215 | unsigned int nr_functions; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 216 | }; |
| 217 | |
| 218 | /** |
| 219 | * struct samsung_pin_group: represent group of pins of a pinmux function. |
| 220 | * @name: name of the pin group, used to lookup the group. |
| 221 | * @pins: the pins included in this group. |
| 222 | * @num_pins: number of pins included in this group. |
| 223 | * @func: the function number to be programmed when selected. |
| 224 | */ |
| 225 | struct samsung_pin_group { |
| 226 | const char *name; |
| 227 | const unsigned int *pins; |
| 228 | u8 num_pins; |
| 229 | u8 func; |
| 230 | }; |
| 231 | |
| 232 | /** |
| 233 | * struct samsung_pmx_func: represent a pin function. |
| 234 | * @name: name of the pin function, used to lookup the function. |
| 235 | * @groups: one or more names of pin groups that provide this function. |
| 236 | * @num_groups: number of groups included in @groups. |
| 237 | */ |
| 238 | struct samsung_pmx_func { |
| 239 | const char *name; |
| 240 | const char **groups; |
| 241 | u8 num_groups; |
| 242 | }; |
| 243 | |
| 244 | /* list of all exported SoC specific data */ |
| 245 | extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; |
Tomasz Figa | 6edc794 | 2012-11-07 08:44:59 +0900 | [diff] [blame] | 246 | extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; |
Thomas Abraham | f67faf4 | 2012-12-28 10:37:27 -0800 | [diff] [blame] | 247 | extern struct samsung_pin_ctrl exynos5250_pin_ctrl[]; |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 248 | extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[]; |
Heiko Stuebner | af99a75 | 2013-05-21 00:56:13 +0900 | [diff] [blame^] | 249 | extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; |
| 250 | extern struct samsung_pin_ctrl s3c2416_pin_ctrl[]; |
| 251 | extern struct samsung_pin_ctrl s3c2440_pin_ctrl[]; |
| 252 | extern struct samsung_pin_ctrl s3c2450_pin_ctrl[]; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 253 | |
| 254 | #endif /* __PINCTRL_SAMSUNG_H */ |