| Michael Buesch | f398f02 | 2006-02-23 21:15:39 +0100 | [diff] [blame] | 1 | #ifndef BCM43xx_XMIT_H_ |
| 2 | #define BCM43xx_XMIT_H_ |
| 3 | |
| 4 | #include "bcm43xx_main.h" |
| 5 | |
| 6 | |
| 7 | #define _bcm43xx_declare_plcp_hdr(size) \ |
| 8 | struct bcm43xx_plcp_hdr##size { \ |
| 9 | union { \ |
| 10 | __le32 data; \ |
| 11 | __u8 raw[size]; \ |
| 12 | } __attribute__((__packed__)); \ |
| 13 | } __attribute__((__packed__)) |
| 14 | |
| 15 | /* struct bcm43xx_plcp_hdr4 */ |
| 16 | _bcm43xx_declare_plcp_hdr(4); |
| 17 | /* struct bcm43xx_plcp_hdr6 */ |
| 18 | _bcm43xx_declare_plcp_hdr(6); |
| 19 | |
| 20 | #undef _bcm43xx_declare_plcp_hdr |
| 21 | |
| 22 | /* Device specific TX header. To be prepended to TX frames. */ |
| 23 | struct bcm43xx_txhdr { |
| 24 | union { |
| 25 | struct { |
| 26 | __le16 flags; |
| 27 | __le16 wsec_rate; |
| 28 | __le16 frame_control; |
| 29 | u16 unknown_zeroed_0; |
| 30 | __le16 control; |
| 31 | u8 wep_iv[10]; |
| 32 | u8 unknown_wsec_tkip_data[3]; //FIXME |
| 33 | PAD_BYTES(3); |
| 34 | u8 mac1[6]; |
| 35 | u16 unknown_zeroed_1; |
| 36 | struct bcm43xx_plcp_hdr4 rts_cts_fallback_plcp; |
| 37 | __le16 rts_cts_dur_fallback; |
| 38 | struct bcm43xx_plcp_hdr4 fallback_plcp; |
| 39 | __le16 fallback_dur_id; |
| 40 | PAD_BYTES(2); |
| 41 | __le16 cookie; |
| 42 | __le16 unknown_scb_stuff; //FIXME |
| 43 | struct bcm43xx_plcp_hdr6 rts_cts_plcp; |
| 44 | __le16 rts_cts_frame_control; |
| 45 | __le16 rts_cts_dur; |
| 46 | u8 rts_cts_mac1[6]; |
| 47 | u8 rts_cts_mac2[6]; |
| 48 | PAD_BYTES(2); |
| 49 | struct bcm43xx_plcp_hdr6 plcp; |
| 50 | } __attribute__((__packed__)); |
| 51 | u8 raw[82]; |
| 52 | } __attribute__((__packed__)); |
| 53 | } __attribute__((__packed__)); |
| 54 | |
| 55 | /* Values/Masks for the device TX header */ |
| 56 | #define BCM43xx_TXHDRFLAG_EXPECTACK 0x0001 |
| 57 | #define BCM43xx_TXHDRFLAG_RTSCTS 0x0002 |
| 58 | #define BCM43xx_TXHDRFLAG_RTS 0x0004 |
| 59 | #define BCM43xx_TXHDRFLAG_FIRSTFRAGMENT 0x0008 |
| 60 | #define BCM43xx_TXHDRFLAG_DESTPSMODE 0x0020 |
| 61 | #define BCM43xx_TXHDRFLAG_RTSCTS_OFDM 0x0080 |
| 62 | #define BCM43xx_TXHDRFLAG_FALLBACKOFDM 0x0100 |
| 63 | #define BCM43xx_TXHDRFLAG_RTSCTSFALLBACK_OFDM 0x0200 |
| 64 | #define BCM43xx_TXHDRFLAG_CTS 0x0400 |
| 65 | #define BCM43xx_TXHDRFLAG_FRAMEBURST 0x0800 |
| 66 | |
| 67 | #define BCM43xx_TXHDRCTL_OFDM 0x0001 |
| 68 | #define BCM43xx_TXHDRCTL_SHORT_PREAMBLE 0x0010 |
| 69 | #define BCM43xx_TXHDRCTL_ANTENNADIV_MASK 0x0030 |
| 70 | #define BCM43xx_TXHDRCTL_ANTENNADIV_SHIFT 8 |
| 71 | |
| 72 | #define BCM43xx_TXHDR_RATE_MASK 0x0F00 |
| 73 | #define BCM43xx_TXHDR_RATE_SHIFT 8 |
| 74 | #define BCM43xx_TXHDR_RTSRATE_MASK 0xF000 |
| 75 | #define BCM43xx_TXHDR_RTSRATE_SHIFT 12 |
| 76 | #define BCM43xx_TXHDR_WSEC_KEYINDEX_MASK 0x00F0 |
| 77 | #define BCM43xx_TXHDR_WSEC_KEYINDEX_SHIFT 4 |
| 78 | #define BCM43xx_TXHDR_WSEC_ALGO_MASK 0x0003 |
| 79 | #define BCM43xx_TXHDR_WSEC_ALGO_SHIFT 0 |
| 80 | |
| 81 | void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm, |
| 82 | struct bcm43xx_txhdr *txhdr, |
| 83 | const unsigned char *fragment_data, |
| 84 | const unsigned int fragment_len, |
| 85 | const int is_first_fragment, |
| 86 | const u16 cookie); |
| 87 | |
| 88 | /* RX header as received from the hardware. */ |
| 89 | struct bcm43xx_rxhdr { |
| Jean Delvare | c03983a | 2007-10-19 23:22:55 +0200 | [diff] [blame] | 90 | /* Frame Length. Must be generated explicitly in PIO mode. */ |
| Michael Buesch | f398f02 | 2006-02-23 21:15:39 +0100 | [diff] [blame] | 91 | __le16 frame_length; |
| 92 | PAD_BYTES(2); |
| 93 | /* Flags field 1 */ |
| 94 | __le16 flags1; |
| 95 | u8 rssi; |
| 96 | u8 signal_quality; |
| 97 | PAD_BYTES(2); |
| 98 | /* Flags field 3 */ |
| 99 | __le16 flags3; |
| 100 | /* Flags field 2 */ |
| 101 | __le16 flags2; |
| 102 | /* Lower 16bits of the TSF at the time the frame started. */ |
| 103 | __le16 mactime; |
| 104 | PAD_BYTES(14); |
| 105 | } __attribute__((__packed__)); |
| 106 | |
| 107 | #define BCM43xx_RXHDR_FLAGS1_OFDM (1 << 0) |
| 108 | /*#define BCM43xx_RXHDR_FLAGS1_SIGNAL??? (1 << 3) FIXME */ |
| 109 | #define BCM43xx_RXHDR_FLAGS1_SHORTPREAMBLE (1 << 7) |
| 110 | #define BCM43xx_RXHDR_FLAGS1_2053RSSIADJ (1 << 14) |
| 111 | |
| 112 | #define BCM43xx_RXHDR_FLAGS2_INVALIDFRAME (1 << 0) |
| 113 | #define BCM43xx_RXHDR_FLAGS2_TYPE2FRAME (1 << 2) |
| 114 | /*FIXME: WEP related flags */ |
| 115 | |
| 116 | #define BCM43xx_RXHDR_FLAGS3_2050RSSIADJ (1 << 10) |
| 117 | |
| 118 | /* Transmit Status as received from the hardware. */ |
| 119 | struct bcm43xx_hwxmitstatus { |
| 120 | PAD_BYTES(4); |
| 121 | __le16 cookie; |
| 122 | u8 flags; |
| 123 | u8 cnt1:4, |
| 124 | cnt2:4; |
| 125 | PAD_BYTES(2); |
| 126 | __le16 seq; |
| 127 | __le16 unknown; //FIXME |
| 128 | } __attribute__((__packed__)); |
| 129 | |
| 130 | /* Transmit Status in CPU byteorder. */ |
| 131 | struct bcm43xx_xmitstatus { |
| 132 | u16 cookie; |
| 133 | u8 flags; |
| 134 | u8 cnt1:4, |
| 135 | cnt2:4; |
| 136 | u16 seq; |
| 137 | u16 unknown; //FIXME |
| 138 | }; |
| 139 | |
| Michael Buesch | 1d3c292 | 2007-02-06 00:16:35 -0600 | [diff] [blame] | 140 | #define BCM43xx_TXSTAT_FLAG_AMPDU 0x10 |
| 141 | #define BCM43xx_TXSTAT_FLAG_INTER 0x20 |
| Michael Buesch | f398f02 | 2006-02-23 21:15:39 +0100 | [diff] [blame] | 142 | |
| 143 | u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate); |
| 144 | u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate); |
| 145 | |
| 146 | int bcm43xx_rx(struct bcm43xx_private *bcm, |
| 147 | struct sk_buff *skb, |
| 148 | struct bcm43xx_rxhdr *rxhdr); |
| 149 | |
| 150 | #endif /* BCM43xx_XMIT_H_ */ |