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Linus Walleijaa958f52009-09-22 16:46:24 -07001/*
2 * Copyright (C) 2007-2009 ST-Ericsson AB
3 * License terms: GNU General Public License (GPL) version 2
4 * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC.
5 * Author: Linus Walleij <linus.walleij@stericsson.com>
6 * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net>
7 * Copyright 2006 (c) MontaVista Software, Inc.
8 */
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/rtc.h>
12#include <linux/clk.h>
13#include <linux/interrupt.h>
14#include <linux/pm.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090017#include <linux/slab.h>
Linus Walleijaa958f52009-09-22 16:46:24 -070018
19/*
20 * Registers in the COH 901 331
21 */
22/* Alarm value 32bit (R/W) */
23#define COH901331_ALARM 0x00U
24/* Used to set current time 32bit (R/W) */
25#define COH901331_SET_TIME 0x04U
26/* Indication if current time is valid 32bit (R/-) */
27#define COH901331_VALID 0x08U
28/* Read the current time 32bit (R/-) */
29#define COH901331_CUR_TIME 0x0cU
30/* Event register for the "alarm" interrupt */
31#define COH901331_IRQ_EVENT 0x10U
32/* Mask register for the "alarm" interrupt */
33#define COH901331_IRQ_MASK 0x14U
34/* Force register for the "alarm" interrupt */
35#define COH901331_IRQ_FORCE 0x18U
36
37/*
38 * Reference to RTC block clock
39 * Notice that the frequent clk_enable()/clk_disable() on this
40 * clock is mainly to be able to turn on/off other clocks in the
41 * hierarchy as needed, the RTC clock is always on anyway.
42 */
43struct coh901331_port {
44 struct rtc_device *rtc;
45 struct clk *clk;
46 u32 phybase;
47 u32 physize;
48 void __iomem *virtbase;
49 int irq;
Jingoo Han62068e22013-04-29 16:21:00 -070050#ifdef CONFIG_PM_SLEEP
Linus Walleijaa958f52009-09-22 16:46:24 -070051 u32 irqmaskstore;
52#endif
53};
54
55static irqreturn_t coh901331_interrupt(int irq, void *data)
56{
57 struct coh901331_port *rtap = data;
58
59 clk_enable(rtap->clk);
60 /* Ack IRQ */
61 writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
Linus Walleij378ce742009-11-14 01:03:24 +010062 /*
63 * Disable the interrupt. This is necessary because
64 * the RTC lives on a lower-clocked line and will
65 * not release the IRQ line until after a few (slower)
66 * clock cycles. The interrupt will be re-enabled when
67 * a new alarm is set anyway.
68 */
69 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
Linus Walleijaa958f52009-09-22 16:46:24 -070070 clk_disable(rtap->clk);
Linus Walleij378ce742009-11-14 01:03:24 +010071
Linus Walleijaa958f52009-09-22 16:46:24 -070072 /* Set alarm flag */
73 rtc_update_irq(rtap->rtc, 1, RTC_AF);
74
75 return IRQ_HANDLED;
76}
77
78static int coh901331_read_time(struct device *dev, struct rtc_time *tm)
79{
80 struct coh901331_port *rtap = dev_get_drvdata(dev);
81
82 clk_enable(rtap->clk);
83 /* Check if the time is valid */
84 if (readl(rtap->virtbase + COH901331_VALID)) {
85 rtc_time_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm);
86 clk_disable(rtap->clk);
87 return rtc_valid_tm(tm);
88 }
89 clk_disable(rtap->clk);
90 return -EINVAL;
91}
92
93static int coh901331_set_mmss(struct device *dev, unsigned long secs)
94{
95 struct coh901331_port *rtap = dev_get_drvdata(dev);
96
97 clk_enable(rtap->clk);
98 writel(secs, rtap->virtbase + COH901331_SET_TIME);
99 clk_disable(rtap->clk);
100
101 return 0;
102}
103
104static int coh901331_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
105{
106 struct coh901331_port *rtap = dev_get_drvdata(dev);
107
108 clk_enable(rtap->clk);
109 rtc_time_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time);
110 alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U;
111 alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U;
112 clk_disable(rtap->clk);
113
114 return 0;
115}
116
117static int coh901331_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
118{
119 struct coh901331_port *rtap = dev_get_drvdata(dev);
120 unsigned long time;
121
122 rtc_tm_to_time(&alarm->time, &time);
123 clk_enable(rtap->clk);
124 writel(time, rtap->virtbase + COH901331_ALARM);
125 writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK);
126 clk_disable(rtap->clk);
127
128 return 0;
129}
130
131static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled)
132{
133 struct coh901331_port *rtap = dev_get_drvdata(dev);
134
135 clk_enable(rtap->clk);
136 if (enabled)
137 writel(1, rtap->virtbase + COH901331_IRQ_MASK);
138 else
139 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
140 clk_disable(rtap->clk);
Linus Walleij378ce742009-11-14 01:03:24 +0100141
142 return 0;
Linus Walleijaa958f52009-09-22 16:46:24 -0700143}
144
145static struct rtc_class_ops coh901331_ops = {
146 .read_time = coh901331_read_time,
147 .set_mmss = coh901331_set_mmss,
148 .read_alarm = coh901331_read_alarm,
149 .set_alarm = coh901331_set_alarm,
150 .alarm_irq_enable = coh901331_alarm_irq_enable,
151};
152
153static int __exit coh901331_remove(struct platform_device *pdev)
154{
Jingoo Han3a028932013-07-03 15:07:12 -0700155 struct coh901331_port *rtap = platform_get_drvdata(pdev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700156
Jingoo Han7fcbf5f2013-07-03 15:06:16 -0700157 if (rtap)
Linus Walleij8384dfe2012-07-30 14:41:31 -0700158 clk_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700159
160 return 0;
161}
162
163
164static int __init coh901331_probe(struct platform_device *pdev)
165{
166 int ret;
167 struct coh901331_port *rtap;
168 struct resource *res;
169
Linus Walleij36ac1d242012-07-30 14:41:32 -0700170 rtap = devm_kzalloc(&pdev->dev,
171 sizeof(struct coh901331_port), GFP_KERNEL);
Linus Walleijaa958f52009-09-22 16:46:24 -0700172 if (!rtap)
173 return -ENOMEM;
174
175 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Linus Walleij36ac1d242012-07-30 14:41:32 -0700176 if (!res)
177 return -ENOENT;
178
Linus Walleijaa958f52009-09-22 16:46:24 -0700179 rtap->phybase = res->start;
180 rtap->physize = resource_size(res);
181
Linus Walleij36ac1d242012-07-30 14:41:32 -0700182 if (devm_request_mem_region(&pdev->dev, rtap->phybase, rtap->physize,
183 "rtc-coh901331") == NULL)
184 return -EBUSY;
Linus Walleijaa958f52009-09-22 16:46:24 -0700185
Linus Walleij36ac1d242012-07-30 14:41:32 -0700186 rtap->virtbase = devm_ioremap(&pdev->dev, rtap->phybase, rtap->physize);
187 if (!rtap->virtbase)
188 return -ENOMEM;
Linus Walleijaa958f52009-09-22 16:46:24 -0700189
190 rtap->irq = platform_get_irq(pdev, 0);
Linus Walleij36ac1d242012-07-30 14:41:32 -0700191 if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0,
192 "RTC COH 901 331 Alarm", rtap))
193 return -EIO;
Linus Walleijaa958f52009-09-22 16:46:24 -0700194
Jingoo Han3b759d72013-02-21 16:45:38 -0800195 rtap->clk = devm_clk_get(&pdev->dev, NULL);
Linus Walleijaa958f52009-09-22 16:46:24 -0700196 if (IS_ERR(rtap->clk)) {
197 ret = PTR_ERR(rtap->clk);
198 dev_err(&pdev->dev, "could not get clock\n");
Linus Walleij36ac1d242012-07-30 14:41:32 -0700199 return ret;
Linus Walleijaa958f52009-09-22 16:46:24 -0700200 }
201
202 /* We enable/disable the clock only to assure it works */
Linus Walleij8384dfe2012-07-30 14:41:31 -0700203 ret = clk_prepare_enable(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700204 if (ret) {
205 dev_err(&pdev->dev, "could not enable clock\n");
Jingoo Han3b759d72013-02-21 16:45:38 -0800206 return ret;
Linus Walleijaa958f52009-09-22 16:46:24 -0700207 }
208 clk_disable(rtap->clk);
209
Linus Walleij9cf3b5f2011-04-17 20:32:19 +0200210 platform_set_drvdata(pdev, rtap);
Jingoo Han94b60db2013-04-29 16:18:56 -0700211 rtap->rtc = devm_rtc_device_register(&pdev->dev, "coh901331",
212 &coh901331_ops, THIS_MODULE);
Linus Walleijaa958f52009-09-22 16:46:24 -0700213 if (IS_ERR(rtap->rtc)) {
214 ret = PTR_ERR(rtap->rtc);
215 goto out_no_rtc;
216 }
217
Linus Walleijaa958f52009-09-22 16:46:24 -0700218 return 0;
219
220 out_no_rtc:
Linus Walleij8384dfe2012-07-30 14:41:31 -0700221 clk_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700222 return ret;
223}
224
Jingoo Han62068e22013-04-29 16:21:00 -0700225#ifdef CONFIG_PM_SLEEP
226static int coh901331_suspend(struct device *dev)
Linus Walleijaa958f52009-09-22 16:46:24 -0700227{
Jingoo Han62068e22013-04-29 16:21:00 -0700228 struct coh901331_port *rtap = dev_get_drvdata(dev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700229
230 /*
231 * If this RTC alarm will be used for waking the system up,
232 * don't disable it of course. Else we just disable the alarm
233 * and await suspension.
234 */
Jingoo Han62068e22013-04-29 16:21:00 -0700235 if (device_may_wakeup(dev)) {
Linus Walleijaa958f52009-09-22 16:46:24 -0700236 enable_irq_wake(rtap->irq);
237 } else {
238 clk_enable(rtap->clk);
239 rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK);
240 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
241 clk_disable(rtap->clk);
242 }
Linus Walleij8384dfe2012-07-30 14:41:31 -0700243 clk_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700244 return 0;
245}
246
Jingoo Han62068e22013-04-29 16:21:00 -0700247static int coh901331_resume(struct device *dev)
Linus Walleijaa958f52009-09-22 16:46:24 -0700248{
Jingoo Han62068e22013-04-29 16:21:00 -0700249 struct coh901331_port *rtap = dev_get_drvdata(dev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700250
Linus Walleij8384dfe2012-07-30 14:41:31 -0700251 clk_prepare(rtap->clk);
Jingoo Han62068e22013-04-29 16:21:00 -0700252 if (device_may_wakeup(dev)) {
Linus Walleijaa958f52009-09-22 16:46:24 -0700253 disable_irq_wake(rtap->irq);
James Hogan5a98c042010-03-05 13:44:31 -0800254 } else {
Linus Walleijaa958f52009-09-22 16:46:24 -0700255 clk_enable(rtap->clk);
256 writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
257 clk_disable(rtap->clk);
James Hogan5a98c042010-03-05 13:44:31 -0800258 }
Linus Walleijaa958f52009-09-22 16:46:24 -0700259 return 0;
260}
Linus Walleijaa958f52009-09-22 16:46:24 -0700261#endif
262
Jingoo Han62068e22013-04-29 16:21:00 -0700263static SIMPLE_DEV_PM_OPS(coh901331_pm_ops, coh901331_suspend, coh901331_resume);
264
Linus Walleijaa958f52009-09-22 16:46:24 -0700265static void coh901331_shutdown(struct platform_device *pdev)
266{
Jingoo Han3a028932013-07-03 15:07:12 -0700267 struct coh901331_port *rtap = platform_get_drvdata(pdev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700268
269 clk_enable(rtap->clk);
270 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
Julia Lawall828296d2012-10-04 17:14:07 -0700271 clk_disable_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700272}
273
Linus Walleija16b6c62013-04-19 13:03:13 +0200274static const struct of_device_id coh901331_dt_match[] = {
275 { .compatible = "stericsson,coh901331" },
276 {},
277};
278
Linus Walleijaa958f52009-09-22 16:46:24 -0700279static struct platform_driver coh901331_driver = {
280 .driver = {
281 .name = "rtc-coh901331",
282 .owner = THIS_MODULE,
Jingoo Han62068e22013-04-29 16:21:00 -0700283 .pm = &coh901331_pm_ops,
Linus Walleija16b6c62013-04-19 13:03:13 +0200284 .of_match_table = coh901331_dt_match,
Linus Walleijaa958f52009-09-22 16:46:24 -0700285 },
286 .remove = __exit_p(coh901331_remove),
Linus Walleijaa958f52009-09-22 16:46:24 -0700287 .shutdown = coh901331_shutdown,
288};
289
Jingoo Han4fdf7a92013-04-29 16:18:37 -0700290module_platform_driver_probe(coh901331_driver, coh901331_probe);
Linus Walleijaa958f52009-09-22 16:46:24 -0700291
292MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
293MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver");
294MODULE_LICENSE("GPL");