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johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001/*
2 * rt5631.c -- RT5631 ALSA Soc Audio driver
3 *
4 * Copyright 2011 Realtek Microelectronics
5 *
6 * Author: flove <flove@realtek.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
Mark Brown01476802012-05-08 15:52:55 +010021#include <linux/regmap.h>
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +080022#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29
30#include "rt5631.h"
31
32struct rt5631_priv {
Mark Brown01476802012-05-08 15:52:55 +010033 struct regmap *regmap;
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +080034 int codec_version;
35 int master;
36 int sysclk;
37 int rx_rate;
38 int bclk_rate;
39 int dmic_used_flag;
40};
41
Mark Brown01476802012-05-08 15:52:55 +010042static const struct reg_default rt5631_reg[] = {
43 { RT5631_SPK_OUT_VOL, 0x8888 },
44 { RT5631_HP_OUT_VOL, 0x8080 },
45 { RT5631_MONO_AXO_1_2_VOL, 0xa080 },
46 { RT5631_AUX_IN_VOL, 0x0808 },
47 { RT5631_ADC_REC_MIXER, 0xf0f0 },
48 { RT5631_VDAC_DIG_VOL, 0x0010 },
49 { RT5631_OUTMIXER_L_CTRL, 0xffc0 },
50 { RT5631_OUTMIXER_R_CTRL, 0xffc0 },
51 { RT5631_AXO1MIXER_CTRL, 0x88c0 },
52 { RT5631_AXO2MIXER_CTRL, 0x88c0 },
53 { RT5631_DIG_MIC_CTRL, 0x3000 },
54 { RT5631_MONO_INPUT_VOL, 0x8808 },
55 { RT5631_SPK_MIXER_CTRL, 0xf8f8 },
56 { RT5631_SPK_MONO_OUT_CTRL, 0xfc00 },
57 { RT5631_SPK_MONO_HP_OUT_CTRL, 0x4440 },
58 { RT5631_SDP_CTRL, 0x8000 },
59 { RT5631_MONO_SDP_CTRL, 0x8000 },
60 { RT5631_STEREO_AD_DA_CLK_CTRL, 0x2010 },
61 { RT5631_GEN_PUR_CTRL_REG, 0x0e00 },
62 { RT5631_INT_ST_IRQ_CTRL_2, 0x071a },
63 { RT5631_MISC_CTRL, 0x2040 },
64 { RT5631_DEPOP_FUN_CTRL_2, 0x8000 },
65 { RT5631_SOFT_VOL_CTRL, 0x07e0 },
66 { RT5631_ALC_CTRL_1, 0x0206 },
67 { RT5631_ALC_CTRL_3, 0x2000 },
68 { RT5631_PSEUDO_SPATL_CTRL, 0x0553 },
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +080069};
70
71/**
72 * rt5631_write_index - write index register of 2nd layer
73 */
74static void rt5631_write_index(struct snd_soc_codec *codec,
75 unsigned int reg, unsigned int value)
76{
77 snd_soc_write(codec, RT5631_INDEX_ADD, reg);
78 snd_soc_write(codec, RT5631_INDEX_DATA, value);
79}
80
81/**
82 * rt5631_read_index - read index register of 2nd layer
83 */
84static unsigned int rt5631_read_index(struct snd_soc_codec *codec,
85 unsigned int reg)
86{
87 unsigned int value;
88
89 snd_soc_write(codec, RT5631_INDEX_ADD, reg);
90 value = snd_soc_read(codec, RT5631_INDEX_DATA);
91
92 return value;
93}
94
95static int rt5631_reset(struct snd_soc_codec *codec)
96{
97 return snd_soc_write(codec, RT5631_RESET, 0);
98}
99
Mark Brown01476802012-05-08 15:52:55 +0100100static bool rt5631_volatile_register(struct device *dev, unsigned int reg)
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800101{
102 switch (reg) {
103 case RT5631_RESET:
104 case RT5631_INT_ST_IRQ_CTRL_2:
105 case RT5631_INDEX_ADD:
106 case RT5631_INDEX_DATA:
107 case RT5631_EQ_CTRL:
108 return 1;
109 default:
110 return 0;
111 }
112}
113
Mark Brown01476802012-05-08 15:52:55 +0100114static bool rt5631_readable_register(struct device *dev, unsigned int reg)
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800115{
116 switch (reg) {
117 case RT5631_RESET:
118 case RT5631_SPK_OUT_VOL:
119 case RT5631_HP_OUT_VOL:
120 case RT5631_MONO_AXO_1_2_VOL:
121 case RT5631_AUX_IN_VOL:
122 case RT5631_STEREO_DAC_VOL_1:
123 case RT5631_MIC_CTRL_1:
124 case RT5631_STEREO_DAC_VOL_2:
125 case RT5631_ADC_CTRL_1:
126 case RT5631_ADC_REC_MIXER:
127 case RT5631_ADC_CTRL_2:
128 case RT5631_VDAC_DIG_VOL:
129 case RT5631_OUTMIXER_L_CTRL:
130 case RT5631_OUTMIXER_R_CTRL:
131 case RT5631_AXO1MIXER_CTRL:
132 case RT5631_AXO2MIXER_CTRL:
133 case RT5631_MIC_CTRL_2:
134 case RT5631_DIG_MIC_CTRL:
135 case RT5631_MONO_INPUT_VOL:
136 case RT5631_SPK_MIXER_CTRL:
137 case RT5631_SPK_MONO_OUT_CTRL:
138 case RT5631_SPK_MONO_HP_OUT_CTRL:
139 case RT5631_SDP_CTRL:
140 case RT5631_MONO_SDP_CTRL:
141 case RT5631_STEREO_AD_DA_CLK_CTRL:
142 case RT5631_PWR_MANAG_ADD1:
143 case RT5631_PWR_MANAG_ADD2:
144 case RT5631_PWR_MANAG_ADD3:
145 case RT5631_PWR_MANAG_ADD4:
146 case RT5631_GEN_PUR_CTRL_REG:
147 case RT5631_GLOBAL_CLK_CTRL:
148 case RT5631_PLL_CTRL:
149 case RT5631_INT_ST_IRQ_CTRL_1:
150 case RT5631_INT_ST_IRQ_CTRL_2:
151 case RT5631_GPIO_CTRL:
152 case RT5631_MISC_CTRL:
153 case RT5631_DEPOP_FUN_CTRL_1:
154 case RT5631_DEPOP_FUN_CTRL_2:
155 case RT5631_JACK_DET_CTRL:
156 case RT5631_SOFT_VOL_CTRL:
157 case RT5631_ALC_CTRL_1:
158 case RT5631_ALC_CTRL_2:
159 case RT5631_ALC_CTRL_3:
160 case RT5631_PSEUDO_SPATL_CTRL:
161 case RT5631_INDEX_ADD:
162 case RT5631_INDEX_DATA:
163 case RT5631_EQ_CTRL:
164 case RT5631_VENDOR_ID:
165 case RT5631_VENDOR_ID1:
166 case RT5631_VENDOR_ID2:
167 return 1;
168 default:
169 return 0;
170 }
171}
172
173static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
174static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
175static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
176/* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */
177static unsigned int mic_bst_tlv[] = {
Clemens Ladischa19ea0b2011-11-20 15:11:54 +0100178 TLV_DB_RANGE_HEAD(7),
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800179 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
180 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
181 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
182 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
183 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
184 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
185 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
186};
187
188static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol)
190{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100191 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800192 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
193
194 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
195
196 return 0;
197}
198
199static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
200 struct snd_ctl_elem_value *ucontrol)
201{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100202 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800203 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
204
205 rt5631->dmic_used_flag = ucontrol->value.integer.value[0];
206 return 0;
207}
208
209/* MIC Input Type */
210static const char *rt5631_input_mode[] = {
211 "Single ended", "Differential"};
212
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100213static SOC_ENUM_SINGLE_DECL(rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1,
214 RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800215
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100216static SOC_ENUM_SINGLE_DECL(rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1,
217 RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800218
219/* MONO Input Type */
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100220static SOC_ENUM_SINGLE_DECL(rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL,
221 RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800222
223/* SPK Ratio Gain Control */
224static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x",
225 "1.56x", "1.68x", "1.99x", "2.34x"};
226
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100227static SOC_ENUM_SINGLE_DECL(rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG,
228 RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800229
230static const struct snd_kcontrol_new rt5631_snd_controls[] = {
231 /* MIC */
232 SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum),
233 SOC_SINGLE_TLV("MIC1 Boost", RT5631_MIC_CTRL_2,
234 RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv),
235 SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum),
236 SOC_SINGLE_TLV("MIC2 Boost", RT5631_MIC_CTRL_2,
237 RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv),
238 /* MONO IN */
239 SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum),
240 SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL,
241 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
242 RT5631_VOL_MASK, 1, in_vol_tlv),
243 /* AXI */
244 SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL,
245 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
246 RT5631_VOL_MASK, 1, in_vol_tlv),
247 /* DAC */
248 SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2,
249 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
250 RT5631_DAC_VOL_MASK, 1, dac_vol_tlv),
251 SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1,
252 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
253 /* AXO */
254 SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
255 RT5631_L_MUTE_SHIFT, 1, 1),
256 SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
257 RT5631_R_VOL_SHIFT, 1, 1),
258 /* OUTVOL */
259 SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL,
260 RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0),
261
262 /* SPK */
263 SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL,
264 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
265 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL,
266 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
267 /* MONO OUT */
268 SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL,
269 RT5631_MUTE_MONO_SHIFT, 1, 1),
270 /* HP */
271 SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL,
272 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
273 SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL,
274 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
275 RT5631_VOL_MASK, 1, out_vol_tlv),
276 /* DMIC */
277 SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0,
278 rt5631_dmic_get, rt5631_dmic_put),
279 SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL,
280 RT5631_DMIC_L_CH_MUTE_SHIFT,
281 RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1),
282
283 /* SPK Ratio Gain Control */
284 SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum),
285};
286
287static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
288 struct snd_soc_dapm_widget *sink)
289{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100290 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800291 unsigned int reg;
292
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100293 reg = snd_soc_read(codec, RT5631_GLOBAL_CLK_CTRL);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800294 return reg & RT5631_SYSCLK_SOUR_SEL_PLL;
295}
296
297static int check_dmic_used(struct snd_soc_dapm_widget *source,
298 struct snd_soc_dapm_widget *sink)
299{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100300 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
301 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800302 return rt5631->dmic_used_flag;
303}
304
305static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source,
306 struct snd_soc_dapm_widget *sink)
307{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100308 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800309 unsigned int reg;
310
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100311 reg = snd_soc_read(codec, RT5631_OUTMIXER_L_CTRL);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800312 return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L);
313}
314
315static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source,
316 struct snd_soc_dapm_widget *sink)
317{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100318 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800319 unsigned int reg;
320
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100321 reg = snd_soc_read(codec, RT5631_OUTMIXER_R_CTRL);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800322 return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R);
323}
324
325static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source,
326 struct snd_soc_dapm_widget *sink)
327{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100328 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800329 unsigned int reg;
330
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100331 reg = snd_soc_read(codec, RT5631_SPK_MIXER_CTRL);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800332 return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L);
333}
334
335static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source,
336 struct snd_soc_dapm_widget *sink)
337{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100338 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800339 unsigned int reg;
340
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100341 reg = snd_soc_read(codec, RT5631_SPK_MIXER_CTRL);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800342 return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R);
343}
344
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800345static int check_adcl_select(struct snd_soc_dapm_widget *source,
346 struct snd_soc_dapm_widget *sink)
347{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100348 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800349 unsigned int reg;
350
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100351 reg = snd_soc_read(codec, RT5631_ADC_REC_MIXER);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800352 return !(reg & RT5631_M_MIC1_TO_RECMIXER_L);
353}
354
355static int check_adcr_select(struct snd_soc_dapm_widget *source,
356 struct snd_soc_dapm_widget *sink)
357{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100358 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800359 unsigned int reg;
360
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100361 reg = snd_soc_read(codec, RT5631_ADC_REC_MIXER);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800362 return !(reg & RT5631_M_MIC2_TO_RECMIXER_R);
363}
364
365/**
366 * onebit_depop_power_stage - auto depop in power stage.
367 * @enable: power on/off
368 *
369 * When power on/off headphone, the depop sequence is done by hardware.
370 */
371static void onebit_depop_power_stage(struct snd_soc_codec *codec, int enable)
372{
373 unsigned int soft_vol, hp_zc;
374
375 /* enable one-bit depop function */
376 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
377 RT5631_EN_ONE_BIT_DEPOP, 0);
378
379 /* keep soft volume and zero crossing setting */
380 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
381 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
382 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
383 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
384 if (enable) {
385 /* config one-bit depop parameter */
386 rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
387 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f);
388 rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530);
389 /* power on capless block */
390 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2,
391 RT5631_EN_CAP_FREE_DEPOP);
392 } else {
393 /* power off capless block */
394 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
395 msleep(100);
396 }
397
398 /* recover soft volume and zero crossing setting */
399 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
400 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
401}
402
403/**
404 * onebit_depop_mute_stage - auto depop in mute stage.
405 * @enable: mute/unmute
406 *
407 * When mute/unmute headphone, the depop sequence is done by hardware.
408 */
409static void onebit_depop_mute_stage(struct snd_soc_codec *codec, int enable)
410{
411 unsigned int soft_vol, hp_zc;
412
413 /* enable one-bit depop function */
414 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
415 RT5631_EN_ONE_BIT_DEPOP, 0);
416
417 /* keep soft volume and zero crossing setting */
418 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
419 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
420 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
421 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
422 if (enable) {
423 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
424 /* config one-bit depop parameter */
425 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f);
426 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
427 RT5631_L_MUTE | RT5631_R_MUTE, 0);
428 msleep(300);
429 } else {
430 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
431 RT5631_L_MUTE | RT5631_R_MUTE,
432 RT5631_L_MUTE | RT5631_R_MUTE);
433 msleep(100);
434 }
435
436 /* recover soft volume and zero crossing setting */
437 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
438 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
439}
440
441/**
442 * onebit_depop_power_stage - step by step depop sequence in power stage.
443 * @enable: power on/off
444 *
445 * When power on/off headphone, the depop sequence is done in step by step.
446 */
447static void depop_seq_power_stage(struct snd_soc_codec *codec, int enable)
448{
449 unsigned int soft_vol, hp_zc;
450
451 /* depop control by register */
452 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
453 RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
454
455 /* keep soft volume and zero crossing setting */
456 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
457 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
458 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
459 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
460 if (enable) {
461 /* config depop sequence parameter */
462 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e);
463
464 /* power on headphone and charge pump */
465 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
466 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
467 RT5631_PWR_HP_R_AMP,
468 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
469 RT5631_PWR_HP_R_AMP);
470
471 /* power on soft generator and depop mode2 */
472 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
473 RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP);
474 msleep(100);
475
476 /* stop depop mode */
477 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
478 RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS);
479 } else {
480 /* config depop sequence parameter */
481 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F);
482 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
483 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
484 RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
485 msleep(75);
486 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
487 RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP |
488 RT5631_PD_HPAMP_R_ST_UP);
489
490 /* start depop mode */
491 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
492 RT5631_PWR_HP_DEPOP_DIS, 0);
493
494 /* config depop sequence parameter */
495 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
496 RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP |
497 RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
498 msleep(80);
499 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
500 RT5631_POW_ON_SOFT_GEN);
501
502 /* power down headphone and charge pump */
503 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
504 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
505 RT5631_PWR_HP_R_AMP, 0);
506 }
507
508 /* recover soft volume and zero crossing setting */
509 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
510 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
511}
512
513/**
514 * depop_seq_mute_stage - step by step depop sequence in mute stage.
515 * @enable: mute/unmute
516 *
517 * When mute/unmute headphone, the depop sequence is done in step by step.
518 */
519static void depop_seq_mute_stage(struct snd_soc_codec *codec, int enable)
520{
521 unsigned int soft_vol, hp_zc;
522
523 /* depop control by register */
524 snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
525 RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
526
527 /* keep soft volume and zero crossing setting */
528 soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
529 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
530 hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
531 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
532 if (enable) {
533 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
534
535 /* config depop sequence parameter */
536 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
537 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
538 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
539 RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
540 RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
541
542 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
543 RT5631_L_MUTE | RT5631_R_MUTE, 0);
544 msleep(160);
545 } else {
546 /* config depop sequence parameter */
547 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
548 snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
549 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
550 RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
551 RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
552
553 snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
554 RT5631_L_MUTE | RT5631_R_MUTE,
555 RT5631_L_MUTE | RT5631_R_MUTE);
556 msleep(150);
557 }
558
559 /* recover soft volume and zero crossing setting */
560 snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
561 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
562}
563
564static int hp_event(struct snd_soc_dapm_widget *w,
565 struct snd_kcontrol *kcontrol, int event)
566{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100567 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800568 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
569
570 switch (event) {
571 case SND_SOC_DAPM_PRE_PMD:
572 if (rt5631->codec_version) {
573 onebit_depop_mute_stage(codec, 0);
574 onebit_depop_power_stage(codec, 0);
575 } else {
576 depop_seq_mute_stage(codec, 0);
577 depop_seq_power_stage(codec, 0);
578 }
579 break;
580
581 case SND_SOC_DAPM_POST_PMU:
582 if (rt5631->codec_version) {
583 onebit_depop_power_stage(codec, 1);
584 onebit_depop_mute_stage(codec, 1);
585 } else {
586 depop_seq_power_stage(codec, 1);
587 depop_seq_mute_stage(codec, 1);
588 }
589 break;
590
591 default:
592 break;
593 }
594
595 return 0;
596}
597
598static int set_dmic_params(struct snd_soc_dapm_widget *w,
599 struct snd_kcontrol *kcontrol, int event)
600{
Lars-Peter Clausen4389eb22015-01-15 12:52:11 +0100601 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800602 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
603
604 switch (rt5631->rx_rate) {
605 case 44100:
606 case 48000:
607 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
608 RT5631_DMIC_CLK_CTRL_MASK,
609 RT5631_DMIC_CLK_CTRL_TO_32FS);
610 break;
611
612 case 32000:
613 case 22050:
614 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
615 RT5631_DMIC_CLK_CTRL_MASK,
616 RT5631_DMIC_CLK_CTRL_TO_64FS);
617 break;
618
619 case 16000:
620 case 11025:
621 case 8000:
622 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
623 RT5631_DMIC_CLK_CTRL_MASK,
624 RT5631_DMIC_CLK_CTRL_TO_128FS);
625 break;
626
627 default:
628 return -EINVAL;
629 }
630
631 return 0;
632}
633
634static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
635 SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER,
636 RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1),
637 SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER,
638 RT5631_M_MIC1_RECMIXL_BIT, 1, 1),
639 SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER,
640 RT5631_M_AXIL_RECMIXL_BIT, 1, 1),
641 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
642 RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1),
643};
644
645static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
646 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
647 RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1),
648 SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER,
649 RT5631_M_AXIR_RECMIXR_BIT, 1, 1),
650 SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER,
651 RT5631_M_MIC2_RECMIXR_BIT, 1, 1),
652 SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER,
653 RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1),
654};
655
656static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
657 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
658 RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1),
659 SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL,
660 RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1),
661 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL,
662 RT5631_M_DACL_SPKMIXL_BIT, 1, 1),
663 SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
664 RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1),
665};
666
667static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
668 SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
669 RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1),
670 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL,
671 RT5631_M_DACR_SPKMIXR_BIT, 1, 1),
672 SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL,
673 RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1),
674 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
675 RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1),
676};
677
678static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
679 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL,
680 RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1),
681 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL,
682 RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1),
683 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL,
684 RT5631_M_DACL_OUTMIXL_BIT, 1, 1),
685 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL,
686 RT5631_M_MIC1_OUTMIXL_BIT, 1, 1),
687 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL,
688 RT5631_M_MIC2_OUTMIXL_BIT, 1, 1),
689 SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL,
690 RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1),
691 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
692 RT5631_M_AXIL_OUTMIXL_BIT, 1, 1),
693 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
694 RT5631_M_AXIR_OUTMIXL_BIT, 1, 1),
695 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL,
696 RT5631_M_VDAC_OUTMIXL_BIT, 1, 1),
697};
698
699static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
700 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL,
701 RT5631_M_VDAC_OUTMIXR_BIT, 1, 1),
702 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
703 RT5631_M_AXIR_OUTMIXR_BIT, 1, 1),
704 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
705 RT5631_M_AXIL_OUTMIXR_BIT, 1, 1),
706 SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL,
707 RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1),
708 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL,
709 RT5631_M_MIC2_OUTMIXR_BIT, 1, 1),
710 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL,
711 RT5631_M_MIC1_OUTMIXR_BIT, 1, 1),
712 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL,
713 RT5631_M_DACR_OUTMIXR_BIT, 1, 1),
714 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL,
715 RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1),
716 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL,
717 RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1),
718};
719
720static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
721 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL,
722 RT5631_M_MIC1_AXO1MIX_BIT , 1, 1),
723 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL,
724 RT5631_M_MIC2_AXO1MIX_BIT, 1, 1),
725 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL,
726 RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1),
727 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL,
728 RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1),
729};
730
731static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
732 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL,
733 RT5631_M_MIC1_AXO2MIX_BIT, 1, 1),
734 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL,
735 RT5631_M_MIC2_AXO2MIX_BIT, 1, 1),
736 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL,
737 RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1),
738 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL,
739 RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1),
740};
741
742static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
743 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
744 RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1),
745 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
746 RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1),
747};
748
749static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
750 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
751 RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1),
752 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
753 RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1),
754};
755
756static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
757 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
758 RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1),
759 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
760 RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1),
761};
762
763/* Left SPK Volume Input */
764static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"};
765
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100766static SOC_ENUM_SINGLE_DECL(rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL,
767 RT5631_L_EN_SHIFT, rt5631_spkvoll_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800768
769static const struct snd_kcontrol_new rt5631_spkvoll_mux_control =
770 SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum);
771
772/* Left HP Volume Input */
773static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"};
774
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100775static SOC_ENUM_SINGLE_DECL(rt5631_hpvoll_enum, RT5631_HP_OUT_VOL,
776 RT5631_L_EN_SHIFT, rt5631_hpvoll_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800777
778static const struct snd_kcontrol_new rt5631_hpvoll_mux_control =
779 SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum);
780
781/* Left Out Volume Input */
782static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"};
783
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100784static SOC_ENUM_SINGLE_DECL(rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL,
785 RT5631_L_EN_SHIFT, rt5631_outvoll_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800786
787static const struct snd_kcontrol_new rt5631_outvoll_mux_control =
788 SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum);
789
790/* Right Out Volume Input */
791static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"};
792
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100793static SOC_ENUM_SINGLE_DECL(rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL,
794 RT5631_R_EN_SHIFT, rt5631_outvolr_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800795
796static const struct snd_kcontrol_new rt5631_outvolr_mux_control =
797 SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum);
798
799/* Right HP Volume Input */
800static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"};
801
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100802static SOC_ENUM_SINGLE_DECL(rt5631_hpvolr_enum, RT5631_HP_OUT_VOL,
803 RT5631_R_EN_SHIFT, rt5631_hpvolr_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800804
805static const struct snd_kcontrol_new rt5631_hpvolr_mux_control =
806 SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum);
807
808/* Right SPK Volume Input */
809static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"};
810
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100811static SOC_ENUM_SINGLE_DECL(rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL,
812 RT5631_R_EN_SHIFT, rt5631_spkvolr_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800813
814static const struct snd_kcontrol_new rt5631_spkvolr_mux_control =
815 SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum);
816
817/* SPO Left Channel Input */
818static const char *rt5631_spol_src_sel[] = {
819 "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
820
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100821static SOC_ENUM_SINGLE_DECL(rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
822 RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800823
824static const struct snd_kcontrol_new rt5631_spol_mux_control =
825 SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum);
826
827/* SPO Right Channel Input */
828static const char *rt5631_spor_src_sel[] = {
829 "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
830
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100831static SOC_ENUM_SINGLE_DECL(rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
832 RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800833
834static const struct snd_kcontrol_new rt5631_spor_mux_control =
835 SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum);
836
837/* MONO Input */
838static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
839
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100840static SOC_ENUM_SINGLE_DECL(rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
841 RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800842
843static const struct snd_kcontrol_new rt5631_mono_mux_control =
844 SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum);
845
846/* Left HPO Input */
847static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"};
848
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100849static SOC_ENUM_SINGLE_DECL(rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
850 RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800851
852static const struct snd_kcontrol_new rt5631_hpl_mux_control =
853 SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum);
854
855/* Right HPO Input */
856static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"};
857
Takashi Iwaif843cdf2014-02-18 09:43:08 +0100858static SOC_ENUM_SINGLE_DECL(rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
859 RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +0800860
861static const struct snd_kcontrol_new rt5631_hpr_mux_control =
862 SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum);
863
864static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
865 /* Vmid */
866 SND_SOC_DAPM_VMID("Vmid"),
867 /* PLL1 */
868 SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2,
869 RT5631_PWR_PLL1_BIT, 0, NULL, 0),
870
871 /* Input Side */
872 /* Input Lines */
873 SND_SOC_DAPM_INPUT("MIC1"),
874 SND_SOC_DAPM_INPUT("MIC2"),
875 SND_SOC_DAPM_INPUT("AXIL"),
876 SND_SOC_DAPM_INPUT("AXIR"),
877 SND_SOC_DAPM_INPUT("MONOIN_RXN"),
878 SND_SOC_DAPM_INPUT("MONOIN_RXP"),
879 SND_SOC_DAPM_INPUT("DMIC"),
880
881 /* MICBIAS */
882 SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2,
883 RT5631_PWR_MICBIAS1_VOL_BIT, 0),
884 SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2,
885 RT5631_PWR_MICBIAS2_VOL_BIT, 0),
886
887 /* Boost */
888 SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2,
889 RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0),
890 SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2,
891 RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0),
892 SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4,
893 RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0),
894 SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4,
895 RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0),
896 SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4,
897 RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0),
898 SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4,
899 RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0),
900
901 /* MONO In */
902 SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
903
904 /* REC Mixer */
905 SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2,
906 RT5631_PWR_RECMIXER_L_BIT, 0,
907 &rt5631_recmixl_mixer_controls[0],
908 ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
909 SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2,
910 RT5631_PWR_RECMIXER_R_BIT, 0,
911 &rt5631_recmixr_mixer_controls[0],
912 ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
913 /* Because of record duplication for L/R channel,
914 * L/R ADCs need power up at the same time */
915 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
916
917 /* DMIC */
918 SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL,
919 RT5631_DMIC_ENA_SHIFT, 0,
920 set_dmic_params, SND_SOC_DAPM_PRE_PMU),
921 /* ADC Data Srouce */
922 SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
923 RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0),
924 SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
925 RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0),
926
927 /* ADCs */
928 SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture",
929 RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0),
930 SND_SOC_DAPM_ADC("Right ADC", "HIFI Capture",
931 RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0),
932
933 /* DAC and ADC supply power */
934 SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1,
935 RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0),
936 SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1,
937 RT5631_PWR_DAC_REF_BIT, 0, NULL, 0),
938
939 /* Output Side */
940 /* DACs */
941 SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback",
942 RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0),
943 SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback",
944 RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0),
945 SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback",
946 SND_SOC_NOPM, 0, 0),
947 SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
948 /* DAC supply power */
949 SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1,
950 RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0),
951 SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1,
952 RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0),
953
954 /* Left SPK Mixer */
955 SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2,
956 RT5631_PWR_SPKMIXER_L_BIT, 0,
957 &rt5631_spkmixl_mixer_controls[0],
958 ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
959 /* Left Out Mixer */
960 SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2,
961 RT5631_PWR_OUTMIXER_L_BIT, 0,
962 &rt5631_outmixl_mixer_controls[0],
963 ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
964 /* Right Out Mixer */
965 SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2,
966 RT5631_PWR_OUTMIXER_R_BIT, 0,
967 &rt5631_outmixr_mixer_controls[0],
968 ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
969 /* Right SPK Mixer */
970 SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2,
971 RT5631_PWR_SPKMIXER_R_BIT, 0,
972 &rt5631_spkmixr_mixer_controls[0],
973 ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
974
975 /* Volume Mux */
976 SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
977 RT5631_PWR_SPK_L_VOL_BIT, 0,
978 &rt5631_spkvoll_mux_control),
979 SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4,
980 RT5631_PWR_HP_L_OUT_VOL_BIT, 0,
981 &rt5631_hpvoll_mux_control),
982 SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
983 RT5631_PWR_LOUT_VOL_BIT, 0,
984 &rt5631_outvoll_mux_control),
985 SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
986 RT5631_PWR_ROUT_VOL_BIT, 0,
987 &rt5631_outvolr_mux_control),
988 SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4,
989 RT5631_PWR_HP_R_OUT_VOL_BIT, 0,
990 &rt5631_hpvolr_mux_control),
991 SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
992 RT5631_PWR_SPK_R_VOL_BIT, 0,
993 &rt5631_spkvolr_mux_control),
994
995 /* DAC To HP */
996 SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
997 SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
998
999 /* HP Depop */
1000 SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0,
1001 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1002
1003 /* AXO1 Mixer */
1004 SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3,
1005 RT5631_PWR_AXO1MIXER_BIT, 0,
1006 &rt5631_AXO1MIX_mixer_controls[0],
1007 ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)),
1008 /* SPOL Mixer */
1009 SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
1010 &rt5631_spolmix_mixer_controls[0],
1011 ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
1012 /* MONO Mixer */
1013 SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3,
1014 RT5631_PWR_MONOMIXER_BIT, 0,
1015 &rt5631_monomix_mixer_controls[0],
1016 ARRAY_SIZE(rt5631_monomix_mixer_controls)),
1017 /* SPOR Mixer */
1018 SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
1019 &rt5631_spormix_mixer_controls[0],
1020 ARRAY_SIZE(rt5631_spormix_mixer_controls)),
1021 /* AXO2 Mixer */
1022 SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3,
1023 RT5631_PWR_AXO2MIXER_BIT, 0,
1024 &rt5631_AXO2MIX_mixer_controls[0],
1025 ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)),
1026
1027 /* Mux */
1028 SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0,
1029 &rt5631_spol_mux_control),
1030 SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0,
1031 &rt5631_spor_mux_control),
1032 SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0,
1033 &rt5631_mono_mux_control),
1034 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0,
1035 &rt5631_hpl_mux_control),
1036 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0,
1037 &rt5631_hpr_mux_control),
1038
1039 /* AMP supply */
1040 SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3,
1041 RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0),
1042 SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1,
1043 RT5631_PWR_CLASS_D_BIT, 0, NULL, 0),
1044
1045 /* Output Lines */
1046 SND_SOC_DAPM_OUTPUT("AUXO1"),
1047 SND_SOC_DAPM_OUTPUT("AUXO2"),
1048 SND_SOC_DAPM_OUTPUT("SPOL"),
1049 SND_SOC_DAPM_OUTPUT("SPOR"),
1050 SND_SOC_DAPM_OUTPUT("HPOL"),
1051 SND_SOC_DAPM_OUTPUT("HPOR"),
1052 SND_SOC_DAPM_OUTPUT("MONO"),
1053};
1054
1055static const struct snd_soc_dapm_route rt5631_dapm_routes[] = {
1056 {"MIC1 Boost", NULL, "MIC1"},
1057 {"MIC2 Boost", NULL, "MIC2"},
1058 {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
1059 {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
1060 {"AXIL Boost", NULL, "AXIL"},
1061 {"AXIR Boost", NULL, "AXIR"},
1062
1063 {"MONO_IN", NULL, "MONOIN_RXP Boost"},
1064 {"MONO_IN", NULL, "MONOIN_RXN Boost"},
1065
1066 {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
1067 {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"},
1068 {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
1069 {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1070
1071 {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
1072 {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"},
1073 {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
1074 {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1075
1076 {"ADC Mixer", NULL, "RECMIXL Mixer"},
1077 {"ADC Mixer", NULL, "RECMIXR Mixer"},
1078
1079 {"Left ADC", NULL, "ADC Mixer"},
1080 {"Left ADC", NULL, "Left ADC Select", check_adcl_select},
1081 {"Left ADC", NULL, "PLL1", check_sysclk1_source},
1082 {"Left ADC", NULL, "I2S"},
1083 {"Left ADC", NULL, "DAC REF"},
1084
1085 {"Right ADC", NULL, "ADC Mixer"},
1086 {"Right ADC", NULL, "Right ADC Select", check_adcr_select},
1087 {"Right ADC", NULL, "PLL1", check_sysclk1_source},
1088 {"Right ADC", NULL, "I2S"},
1089 {"Right ADC", NULL, "DAC REF"},
1090
1091 {"DMIC", NULL, "DMIC Supply", check_dmic_used},
1092 {"Left ADC", NULL, "DMIC"},
1093 {"Right ADC", NULL, "DMIC"},
1094
1095 {"Left DAC", NULL, "PLL1", check_sysclk1_source},
1096 {"Left DAC", NULL, "I2S"},
1097 {"Left DAC", NULL, "DAC REF"},
1098 {"Right DAC", NULL, "PLL1", check_sysclk1_source},
1099 {"Right DAC", NULL, "I2S"},
1100 {"Right DAC", NULL, "DAC REF"},
1101
1102 {"Voice DAC Boost", NULL, "Voice DAC"},
1103
1104 {"SPKMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_spkmixl},
1105 {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1106 {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
1107 {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1108 {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
1109
1110 {"SPKMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_spkmixr},
1111 {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
1112 {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1113 {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
1114 {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1115
1116 {"OUTMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_outmixl},
1117 {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1118 {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1119 {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1120 {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1121 {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1122 {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
1123 {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1124 {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1125 {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1126
1127 {"OUTMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_outmixr},
1128 {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1129 {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1130 {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1131 {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1132 {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1133 {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
1134 {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1135 {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1136 {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1137
1138 {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"},
1139 {"Left SPKVOL Mux", "Vmid", "Vmid"},
1140 {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
1141 {"Left HPVOL Mux", "Vmid", "Vmid"},
1142 {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
1143 {"Left OUTVOL Mux", "Vmid", "Vmid"},
1144 {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
1145 {"Right OUTVOL Mux", "Vmid", "Vmid"},
1146 {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
1147 {"Right HPVOL Mux", "Vmid", "Vmid"},
1148 {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"},
1149 {"Right SPKVOL Mux", "Vmid", "Vmid"},
1150
1151 {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1152 {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1153 {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1154 {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1155
1156 {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1157 {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1158 {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1159 {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1160
1161 {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
1162 {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
1163
1164 {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
1165 {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
1166
1167 {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1168 {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1169
1170 {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
1171 {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
1172 {"SPOL Mux", "VDAC", "Voice DAC Boost"},
1173 {"SPOL Mux", "DACL", "Left DAC"},
1174
1175 {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
1176 {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
1177 {"SPOR Mux", "VDAC", "Voice DAC Boost"},
1178 {"SPOR Mux", "DACR", "Right DAC"},
1179
1180 {"MONO Mux", "MONOMIX", "MONOMIX Mixer"},
1181 {"MONO Mux", "MONOIN_RX", "MONO_IN"},
1182 {"MONO Mux", "VDAC", "Voice DAC Boost"},
1183
1184 {"Right DAC_HP", NULL, "Right DAC"},
1185 {"Left DAC_HP", NULL, "Left DAC"},
1186
1187 {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"},
1188 {"HPL Mux", "Left DAC", "Left DAC_HP"},
1189 {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"},
1190 {"HPR Mux", "Right DAC", "Right DAC_HP"},
1191
1192 {"HP Depop", NULL, "HPL Mux"},
1193 {"HP Depop", NULL, "HPR Mux"},
1194
1195 {"AUXO1", NULL, "AXO1MIX Mixer"},
1196 {"AUXO2", NULL, "AXO2MIX Mixer"},
1197
1198 {"SPOL", NULL, "Class D"},
1199 {"SPOL", NULL, "SPOL Mux"},
1200 {"SPOR", NULL, "Class D"},
1201 {"SPOR", NULL, "SPOR Mux"},
1202
1203 {"HPOL", NULL, "HP Depop"},
1204 {"HPOR", NULL, "HP Depop"},
1205
1206 {"MONO", NULL, "MONO Depop"},
1207 {"MONO", NULL, "MONO Mux"},
1208};
1209
1210struct coeff_clk_div {
1211 u32 mclk;
1212 u32 bclk;
1213 u32 rate;
1214 u16 reg_val;
1215};
1216
1217/* PLL divisors */
1218struct pll_div {
1219 u32 pll_in;
1220 u32 pll_out;
1221 u16 reg_val;
1222};
1223
1224static const struct pll_div codec_master_pll_div[] = {
1225 {2048000, 8192000, 0x0ea0},
1226 {3686400, 8192000, 0x4e27},
1227 {12000000, 8192000, 0x456b},
1228 {13000000, 8192000, 0x495f},
1229 {13100000, 8192000, 0x0320},
1230 {2048000, 11289600, 0xf637},
1231 {3686400, 11289600, 0x2f22},
1232 {12000000, 11289600, 0x3e2f},
1233 {13000000, 11289600, 0x4d5b},
1234 {13100000, 11289600, 0x363b},
1235 {2048000, 16384000, 0x1ea0},
1236 {3686400, 16384000, 0x9e27},
1237 {12000000, 16384000, 0x452b},
1238 {13000000, 16384000, 0x542f},
1239 {13100000, 16384000, 0x03a0},
1240 {2048000, 16934400, 0xe625},
1241 {3686400, 16934400, 0x9126},
1242 {12000000, 16934400, 0x4d2c},
1243 {13000000, 16934400, 0x742f},
1244 {13100000, 16934400, 0x3c27},
1245 {2048000, 22579200, 0x2aa0},
1246 {3686400, 22579200, 0x2f20},
1247 {12000000, 22579200, 0x7e2f},
1248 {13000000, 22579200, 0x742f},
1249 {13100000, 22579200, 0x3c27},
1250 {2048000, 24576000, 0x2ea0},
1251 {3686400, 24576000, 0xee27},
1252 {12000000, 24576000, 0x2915},
1253 {13000000, 24576000, 0x772e},
1254 {13100000, 24576000, 0x0d20},
1255 {26000000, 24576000, 0x2027},
1256 {26000000, 22579200, 0x392f},
1257 {24576000, 22579200, 0x0921},
1258 {24576000, 24576000, 0x02a0},
1259};
1260
1261static const struct pll_div codec_slave_pll_div[] = {
1262 {256000, 2048000, 0x46f0},
1263 {256000, 4096000, 0x3ea0},
1264 {352800, 5644800, 0x3ea0},
1265 {512000, 8192000, 0x3ea0},
1266 {1024000, 8192000, 0x46f0},
1267 {705600, 11289600, 0x3ea0},
1268 {1024000, 16384000, 0x3ea0},
1269 {1411200, 22579200, 0x3ea0},
1270 {1536000, 24576000, 0x3ea0},
1271 {2048000, 16384000, 0x1ea0},
1272 {2822400, 22579200, 0x1ea0},
1273 {2822400, 45158400, 0x5ec0},
1274 {5644800, 45158400, 0x46f0},
1275 {3072000, 24576000, 0x1ea0},
1276 {3072000, 49152000, 0x5ec0},
1277 {6144000, 49152000, 0x46f0},
1278 {705600, 11289600, 0x3ea0},
1279 {705600, 8467200, 0x3ab0},
1280 {24576000, 24576000, 0x02a0},
1281 {1411200, 11289600, 0x1690},
1282 {2822400, 11289600, 0x0a90},
1283 {1536000, 12288000, 0x1690},
1284 {3072000, 12288000, 0x0a90},
1285};
1286
Mark Brownf79e5e82011-09-29 17:30:06 +01001287static struct coeff_clk_div coeff_div[] = {
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001288 /* sysclk is 256fs */
1289 {2048000, 8000 * 32, 8000, 0x1000},
1290 {2048000, 8000 * 64, 8000, 0x0000},
1291 {2822400, 11025 * 32, 11025, 0x1000},
1292 {2822400, 11025 * 64, 11025, 0x0000},
1293 {4096000, 16000 * 32, 16000, 0x1000},
1294 {4096000, 16000 * 64, 16000, 0x0000},
1295 {5644800, 22050 * 32, 22050, 0x1000},
1296 {5644800, 22050 * 64, 22050, 0x0000},
1297 {8192000, 32000 * 32, 32000, 0x1000},
1298 {8192000, 32000 * 64, 32000, 0x0000},
1299 {11289600, 44100 * 32, 44100, 0x1000},
1300 {11289600, 44100 * 64, 44100, 0x0000},
1301 {12288000, 48000 * 32, 48000, 0x1000},
1302 {12288000, 48000 * 64, 48000, 0x0000},
1303 {22579200, 88200 * 32, 88200, 0x1000},
1304 {22579200, 88200 * 64, 88200, 0x0000},
1305 {24576000, 96000 * 32, 96000, 0x1000},
1306 {24576000, 96000 * 64, 96000, 0x0000},
1307 /* sysclk is 512fs */
1308 {4096000, 8000 * 32, 8000, 0x3000},
1309 {4096000, 8000 * 64, 8000, 0x2000},
1310 {5644800, 11025 * 32, 11025, 0x3000},
1311 {5644800, 11025 * 64, 11025, 0x2000},
1312 {8192000, 16000 * 32, 16000, 0x3000},
1313 {8192000, 16000 * 64, 16000, 0x2000},
1314 {11289600, 22050 * 32, 22050, 0x3000},
1315 {11289600, 22050 * 64, 22050, 0x2000},
1316 {16384000, 32000 * 32, 32000, 0x3000},
1317 {16384000, 32000 * 64, 32000, 0x2000},
1318 {22579200, 44100 * 32, 44100, 0x3000},
1319 {22579200, 44100 * 64, 44100, 0x2000},
1320 {24576000, 48000 * 32, 48000, 0x3000},
1321 {24576000, 48000 * 64, 48000, 0x2000},
1322 {45158400, 88200 * 32, 88200, 0x3000},
1323 {45158400, 88200 * 64, 88200, 0x2000},
1324 {49152000, 96000 * 32, 96000, 0x3000},
1325 {49152000, 96000 * 64, 96000, 0x2000},
1326 /* sysclk is 24.576Mhz or 22.5792Mhz */
1327 {24576000, 8000 * 32, 8000, 0x7080},
1328 {24576000, 8000 * 64, 8000, 0x6080},
1329 {24576000, 16000 * 32, 16000, 0x5080},
1330 {24576000, 16000 * 64, 16000, 0x4080},
1331 {24576000, 24000 * 32, 24000, 0x5000},
1332 {24576000, 24000 * 64, 24000, 0x4000},
1333 {24576000, 32000 * 32, 32000, 0x3080},
1334 {24576000, 32000 * 64, 32000, 0x2080},
1335 {22579200, 11025 * 32, 11025, 0x7000},
1336 {22579200, 11025 * 64, 11025, 0x6000},
1337 {22579200, 22050 * 32, 22050, 0x5000},
1338 {22579200, 22050 * 64, 22050, 0x4000},
1339};
1340
1341static int get_coeff(int mclk, int rate, int timesofbclk)
1342{
1343 int i;
1344
1345 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
1346 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
1347 (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
1348 return i;
1349 }
1350 return -EINVAL;
1351}
1352
1353static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
1354 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1355{
Mark Browne6968a12012-04-04 15:58:16 +01001356 struct snd_soc_codec *codec = dai->codec;
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001357 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1358 int timesofbclk = 32, coeff;
1359 unsigned int iface = 0;
1360
1361 dev_dbg(codec->dev, "enter %s\n", __func__);
1362
1363 rt5631->bclk_rate = snd_soc_params_to_bclk(params);
1364 if (rt5631->bclk_rate < 0) {
1365 dev_err(codec->dev, "Fail to get BCLK rate\n");
1366 return rt5631->bclk_rate;
1367 }
1368 rt5631->rx_rate = params_rate(params);
1369
1370 if (rt5631->master)
1371 coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
1372 rt5631->bclk_rate / rt5631->rx_rate);
1373 else
1374 coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
1375 timesofbclk);
1376 if (coeff < 0) {
1377 dev_err(codec->dev, "Fail to get coeff\n");
Sachin Kamat25258082012-11-19 11:18:14 +05301378 return coeff;
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001379 }
1380
Mark Browne6777ea2014-07-31 12:32:12 +01001381 switch (params_width(params)) {
1382 case 16:
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001383 break;
Mark Browne6777ea2014-07-31 12:32:12 +01001384 case 20:
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001385 iface |= RT5631_SDP_I2S_DL_20;
1386 break;
Mark Browne6777ea2014-07-31 12:32:12 +01001387 case 24:
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001388 iface |= RT5631_SDP_I2S_DL_24;
1389 break;
Mark Browne6777ea2014-07-31 12:32:12 +01001390 case 8:
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001391 iface |= RT5631_SDP_I2S_DL_8;
1392 break;
1393 default:
1394 return -EINVAL;
1395 }
1396
1397 snd_soc_update_bits(codec, RT5631_SDP_CTRL,
1398 RT5631_SDP_I2S_DL_MASK, iface);
1399 snd_soc_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
1400 coeff_div[coeff].reg_val);
1401
1402 return 0;
1403}
1404
1405static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
1406 unsigned int fmt)
1407{
1408 struct snd_soc_codec *codec = codec_dai->codec;
1409 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1410 unsigned int iface = 0;
1411
1412 dev_dbg(codec->dev, "enter %s\n", __func__);
1413
1414 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1415 case SND_SOC_DAIFMT_CBM_CFM:
1416 rt5631->master = 1;
1417 break;
1418 case SND_SOC_DAIFMT_CBS_CFS:
1419 iface |= RT5631_SDP_MODE_SEL_SLAVE;
1420 rt5631->master = 0;
1421 break;
1422 default:
1423 return -EINVAL;
1424 }
1425
1426 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1427 case SND_SOC_DAIFMT_I2S:
1428 break;
1429 case SND_SOC_DAIFMT_LEFT_J:
1430 iface |= RT5631_SDP_I2S_DF_LEFT;
1431 break;
1432 case SND_SOC_DAIFMT_DSP_A:
1433 iface |= RT5631_SDP_I2S_DF_PCM_A;
1434 break;
1435 case SND_SOC_DAIFMT_DSP_B:
1436 iface |= RT5631_SDP_I2S_DF_PCM_B;
1437 break;
1438 default:
1439 return -EINVAL;
1440 }
1441
1442 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1443 case SND_SOC_DAIFMT_NB_NF:
1444 break;
1445 case SND_SOC_DAIFMT_IB_NF:
1446 iface |= RT5631_SDP_I2S_BCLK_POL_CTRL;
1447 break;
1448 default:
1449 return -EINVAL;
1450 }
1451
1452 snd_soc_write(codec, RT5631_SDP_CTRL, iface);
1453
1454 return 0;
1455}
1456
1457static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1458 int clk_id, unsigned int freq, int dir)
1459{
1460 struct snd_soc_codec *codec = codec_dai->codec;
1461 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1462
1463 dev_dbg(codec->dev, "enter %s, syclk=%d\n", __func__, freq);
1464
1465 if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
1466 rt5631->sysclk = freq;
1467 return 0;
1468 }
1469
1470 return -EINVAL;
1471}
1472
1473static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1474 int source, unsigned int freq_in, unsigned int freq_out)
1475{
1476 struct snd_soc_codec *codec = codec_dai->codec;
1477 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1478 int i, ret = -EINVAL;
1479
1480 dev_dbg(codec->dev, "enter %s\n", __func__);
1481
1482 if (!freq_in || !freq_out) {
1483 dev_dbg(codec->dev, "PLL disabled\n");
1484
1485 snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
1486 RT5631_SYSCLK_SOUR_SEL_MASK,
1487 RT5631_SYSCLK_SOUR_SEL_MCLK);
1488
1489 return 0;
1490 }
1491
1492 if (rt5631->master) {
1493 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
1494 if (freq_in == codec_master_pll_div[i].pll_in &&
1495 freq_out == codec_master_pll_div[i].pll_out) {
1496 dev_info(codec->dev,
1497 "change PLL in master mode\n");
1498 snd_soc_write(codec, RT5631_PLL_CTRL,
1499 codec_master_pll_div[i].reg_val);
1500 schedule_timeout_uninterruptible(
1501 msecs_to_jiffies(20));
1502 snd_soc_update_bits(codec,
1503 RT5631_GLOBAL_CLK_CTRL,
1504 RT5631_SYSCLK_SOUR_SEL_MASK |
1505 RT5631_PLLCLK_SOUR_SEL_MASK,
1506 RT5631_SYSCLK_SOUR_SEL_PLL |
1507 RT5631_PLLCLK_SOUR_SEL_MCLK);
1508 ret = 0;
1509 break;
1510 }
1511 } else {
1512 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
1513 if (freq_in == codec_slave_pll_div[i].pll_in &&
1514 freq_out == codec_slave_pll_div[i].pll_out) {
1515 dev_info(codec->dev,
1516 "change PLL in slave mode\n");
1517 snd_soc_write(codec, RT5631_PLL_CTRL,
1518 codec_slave_pll_div[i].reg_val);
1519 schedule_timeout_uninterruptible(
1520 msecs_to_jiffies(20));
1521 snd_soc_update_bits(codec,
1522 RT5631_GLOBAL_CLK_CTRL,
1523 RT5631_SYSCLK_SOUR_SEL_MASK |
1524 RT5631_PLLCLK_SOUR_SEL_MASK,
1525 RT5631_SYSCLK_SOUR_SEL_PLL |
1526 RT5631_PLLCLK_SOUR_SEL_BCLK);
1527 ret = 0;
1528 break;
1529 }
1530 }
1531
1532 return ret;
1533}
1534
1535static int rt5631_set_bias_level(struct snd_soc_codec *codec,
1536 enum snd_soc_bias_level level)
1537{
Mark Brown01476802012-05-08 15:52:55 +01001538 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1539
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001540 switch (level) {
1541 case SND_SOC_BIAS_ON:
1542 case SND_SOC_BIAS_PREPARE:
1543 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2,
1544 RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL,
1545 RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL);
1546 break;
1547
1548 case SND_SOC_BIAS_STANDBY:
1549 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1550 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1551 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
1552 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
1553 msleep(80);
1554 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1555 RT5631_PWR_FAST_VREF_CTRL,
1556 RT5631_PWR_FAST_VREF_CTRL);
Mark Brown01476802012-05-08 15:52:55 +01001557 regcache_cache_only(rt5631->regmap, false);
1558 regcache_sync(rt5631->regmap);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001559 }
1560 break;
1561
1562 case SND_SOC_BIAS_OFF:
1563 snd_soc_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1564 snd_soc_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1565 snd_soc_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1566 snd_soc_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
1567 break;
1568
1569 default:
1570 break;
1571 }
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001572
1573 return 0;
1574}
1575
1576static int rt5631_probe(struct snd_soc_codec *codec)
1577{
1578 struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1579 unsigned int val;
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001580
1581 val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
1582 if (val & 0x0002)
1583 rt5631->codec_version = 1;
1584 else
1585 rt5631->codec_version = 0;
1586
1587 rt5631_reset(codec);
1588 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1589 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
1590 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
1591 msleep(80);
1592 snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
1593 RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL);
1594 /* enable HP zero cross */
1595 snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18);
1596 /* power off ClassD auto Recovery */
1597 if (rt5631->codec_version)
1598 snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
1599 0x2000, 0x2000);
1600 else
1601 snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
1602 0x2000, 0);
1603 /* DMIC */
1604 if (rt5631->dmic_used_flag) {
1605 snd_soc_update_bits(codec, RT5631_GPIO_CTRL,
1606 RT5631_GPIO_PIN_FUN_SEL_MASK |
1607 RT5631_GPIO_DMIC_FUN_SEL_MASK,
1608 RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC |
1609 RT5631_GPIO_DMIC_FUN_SEL_DIMC);
1610 snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
1611 RT5631_DMIC_L_CH_LATCH_MASK |
1612 RT5631_DMIC_R_CH_LATCH_MASK,
1613 RT5631_DMIC_L_CH_LATCH_FALLING |
1614 RT5631_DMIC_R_CH_LATCH_RISING);
1615 }
1616
1617 codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001618
1619 return 0;
1620}
1621
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001622#define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1623#define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \
1624 SNDRV_PCM_FMTBIT_S20_3LE | \
1625 SNDRV_PCM_FMTBIT_S24_LE | \
1626 SNDRV_PCM_FMTBIT_S8)
1627
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01001628static const struct snd_soc_dai_ops rt5631_ops = {
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001629 .hw_params = rt5631_hifi_pcm_params,
1630 .set_fmt = rt5631_hifi_codec_set_dai_fmt,
1631 .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
1632 .set_pll = rt5631_codec_set_dai_pll,
1633};
1634
Axel Lin51e19fb2011-09-23 16:22:07 +08001635static struct snd_soc_dai_driver rt5631_dai[] = {
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001636 {
1637 .name = "rt5631-hifi",
1638 .id = 1,
1639 .playback = {
1640 .stream_name = "HIFI Playback",
1641 .channels_min = 1,
1642 .channels_max = 2,
1643 .rates = RT5631_STEREO_RATES,
1644 .formats = RT5631_FORMAT,
1645 },
1646 .capture = {
1647 .stream_name = "HIFI Capture",
1648 .channels_min = 1,
1649 .channels_max = 2,
1650 .rates = RT5631_STEREO_RATES,
1651 .formats = RT5631_FORMAT,
1652 },
1653 .ops = &rt5631_ops,
1654 },
1655};
1656
1657static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
1658 .probe = rt5631_probe,
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001659 .set_bias_level = rt5631_set_bias_level,
Lars-Peter Clausene2dce942014-11-23 13:47:52 +01001660 .suspend_bias_off = true,
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001661 .controls = rt5631_snd_controls,
1662 .num_controls = ARRAY_SIZE(rt5631_snd_controls),
1663 .dapm_widgets = rt5631_dapm_widgets,
1664 .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets),
1665 .dapm_routes = rt5631_dapm_routes,
1666 .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes),
1667};
1668
1669static const struct i2c_device_id rt5631_i2c_id[] = {
1670 { "rt5631", 0 },
Krishna Mohan Dani189c88c2014-11-13 17:44:24 +05301671 { "alc5631", 0 },
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001672 { }
1673};
1674MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
1675
Krishna Mohan Dani187024b2014-11-17 19:26:29 +05301676#ifdef CONFIG_OF
Fabian Frederick261e43a32015-03-18 17:48:59 +01001677static const struct of_device_id rt5631_i2c_dt_ids[] = {
Krishna Mohan Dani189c88c2014-11-13 17:44:24 +05301678 { .compatible = "realtek,rt5631"},
1679 { .compatible = "realtek,alc5631"},
1680 { }
1681};
1682MODULE_DEVICE_TABLE(of, rt5631_i2c_dt_ids);
Krishna Mohan Dani187024b2014-11-17 19:26:29 +05301683#endif
Krishna Mohan Dani189c88c2014-11-13 17:44:24 +05301684
Mark Brown01476802012-05-08 15:52:55 +01001685static const struct regmap_config rt5631_regmap_config = {
1686 .reg_bits = 8,
1687 .val_bits = 16,
1688
1689 .readable_reg = rt5631_readable_register,
1690 .volatile_reg = rt5631_volatile_register,
1691 .max_register = RT5631_VENDOR_ID2,
1692 .reg_defaults = rt5631_reg,
1693 .num_reg_defaults = ARRAY_SIZE(rt5631_reg),
1694 .cache_type = REGCACHE_RBTREE,
1695};
1696
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001697static int rt5631_i2c_probe(struct i2c_client *i2c,
1698 const struct i2c_device_id *id)
1699{
1700 struct rt5631_priv *rt5631;
1701 int ret;
1702
Axel Lina92b0a02011-12-29 12:04:15 +08001703 rt5631 = devm_kzalloc(&i2c->dev, sizeof(struct rt5631_priv),
1704 GFP_KERNEL);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001705 if (NULL == rt5631)
1706 return -ENOMEM;
1707
1708 i2c_set_clientdata(i2c, rt5631);
1709
Mark Brown01476802012-05-08 15:52:55 +01001710 rt5631->regmap = devm_regmap_init_i2c(i2c, &rt5631_regmap_config);
1711 if (IS_ERR(rt5631->regmap))
1712 return PTR_ERR(rt5631->regmap);
1713
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001714 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
1715 rt5631_dai, ARRAY_SIZE(rt5631_dai));
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001716 return ret;
1717}
1718
Bill Pemberton7a79e942012-12-07 09:26:37 -05001719static int rt5631_i2c_remove(struct i2c_client *client)
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001720{
1721 snd_soc_unregister_codec(&client->dev);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001722 return 0;
1723}
1724
Mark Brownf79e5e82011-09-29 17:30:06 +01001725static struct i2c_driver rt5631_i2c_driver = {
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001726 .driver = {
1727 .name = "rt5631",
1728 .owner = THIS_MODULE,
Krishna Mohan Dani189c88c2014-11-13 17:44:24 +05301729 .of_match_table = of_match_ptr(rt5631_i2c_dt_ids),
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001730 },
1731 .probe = rt5631_i2c_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -05001732 .remove = rt5631_i2c_remove,
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001733 .id_table = rt5631_i2c_id,
1734};
1735
Mark Brown03730b82012-05-08 15:35:57 +01001736module_i2c_driver(rt5631_i2c_driver);
johnnyhsu@realtek.comd8085222011-09-07 11:16:35 +08001737
1738MODULE_DESCRIPTION("ASoC RT5631 driver");
1739MODULE_AUTHOR("flove <flove@realtek.com>");
1740MODULE_LICENSE("GPL");