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Marc Zyngier66aaa7a2010-02-04 20:08:56 +00001/*
2 * drivers/char/watchdog/max63xx_wdt.c
3 *
4 * Driver for max63{69,70,71,72,73,74} watchdog timers
5 *
6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * This driver assumes the watchdog pins are memory mapped (as it is
13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
14 * another interface, some abstraction will have to be introduced.
15 */
16
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/fs.h>
22#include <linux/miscdevice.h>
23#include <linux/watchdog.h>
24#include <linux/init.h>
25#include <linux/bitops.h>
26#include <linux/platform_device.h>
27#include <linux/spinlock.h>
28#include <linux/uaccess.h>
29#include <linux/io.h>
30#include <linux/device.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Marc Zyngier66aaa7a2010-02-04 20:08:56 +000032
33#define DEFAULT_HEARTBEAT 60
34#define MAX_HEARTBEAT 60
35
36static int heartbeat = DEFAULT_HEARTBEAT;
37static int nowayout = WATCHDOG_NOWAYOUT;
38
39/*
40 * Memory mapping: a single byte, 3 first lower bits to select bit 3
41 * to ping the watchdog.
42 */
43#define MAX6369_WDSET (7 << 0)
44#define MAX6369_WDI (1 << 3)
45
46static DEFINE_SPINLOCK(io_lock);
47
48static unsigned long wdt_status;
49#define WDT_IN_USE 0
50#define WDT_RUNNING 1
51#define WDT_OK_TO_CLOSE 2
52
53static int nodelay;
54static struct resource *wdt_mem;
55static void __iomem *wdt_base;
56static struct platform_device *max63xx_pdev;
57
58/*
59 * The timeout values used are actually the absolute minimum the chip
60 * offers. Typical values on my board are slightly over twice as long
61 * (10s setting ends up with a 25s timeout), and can be up to 3 times
62 * the nominal setting (according to the datasheet). So please take
63 * these values with a grain of salt. Same goes for the initial delay
64 * "feature". Only max6373/74 have a few settings without this initial
65 * delay (selected with the "nodelay" parameter).
66 *
67 * I also decided to remove from the tables any timeout smaller than a
68 * second, as it looked completly overkill...
69 */
70
71/* Timeouts in second */
72struct max63xx_timeout {
73 u8 wdset;
74 u8 tdelay;
75 u8 twd;
76};
77
78static struct max63xx_timeout max6369_table[] = {
79 { 5, 1, 1 },
80 { 6, 10, 10 },
81 { 7, 60, 60 },
82 { },
83};
84
85static struct max63xx_timeout max6371_table[] = {
86 { 6, 60, 3 },
87 { 7, 60, 60 },
88 { },
89};
90
91static struct max63xx_timeout max6373_table[] = {
92 { 2, 60, 1 },
93 { 5, 0, 1 },
94 { 1, 3, 3 },
95 { 7, 60, 10 },
96 { 6, 0, 10 },
97 { },
98};
99
100static struct max63xx_timeout *current_timeout;
101
102static struct max63xx_timeout *
103max63xx_select_timeout(struct max63xx_timeout *table, int value)
104{
105 while (table->twd) {
106 if (value <= table->twd) {
107 if (nodelay && table->tdelay == 0)
108 return table;
109
110 if (!nodelay)
111 return table;
112 }
113
114 table++;
115 }
116
117 return NULL;
118}
119
120static void max63xx_wdt_ping(void)
121{
122 u8 val;
123
124 spin_lock(&io_lock);
125
126 val = __raw_readb(wdt_base);
127
128 __raw_writeb(val | MAX6369_WDI, wdt_base);
129 __raw_writeb(val & ~MAX6369_WDI, wdt_base);
130
131 spin_unlock(&io_lock);
132}
133
134static void max63xx_wdt_enable(struct max63xx_timeout *entry)
135{
136 u8 val;
137
138 if (test_and_set_bit(WDT_RUNNING, &wdt_status))
139 return;
140
141 spin_lock(&io_lock);
142
143 val = __raw_readb(wdt_base);
144 val &= ~MAX6369_WDSET;
145 val |= entry->wdset;
146 __raw_writeb(val, wdt_base);
147
148 spin_unlock(&io_lock);
149
150 /* check for a edge triggered startup */
151 if (entry->tdelay == 0)
152 max63xx_wdt_ping();
153}
154
155static void max63xx_wdt_disable(void)
156{
Marc Zyngierb1183e02010-04-09 17:43:33 +0100157 u8 val;
158
Marc Zyngier66aaa7a2010-02-04 20:08:56 +0000159 spin_lock(&io_lock);
160
Marc Zyngierb1183e02010-04-09 17:43:33 +0100161 val = __raw_readb(wdt_base);
162 val &= ~MAX6369_WDSET;
163 val |= 3;
164 __raw_writeb(val, wdt_base);
Marc Zyngier66aaa7a2010-02-04 20:08:56 +0000165
166 spin_unlock(&io_lock);
167
168 clear_bit(WDT_RUNNING, &wdt_status);
169}
170
171static int max63xx_wdt_open(struct inode *inode, struct file *file)
172{
173 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
174 return -EBUSY;
175
176 max63xx_wdt_enable(current_timeout);
177 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
178
179 return nonseekable_open(inode, file);
180}
181
182static ssize_t max63xx_wdt_write(struct file *file, const char *data,
183 size_t len, loff_t *ppos)
184{
185 if (len) {
186 if (!nowayout) {
187 size_t i;
188
189 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
190 for (i = 0; i != len; i++) {
191 char c;
192
193 if (get_user(c, data + i))
194 return -EFAULT;
195
196 if (c == 'V')
197 set_bit(WDT_OK_TO_CLOSE, &wdt_status);
198 }
199 }
200
201 max63xx_wdt_ping();
202 }
203
204 return len;
205}
206
207static const struct watchdog_info ident = {
208 .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
209 .identity = "max63xx Watchdog",
210};
211
212static long max63xx_wdt_ioctl(struct file *file, unsigned int cmd,
213 unsigned long arg)
214{
215 int ret = -ENOTTY;
216
217 switch (cmd) {
218 case WDIOC_GETSUPPORT:
219 ret = copy_to_user((struct watchdog_info *)arg, &ident,
220 sizeof(ident)) ? -EFAULT : 0;
221 break;
222
223 case WDIOC_GETSTATUS:
224 case WDIOC_GETBOOTSTATUS:
225 ret = put_user(0, (int *)arg);
226 break;
227
228 case WDIOC_KEEPALIVE:
229 max63xx_wdt_ping();
230 ret = 0;
231 break;
232
233 case WDIOC_GETTIMEOUT:
234 ret = put_user(heartbeat, (int *)arg);
235 break;
236 }
237 return ret;
238}
239
240static int max63xx_wdt_release(struct inode *inode, struct file *file)
241{
242 if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
243 max63xx_wdt_disable();
244 else
245 dev_crit(&max63xx_pdev->dev,
246 "device closed unexpectedly - timer will not stop\n");
247
248 clear_bit(WDT_IN_USE, &wdt_status);
249 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
250
251 return 0;
252}
253
254static const struct file_operations max63xx_wdt_fops = {
255 .owner = THIS_MODULE,
256 .llseek = no_llseek,
257 .write = max63xx_wdt_write,
258 .unlocked_ioctl = max63xx_wdt_ioctl,
259 .open = max63xx_wdt_open,
260 .release = max63xx_wdt_release,
261};
262
263static struct miscdevice max63xx_wdt_miscdev = {
264 .minor = WATCHDOG_MINOR,
265 .name = "watchdog",
266 .fops = &max63xx_wdt_fops,
267};
268
269static int __devinit max63xx_wdt_probe(struct platform_device *pdev)
270{
271 int ret = 0;
272 int size;
273 struct resource *res;
274 struct device *dev = &pdev->dev;
275 struct max63xx_timeout *table;
276
277 table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
278
279 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
280 heartbeat = DEFAULT_HEARTBEAT;
281
282 dev_info(dev, "requesting %ds heartbeat\n", heartbeat);
283 current_timeout = max63xx_select_timeout(table, heartbeat);
284
285 if (!current_timeout) {
286 dev_err(dev, "unable to satisfy heartbeat request\n");
287 return -EINVAL;
288 }
289
290 dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
291 current_timeout->twd, current_timeout->tdelay);
292
293 heartbeat = current_timeout->twd;
294
295 max63xx_pdev = pdev;
296
297 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
298 if (res == NULL) {
299 dev_err(dev, "failed to get memory region resource\n");
300 return -ENOENT;
301 }
302
303 size = resource_size(res);
304 wdt_mem = request_mem_region(res->start, size, pdev->name);
305
306 if (wdt_mem == NULL) {
307 dev_err(dev, "failed to get memory region\n");
308 return -ENOENT;
309 }
310
311 wdt_base = ioremap(res->start, size);
312 if (!wdt_base) {
313 dev_err(dev, "failed to map memory region\n");
314 ret = -ENOMEM;
315 goto out_request;
316 }
317
318 ret = misc_register(&max63xx_wdt_miscdev);
319 if (ret < 0) {
320 dev_err(dev, "cannot register misc device\n");
321 goto out_unmap;
322 }
323
324 return 0;
325
326out_unmap:
327 iounmap(wdt_base);
328out_request:
329 release_resource(wdt_mem);
330 kfree(wdt_mem);
331
332 return ret;
333}
334
335static int __devexit max63xx_wdt_remove(struct platform_device *pdev)
336{
337 misc_deregister(&max63xx_wdt_miscdev);
338 if (wdt_mem) {
339 release_resource(wdt_mem);
340 kfree(wdt_mem);
341 wdt_mem = NULL;
342 }
343
344 if (wdt_base)
345 iounmap(wdt_base);
346
347 return 0;
348}
349
350static struct platform_device_id max63xx_id_table[] = {
351 { "max6369_wdt", (kernel_ulong_t)max6369_table, },
352 { "max6370_wdt", (kernel_ulong_t)max6369_table, },
353 { "max6371_wdt", (kernel_ulong_t)max6371_table, },
354 { "max6372_wdt", (kernel_ulong_t)max6371_table, },
355 { "max6373_wdt", (kernel_ulong_t)max6373_table, },
356 { "max6374_wdt", (kernel_ulong_t)max6373_table, },
357 { },
358};
359MODULE_DEVICE_TABLE(platform, max63xx_id_table);
360
361static struct platform_driver max63xx_wdt_driver = {
362 .probe = max63xx_wdt_probe,
363 .remove = __devexit_p(max63xx_wdt_remove),
364 .id_table = max63xx_id_table,
365 .driver = {
366 .name = "max63xx_wdt",
367 .owner = THIS_MODULE,
368 },
369};
370
371static int __init max63xx_wdt_init(void)
372{
373 return platform_driver_register(&max63xx_wdt_driver);
374}
375
376static void __exit max63xx_wdt_exit(void)
377{
378 platform_driver_unregister(&max63xx_wdt_driver);
379}
380
381module_init(max63xx_wdt_init);
382module_exit(max63xx_wdt_exit);
383
384MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
385MODULE_DESCRIPTION("max63xx Watchdog Driver");
386
387module_param(heartbeat, int, 0);
388MODULE_PARM_DESC(heartbeat,
389 "Watchdog heartbeat period in seconds from 1 to "
390 __MODULE_STRING(MAX_HEARTBEAT) ", default "
391 __MODULE_STRING(DEFAULT_HEARTBEAT));
392
393module_param(nowayout, int, 0);
394MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
395 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
396
397module_param(nodelay, int, 0);
398MODULE_PARM_DESC(nodelay,
399 "Force selection of a timeout setting without initial delay "
400 "(max6373/74 only, default=0)");
401
402MODULE_LICENSE("GPL");
403MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);