Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * sound/ad1848.c |
| 3 | * |
| 4 | * The low level driver for the AD1848/CS4248 codec chip which |
| 5 | * is used for example in the MS Sound System. |
| 6 | * |
| 7 | * The CS4231 which is used in the GUS MAX and some other cards is |
| 8 | * upwards compatible with AD1848 and this driver is able to drive it. |
| 9 | * |
| 10 | * CS4231A and AD1845 are upward compatible with CS4231. However |
| 11 | * the new features of these chips are different. |
| 12 | * |
| 13 | * CS4232 is a PnP audio chip which contains a CS4231A (and SB, MPU). |
| 14 | * CS4232A is an improved version of CS4232. |
| 15 | * |
| 16 | * |
| 17 | * |
| 18 | * Copyright (C) by Hannu Savolainen 1993-1997 |
| 19 | * |
| 20 | * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL) |
| 21 | * Version 2 (June 1991). See the "COPYING" file distributed with this software |
| 22 | * for more info. |
| 23 | * |
| 24 | * |
| 25 | * Thomas Sailer : ioctl code reworked (vmalloc/vfree removed) |
| 26 | * general sleep/wakeup clean up. |
| 27 | * Alan Cox : reformatted. Fixed SMP bugs. Moved to kernel alloc/free |
| 28 | * of irqs. Use dev_id. |
| 29 | * Christoph Hellwig : adapted to module_init/module_exit |
| 30 | * Aki Laukkanen : added power management support |
| 31 | * Arnaldo C. de Melo : added missing restore_flags in ad1848_resume |
| 32 | * Miguel Freitas : added ISA PnP support |
| 33 | * Alan Cox : Added CS4236->4239 identification |
| 34 | * Daniel T. Cobra : Alernate config/mixer for later chips |
| 35 | * Alan Cox : Merged chip idents and config code |
| 36 | * |
| 37 | * TODO |
| 38 | * APM save restore assist code on IBM thinkpad |
| 39 | * |
| 40 | * Status: |
| 41 | * Tested. Believed fully functional. |
| 42 | */ |
| 43 | |
| 44 | #include <linux/config.h> |
| 45 | #include <linux/init.h> |
| 46 | #include <linux/interrupt.h> |
| 47 | #include <linux/module.h> |
| 48 | #include <linux/stddef.h> |
| 49 | #include <linux/pm.h> |
| 50 | #include <linux/isapnp.h> |
| 51 | #include <linux/pnp.h> |
| 52 | #include <linux/spinlock.h> |
| 53 | |
| 54 | #define DEB(x) |
| 55 | #define DEB1(x) |
| 56 | #include "sound_config.h" |
| 57 | |
| 58 | #include "ad1848.h" |
| 59 | #include "ad1848_mixer.h" |
| 60 | |
| 61 | typedef struct |
| 62 | { |
| 63 | spinlock_t lock; |
| 64 | int base; |
| 65 | int irq; |
| 66 | int dma1, dma2; |
| 67 | int dual_dma; /* 1, when two DMA channels allocated */ |
| 68 | int subtype; |
| 69 | unsigned char MCE_bit; |
| 70 | unsigned char saved_regs[64]; /* Includes extended register space */ |
| 71 | int debug_flag; |
| 72 | |
| 73 | int audio_flags; |
| 74 | int record_dev, playback_dev; |
| 75 | |
| 76 | int xfer_count; |
| 77 | int audio_mode; |
| 78 | int open_mode; |
| 79 | int intr_active; |
| 80 | char *chip_name, *name; |
| 81 | int model; |
| 82 | #define MD_1848 1 |
| 83 | #define MD_4231 2 |
| 84 | #define MD_4231A 3 |
| 85 | #define MD_1845 4 |
| 86 | #define MD_4232 5 |
| 87 | #define MD_C930 6 |
| 88 | #define MD_IWAVE 7 |
| 89 | #define MD_4235 8 /* Crystal Audio CS4235 */ |
| 90 | #define MD_1845_SSCAPE 9 /* Ensoniq Soundscape PNP*/ |
| 91 | #define MD_4236 10 /* 4236 and higher */ |
| 92 | #define MD_42xB 11 /* CS 42xB */ |
| 93 | #define MD_4239 12 /* CS4239 */ |
| 94 | |
| 95 | /* Mixer parameters */ |
| 96 | int recmask; |
| 97 | int supported_devices, orig_devices; |
| 98 | int supported_rec_devices, orig_rec_devices; |
| 99 | int *levels; |
| 100 | short mixer_reroute[32]; |
| 101 | int dev_no; |
| 102 | volatile unsigned long timer_ticks; |
| 103 | int timer_running; |
| 104 | int irq_ok; |
| 105 | mixer_ents *mix_devices; |
| 106 | int mixer_output_port; |
| 107 | |
| 108 | /* Power management */ |
| 109 | struct pm_dev *pmdev; |
| 110 | } ad1848_info; |
| 111 | |
| 112 | typedef struct ad1848_port_info |
| 113 | { |
| 114 | int open_mode; |
| 115 | int speed; |
| 116 | unsigned char speed_bits; |
| 117 | int channels; |
| 118 | int audio_format; |
| 119 | unsigned char format_bits; |
| 120 | } |
| 121 | ad1848_port_info; |
| 122 | |
| 123 | static struct address_info cfg; |
| 124 | static int nr_ad1848_devs; |
| 125 | |
| 126 | static int deskpro_xl; |
| 127 | static int deskpro_m; |
| 128 | static int soundpro; |
| 129 | |
| 130 | static volatile signed char irq2dev[17] = { |
| 131 | -1, -1, -1, -1, -1, -1, -1, -1, |
| 132 | -1, -1, -1, -1, -1, -1, -1, -1, -1 |
| 133 | }; |
| 134 | |
| 135 | #ifndef EXCLUDE_TIMERS |
| 136 | static int timer_installed = -1; |
| 137 | #endif |
| 138 | |
| 139 | static int loaded; |
| 140 | |
| 141 | static int ad_format_mask[13 /*devc->model */ ] = |
| 142 | { |
| 143 | 0, |
| 144 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW, |
| 145 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 146 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 147 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW, /* AD1845 */ |
| 148 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 149 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 150 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 151 | AFMT_U8 | AFMT_S16_LE /* CS4235 */, |
| 152 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW /* Ensoniq Soundscape*/, |
| 153 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 154 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM, |
| 155 | AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM |
| 156 | }; |
| 157 | |
| 158 | static ad1848_info adev_info[MAX_AUDIO_DEV]; |
| 159 | |
| 160 | #define io_Index_Addr(d) ((d)->base) |
| 161 | #define io_Indexed_Data(d) ((d)->base+1) |
| 162 | #define io_Status(d) ((d)->base+2) |
| 163 | #define io_Polled_IO(d) ((d)->base+3) |
| 164 | |
| 165 | static struct { |
| 166 | unsigned char flags; |
| 167 | #define CAP_F_TIMER 0x01 |
| 168 | } capabilities [10 /*devc->model */ ] = { |
| 169 | {0} |
| 170 | ,{0} /* MD_1848 */ |
| 171 | ,{CAP_F_TIMER} /* MD_4231 */ |
| 172 | ,{CAP_F_TIMER} /* MD_4231A */ |
| 173 | ,{CAP_F_TIMER} /* MD_1845 */ |
| 174 | ,{CAP_F_TIMER} /* MD_4232 */ |
| 175 | ,{0} /* MD_C930 */ |
| 176 | ,{CAP_F_TIMER} /* MD_IWAVE */ |
| 177 | ,{0} /* MD_4235 */ |
| 178 | ,{CAP_F_TIMER} /* MD_1845_SSCAPE */ |
| 179 | }; |
| 180 | |
| 181 | #ifdef CONFIG_PNP |
| 182 | static int isapnp = 1; |
| 183 | static int isapnpjump; |
| 184 | static int reverse; |
| 185 | |
| 186 | static int audio_activated; |
| 187 | #else |
| 188 | static int isapnp; |
| 189 | #endif |
| 190 | |
| 191 | |
| 192 | |
| 193 | static int ad1848_open(int dev, int mode); |
| 194 | static void ad1848_close(int dev); |
| 195 | static void ad1848_output_block(int dev, unsigned long buf, int count, int intrflag); |
| 196 | static void ad1848_start_input(int dev, unsigned long buf, int count, int intrflag); |
| 197 | static int ad1848_prepare_for_output(int dev, int bsize, int bcount); |
| 198 | static int ad1848_prepare_for_input(int dev, int bsize, int bcount); |
| 199 | static void ad1848_halt(int dev); |
| 200 | static void ad1848_halt_input(int dev); |
| 201 | static void ad1848_halt_output(int dev); |
| 202 | static void ad1848_trigger(int dev, int bits); |
| 203 | static int ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data); |
| 204 | |
| 205 | #ifndef EXCLUDE_TIMERS |
| 206 | static int ad1848_tmr_install(int dev); |
| 207 | static void ad1848_tmr_reprogram(int dev); |
| 208 | #endif |
| 209 | |
| 210 | static int ad_read(ad1848_info * devc, int reg) |
| 211 | { |
| 212 | int x; |
| 213 | int timeout = 900000; |
| 214 | |
| 215 | while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */ |
| 216 | timeout--; |
| 217 | |
| 218 | if(reg < 32) |
| 219 | { |
| 220 | outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); |
| 221 | x = inb(io_Indexed_Data(devc)); |
| 222 | } |
| 223 | else |
| 224 | { |
| 225 | int xreg, xra; |
| 226 | |
| 227 | xreg = (reg & 0xff) - 32; |
| 228 | xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2); |
| 229 | outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); |
| 230 | outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc)); |
| 231 | x = inb(io_Indexed_Data(devc)); |
| 232 | } |
| 233 | |
| 234 | return x; |
| 235 | } |
| 236 | |
| 237 | static void ad_write(ad1848_info * devc, int reg, int data) |
| 238 | { |
| 239 | int timeout = 900000; |
| 240 | |
| 241 | while (timeout > 0 && inb(devc->base) == 0x80) /* Are we initializing */ |
| 242 | timeout--; |
| 243 | |
| 244 | if(reg < 32) |
| 245 | { |
| 246 | outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); |
| 247 | outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc)); |
| 248 | } |
| 249 | else |
| 250 | { |
| 251 | int xreg, xra; |
| 252 | |
| 253 | xreg = (reg & 0xff) - 32; |
| 254 | xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2); |
| 255 | outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); |
| 256 | outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc)); |
| 257 | outb((unsigned char) (data & 0xff), io_Indexed_Data(devc)); |
| 258 | } |
| 259 | } |
| 260 | |
| 261 | static void wait_for_calibration(ad1848_info * devc) |
| 262 | { |
| 263 | int timeout = 0; |
| 264 | |
| 265 | /* |
| 266 | * Wait until the auto calibration process has finished. |
| 267 | * |
| 268 | * 1) Wait until the chip becomes ready (reads don't return 0x80). |
| 269 | * 2) Wait until the ACI bit of I11 gets on and then off. |
| 270 | */ |
| 271 | |
| 272 | timeout = 100000; |
| 273 | while (timeout > 0 && inb(devc->base) == 0x80) |
| 274 | timeout--; |
| 275 | if (inb(devc->base) & 0x80) |
| 276 | printk(KERN_WARNING "ad1848: Auto calibration timed out(1).\n"); |
| 277 | |
| 278 | timeout = 100; |
| 279 | while (timeout > 0 && !(ad_read(devc, 11) & 0x20)) |
| 280 | timeout--; |
| 281 | if (!(ad_read(devc, 11) & 0x20)) |
| 282 | return; |
| 283 | |
| 284 | timeout = 80000; |
| 285 | while (timeout > 0 && (ad_read(devc, 11) & 0x20)) |
| 286 | timeout--; |
| 287 | if (ad_read(devc, 11) & 0x20) |
| 288 | if ( (devc->model != MD_1845) || (devc->model != MD_1845_SSCAPE)) |
| 289 | printk(KERN_WARNING "ad1848: Auto calibration timed out(3).\n"); |
| 290 | } |
| 291 | |
| 292 | static void ad_mute(ad1848_info * devc) |
| 293 | { |
| 294 | int i; |
| 295 | unsigned char prev; |
| 296 | |
| 297 | /* |
| 298 | * Save old register settings and mute output channels |
| 299 | */ |
| 300 | |
| 301 | for (i = 6; i < 8; i++) |
| 302 | { |
| 303 | prev = devc->saved_regs[i] = ad_read(devc, i); |
| 304 | } |
| 305 | |
| 306 | } |
| 307 | |
| 308 | static void ad_unmute(ad1848_info * devc) |
| 309 | { |
| 310 | } |
| 311 | |
| 312 | static void ad_enter_MCE(ad1848_info * devc) |
| 313 | { |
| 314 | int timeout = 1000; |
| 315 | unsigned short prev; |
| 316 | |
| 317 | while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */ |
| 318 | timeout--; |
| 319 | |
| 320 | devc->MCE_bit = 0x40; |
| 321 | prev = inb(io_Index_Addr(devc)); |
| 322 | if (prev & 0x40) |
| 323 | { |
| 324 | return; |
| 325 | } |
| 326 | outb((devc->MCE_bit), io_Index_Addr(devc)); |
| 327 | } |
| 328 | |
| 329 | static void ad_leave_MCE(ad1848_info * devc) |
| 330 | { |
| 331 | unsigned char prev, acal; |
| 332 | int timeout = 1000; |
| 333 | |
| 334 | while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */ |
| 335 | timeout--; |
| 336 | |
| 337 | acal = ad_read(devc, 9); |
| 338 | |
| 339 | devc->MCE_bit = 0x00; |
| 340 | prev = inb(io_Index_Addr(devc)); |
| 341 | outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */ |
| 342 | |
| 343 | if ((prev & 0x40) == 0) /* Not in MCE mode */ |
| 344 | { |
| 345 | return; |
| 346 | } |
| 347 | outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */ |
| 348 | if (acal & 0x08) /* Auto calibration is enabled */ |
| 349 | wait_for_calibration(devc); |
| 350 | } |
| 351 | |
| 352 | static int ad1848_set_recmask(ad1848_info * devc, int mask) |
| 353 | { |
| 354 | unsigned char recdev; |
| 355 | int i, n; |
| 356 | unsigned long flags; |
| 357 | |
| 358 | mask &= devc->supported_rec_devices; |
| 359 | |
| 360 | /* Rename the mixer bits if necessary */ |
| 361 | for (i = 0; i < 32; i++) |
| 362 | { |
| 363 | if (devc->mixer_reroute[i] != i) |
| 364 | { |
| 365 | if (mask & (1 << i)) |
| 366 | { |
| 367 | mask &= ~(1 << i); |
| 368 | mask |= (1 << devc->mixer_reroute[i]); |
| 369 | } |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | n = 0; |
| 374 | for (i = 0; i < 32; i++) /* Count selected device bits */ |
| 375 | if (mask & (1 << i)) |
| 376 | n++; |
| 377 | |
| 378 | spin_lock_irqsave(&devc->lock,flags); |
| 379 | if (!soundpro) { |
| 380 | if (n == 0) |
| 381 | mask = SOUND_MASK_MIC; |
| 382 | else if (n != 1) { /* Too many devices selected */ |
| 383 | mask &= ~devc->recmask; /* Filter out active settings */ |
| 384 | |
| 385 | n = 0; |
| 386 | for (i = 0; i < 32; i++) /* Count selected device bits */ |
| 387 | if (mask & (1 << i)) |
| 388 | n++; |
| 389 | |
| 390 | if (n != 1) |
| 391 | mask = SOUND_MASK_MIC; |
| 392 | } |
| 393 | switch (mask) { |
| 394 | case SOUND_MASK_MIC: |
| 395 | recdev = 2; |
| 396 | break; |
| 397 | |
| 398 | case SOUND_MASK_LINE: |
| 399 | case SOUND_MASK_LINE3: |
| 400 | recdev = 0; |
| 401 | break; |
| 402 | |
| 403 | case SOUND_MASK_CD: |
| 404 | case SOUND_MASK_LINE1: |
| 405 | recdev = 1; |
| 406 | break; |
| 407 | |
| 408 | case SOUND_MASK_IMIX: |
| 409 | recdev = 3; |
| 410 | break; |
| 411 | |
| 412 | default: |
| 413 | mask = SOUND_MASK_MIC; |
| 414 | recdev = 2; |
| 415 | } |
| 416 | |
| 417 | recdev <<= 6; |
| 418 | ad_write(devc, 0, (ad_read(devc, 0) & 0x3f) | recdev); |
| 419 | ad_write(devc, 1, (ad_read(devc, 1) & 0x3f) | recdev); |
| 420 | } else { /* soundpro */ |
| 421 | unsigned char val; |
| 422 | int set_rec_bit; |
| 423 | int j; |
| 424 | |
| 425 | for (i = 0; i < 32; i++) { /* For each bit */ |
| 426 | if ((devc->supported_rec_devices & (1 << i)) == 0) |
| 427 | continue; /* Device not supported */ |
| 428 | |
| 429 | for (j = LEFT_CHN; j <= RIGHT_CHN; j++) { |
| 430 | if (devc->mix_devices[i][j].nbits == 0) /* Inexistent channel */ |
| 431 | continue; |
| 432 | |
| 433 | /* |
| 434 | * This is tricky: |
| 435 | * set_rec_bit becomes 1 if the corresponding bit in mask is set |
| 436 | * then it gets flipped if the polarity is inverse |
| 437 | */ |
| 438 | set_rec_bit = ((mask & (1 << i)) != 0) ^ devc->mix_devices[i][j].recpol; |
| 439 | |
| 440 | val = ad_read(devc, devc->mix_devices[i][j].recreg); |
| 441 | val &= ~(1 << devc->mix_devices[i][j].recpos); |
| 442 | val |= (set_rec_bit << devc->mix_devices[i][j].recpos); |
| 443 | ad_write(devc, devc->mix_devices[i][j].recreg, val); |
| 444 | } |
| 445 | } |
| 446 | } |
| 447 | spin_unlock_irqrestore(&devc->lock,flags); |
| 448 | |
| 449 | /* Rename the mixer bits back if necessary */ |
| 450 | for (i = 0; i < 32; i++) |
| 451 | { |
| 452 | if (devc->mixer_reroute[i] != i) |
| 453 | { |
| 454 | if (mask & (1 << devc->mixer_reroute[i])) |
| 455 | { |
| 456 | mask &= ~(1 << devc->mixer_reroute[i]); |
| 457 | mask |= (1 << i); |
| 458 | } |
| 459 | } |
| 460 | } |
| 461 | devc->recmask = mask; |
| 462 | return mask; |
| 463 | } |
| 464 | |
| 465 | static void change_bits(ad1848_info * devc, unsigned char *regval, |
| 466 | unsigned char *muteval, int dev, int chn, int newval) |
| 467 | { |
| 468 | unsigned char mask; |
| 469 | int shift; |
| 470 | int mute; |
| 471 | int mutemask; |
| 472 | int set_mute_bit; |
| 473 | |
| 474 | set_mute_bit = (newval == 0) ^ devc->mix_devices[dev][chn].mutepol; |
| 475 | |
| 476 | if (devc->mix_devices[dev][chn].polarity == 1) /* Reverse */ |
| 477 | newval = 100 - newval; |
| 478 | |
| 479 | mask = (1 << devc->mix_devices[dev][chn].nbits) - 1; |
| 480 | shift = devc->mix_devices[dev][chn].bitpos; |
| 481 | |
| 482 | if (devc->mix_devices[dev][chn].mutepos == 8) |
| 483 | { /* if there is no mute bit */ |
| 484 | mute = 0; /* No mute bit; do nothing special */ |
| 485 | mutemask = ~0; /* No mute bit; do nothing special */ |
| 486 | } |
| 487 | else |
| 488 | { |
| 489 | mute = (set_mute_bit << devc->mix_devices[dev][chn].mutepos); |
| 490 | mutemask = ~(1 << devc->mix_devices[dev][chn].mutepos); |
| 491 | } |
| 492 | |
| 493 | newval = (int) ((newval * mask) + 50) / 100; /* Scale it */ |
| 494 | *regval &= ~(mask << shift); /* Clear bits */ |
| 495 | *regval |= (newval & mask) << shift; /* Set new value */ |
| 496 | |
| 497 | *muteval &= mutemask; |
| 498 | *muteval |= mute; |
| 499 | } |
| 500 | |
| 501 | static int ad1848_mixer_get(ad1848_info * devc, int dev) |
| 502 | { |
| 503 | if (!((1 << dev) & devc->supported_devices)) |
| 504 | return -EINVAL; |
| 505 | |
| 506 | dev = devc->mixer_reroute[dev]; |
| 507 | |
| 508 | return devc->levels[dev]; |
| 509 | } |
| 510 | |
| 511 | static void ad1848_mixer_set_channel(ad1848_info *devc, int dev, int value, int channel) |
| 512 | { |
| 513 | int regoffs, muteregoffs; |
| 514 | unsigned char val, muteval; |
| 515 | unsigned long flags; |
| 516 | |
| 517 | regoffs = devc->mix_devices[dev][channel].regno; |
| 518 | muteregoffs = devc->mix_devices[dev][channel].mutereg; |
| 519 | val = ad_read(devc, regoffs); |
| 520 | |
| 521 | if (muteregoffs != regoffs) { |
| 522 | muteval = ad_read(devc, muteregoffs); |
| 523 | change_bits(devc, &val, &muteval, dev, channel, value); |
| 524 | } |
| 525 | else |
| 526 | change_bits(devc, &val, &val, dev, channel, value); |
| 527 | |
| 528 | spin_lock_irqsave(&devc->lock,flags); |
| 529 | ad_write(devc, regoffs, val); |
| 530 | devc->saved_regs[regoffs] = val; |
| 531 | if (muteregoffs != regoffs) { |
| 532 | ad_write(devc, muteregoffs, muteval); |
| 533 | devc->saved_regs[muteregoffs] = muteval; |
| 534 | } |
| 535 | spin_unlock_irqrestore(&devc->lock,flags); |
| 536 | } |
| 537 | |
| 538 | static int ad1848_mixer_set(ad1848_info * devc, int dev, int value) |
| 539 | { |
| 540 | int left = value & 0x000000ff; |
| 541 | int right = (value & 0x0000ff00) >> 8; |
| 542 | int retvol; |
| 543 | |
| 544 | if (dev > 31) |
| 545 | return -EINVAL; |
| 546 | |
| 547 | if (!(devc->supported_devices & (1 << dev))) |
| 548 | return -EINVAL; |
| 549 | |
| 550 | dev = devc->mixer_reroute[dev]; |
| 551 | |
| 552 | if (devc->mix_devices[dev][LEFT_CHN].nbits == 0) |
| 553 | return -EINVAL; |
| 554 | |
| 555 | if (left > 100) |
| 556 | left = 100; |
| 557 | if (right > 100) |
| 558 | right = 100; |
| 559 | |
| 560 | if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0) /* Mono control */ |
| 561 | right = left; |
| 562 | |
| 563 | retvol = left | (right << 8); |
| 564 | |
| 565 | /* Scale volumes */ |
| 566 | left = mix_cvt[left]; |
| 567 | right = mix_cvt[right]; |
| 568 | |
| 569 | devc->levels[dev] = retvol; |
| 570 | |
| 571 | /* |
| 572 | * Set the left channel |
| 573 | */ |
| 574 | ad1848_mixer_set_channel(devc, dev, left, LEFT_CHN); |
| 575 | |
| 576 | /* |
| 577 | * Set the right channel |
| 578 | */ |
| 579 | if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0) |
| 580 | goto out; |
| 581 | ad1848_mixer_set_channel(devc, dev, right, RIGHT_CHN); |
| 582 | |
| 583 | out: |
| 584 | return retvol; |
| 585 | } |
| 586 | |
| 587 | static void ad1848_mixer_reset(ad1848_info * devc) |
| 588 | { |
| 589 | int i; |
| 590 | char name[32]; |
| 591 | unsigned long flags; |
| 592 | |
| 593 | devc->mix_devices = &(ad1848_mix_devices[0]); |
| 594 | |
| 595 | sprintf(name, "%s_%d", devc->chip_name, nr_ad1848_devs); |
| 596 | |
| 597 | for (i = 0; i < 32; i++) |
| 598 | devc->mixer_reroute[i] = i; |
| 599 | |
| 600 | devc->supported_rec_devices = MODE1_REC_DEVICES; |
| 601 | |
| 602 | switch (devc->model) |
| 603 | { |
| 604 | case MD_4231: |
| 605 | case MD_4231A: |
| 606 | case MD_1845: |
| 607 | case MD_1845_SSCAPE: |
| 608 | devc->supported_devices = MODE2_MIXER_DEVICES; |
| 609 | break; |
| 610 | |
| 611 | case MD_C930: |
| 612 | devc->supported_devices = C930_MIXER_DEVICES; |
| 613 | devc->mix_devices = &(c930_mix_devices[0]); |
| 614 | break; |
| 615 | |
| 616 | case MD_IWAVE: |
| 617 | devc->supported_devices = MODE3_MIXER_DEVICES; |
| 618 | devc->mix_devices = &(iwave_mix_devices[0]); |
| 619 | break; |
| 620 | |
| 621 | case MD_42xB: |
| 622 | case MD_4239: |
| 623 | devc->mix_devices = &(cs42xb_mix_devices[0]); |
| 624 | devc->supported_devices = MODE3_MIXER_DEVICES; |
| 625 | break; |
| 626 | case MD_4232: |
| 627 | case MD_4235: |
| 628 | case MD_4236: |
| 629 | devc->supported_devices = MODE3_MIXER_DEVICES; |
| 630 | break; |
| 631 | |
| 632 | case MD_1848: |
| 633 | if (soundpro) { |
| 634 | devc->supported_devices = SPRO_MIXER_DEVICES; |
| 635 | devc->supported_rec_devices = SPRO_REC_DEVICES; |
| 636 | devc->mix_devices = &(spro_mix_devices[0]); |
| 637 | break; |
| 638 | } |
| 639 | |
| 640 | default: |
| 641 | devc->supported_devices = MODE1_MIXER_DEVICES; |
| 642 | } |
| 643 | |
| 644 | devc->orig_devices = devc->supported_devices; |
| 645 | devc->orig_rec_devices = devc->supported_rec_devices; |
| 646 | |
| 647 | devc->levels = load_mixer_volumes(name, default_mixer_levels, 1); |
| 648 | |
| 649 | for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) |
| 650 | { |
| 651 | if (devc->supported_devices & (1 << i)) |
| 652 | ad1848_mixer_set(devc, i, devc->levels[i]); |
| 653 | } |
| 654 | |
| 655 | ad1848_set_recmask(devc, SOUND_MASK_MIC); |
| 656 | |
| 657 | devc->mixer_output_port = devc->levels[31] | AUDIO_HEADPHONE | AUDIO_LINE_OUT; |
| 658 | |
| 659 | spin_lock_irqsave(&devc->lock,flags); |
| 660 | if (!soundpro) { |
| 661 | if (devc->mixer_output_port & AUDIO_SPEAKER) |
| 662 | ad_write(devc, 26, ad_read(devc, 26) & ~0x40); /* Unmute mono out */ |
| 663 | else |
| 664 | ad_write(devc, 26, ad_read(devc, 26) | 0x40); /* Mute mono out */ |
| 665 | } else { |
| 666 | /* |
| 667 | * From the "wouldn't it be nice if the mixer API had (better) |
| 668 | * support for custom stuff" category |
| 669 | */ |
| 670 | /* Enable surround mode and SB16 mixer */ |
| 671 | ad_write(devc, 16, 0x60); |
| 672 | } |
| 673 | spin_unlock_irqrestore(&devc->lock,flags); |
| 674 | } |
| 675 | |
| 676 | static int ad1848_mixer_ioctl(int dev, unsigned int cmd, void __user *arg) |
| 677 | { |
| 678 | ad1848_info *devc = mixer_devs[dev]->devc; |
| 679 | int val; |
| 680 | |
| 681 | if (cmd == SOUND_MIXER_PRIVATE1) |
| 682 | { |
| 683 | if (get_user(val, (int __user *)arg)) |
| 684 | return -EFAULT; |
| 685 | |
| 686 | if (val != 0xffff) |
| 687 | { |
| 688 | unsigned long flags; |
| 689 | val &= (AUDIO_SPEAKER | AUDIO_HEADPHONE | AUDIO_LINE_OUT); |
| 690 | devc->mixer_output_port = val; |
| 691 | val |= AUDIO_HEADPHONE | AUDIO_LINE_OUT; /* Always on */ |
| 692 | devc->mixer_output_port = val; |
| 693 | spin_lock_irqsave(&devc->lock,flags); |
| 694 | if (val & AUDIO_SPEAKER) |
| 695 | ad_write(devc, 26, ad_read(devc, 26) & ~0x40); /* Unmute mono out */ |
| 696 | else |
| 697 | ad_write(devc, 26, ad_read(devc, 26) | 0x40); /* Mute mono out */ |
| 698 | spin_unlock_irqrestore(&devc->lock,flags); |
| 699 | } |
| 700 | val = devc->mixer_output_port; |
| 701 | return put_user(val, (int __user *)arg); |
| 702 | } |
| 703 | if (cmd == SOUND_MIXER_PRIVATE2) |
| 704 | { |
| 705 | if (get_user(val, (int __user *)arg)) |
| 706 | return -EFAULT; |
| 707 | return(ad1848_control(AD1848_MIXER_REROUTE, val)); |
| 708 | } |
| 709 | if (((cmd >> 8) & 0xff) == 'M') |
| 710 | { |
| 711 | if (_SIOC_DIR(cmd) & _SIOC_WRITE) |
| 712 | { |
| 713 | switch (cmd & 0xff) |
| 714 | { |
| 715 | case SOUND_MIXER_RECSRC: |
| 716 | if (get_user(val, (int __user *)arg)) |
| 717 | return -EFAULT; |
| 718 | val = ad1848_set_recmask(devc, val); |
| 719 | break; |
| 720 | |
| 721 | default: |
| 722 | if (get_user(val, (int __user *)arg)) |
| 723 | return -EFAULT; |
| 724 | val = ad1848_mixer_set(devc, cmd & 0xff, val); |
| 725 | break; |
| 726 | } |
| 727 | return put_user(val, (int __user *)arg); |
| 728 | } |
| 729 | else |
| 730 | { |
| 731 | switch (cmd & 0xff) |
| 732 | { |
| 733 | /* |
| 734 | * Return parameters |
| 735 | */ |
| 736 | |
| 737 | case SOUND_MIXER_RECSRC: |
| 738 | val = devc->recmask; |
| 739 | break; |
| 740 | |
| 741 | case SOUND_MIXER_DEVMASK: |
| 742 | val = devc->supported_devices; |
| 743 | break; |
| 744 | |
| 745 | case SOUND_MIXER_STEREODEVS: |
| 746 | val = devc->supported_devices; |
| 747 | if (devc->model != MD_C930) |
| 748 | val &= ~(SOUND_MASK_SPEAKER | SOUND_MASK_IMIX); |
| 749 | break; |
| 750 | |
| 751 | case SOUND_MIXER_RECMASK: |
| 752 | val = devc->supported_rec_devices; |
| 753 | break; |
| 754 | |
| 755 | case SOUND_MIXER_CAPS: |
| 756 | val=SOUND_CAP_EXCL_INPUT; |
| 757 | break; |
| 758 | |
| 759 | default: |
| 760 | val = ad1848_mixer_get(devc, cmd & 0xff); |
| 761 | break; |
| 762 | } |
| 763 | return put_user(val, (int __user *)arg); |
| 764 | } |
| 765 | } |
| 766 | else |
| 767 | return -EINVAL; |
| 768 | } |
| 769 | |
| 770 | static int ad1848_set_speed(int dev, int arg) |
| 771 | { |
| 772 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 773 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 774 | |
| 775 | /* |
| 776 | * The sampling speed is encoded in the least significant nibble of I8. The |
| 777 | * LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and other |
| 778 | * three bits select the divisor (indirectly): |
| 779 | * |
| 780 | * The available speeds are in the following table. Keep the speeds in |
| 781 | * the increasing order. |
| 782 | */ |
| 783 | typedef struct |
| 784 | { |
| 785 | int speed; |
| 786 | unsigned char bits; |
| 787 | } |
| 788 | speed_struct; |
| 789 | |
| 790 | static speed_struct speed_table[] = |
| 791 | { |
| 792 | {5510, (0 << 1) | 1}, |
| 793 | {5510, (0 << 1) | 1}, |
| 794 | {6620, (7 << 1) | 1}, |
| 795 | {8000, (0 << 1) | 0}, |
| 796 | {9600, (7 << 1) | 0}, |
| 797 | {11025, (1 << 1) | 1}, |
| 798 | {16000, (1 << 1) | 0}, |
| 799 | {18900, (2 << 1) | 1}, |
| 800 | {22050, (3 << 1) | 1}, |
| 801 | {27420, (2 << 1) | 0}, |
| 802 | {32000, (3 << 1) | 0}, |
| 803 | {33075, (6 << 1) | 1}, |
| 804 | {37800, (4 << 1) | 1}, |
| 805 | {44100, (5 << 1) | 1}, |
| 806 | {48000, (6 << 1) | 0} |
| 807 | }; |
| 808 | |
| 809 | int i, n, selected = -1; |
| 810 | |
| 811 | n = sizeof(speed_table) / sizeof(speed_struct); |
| 812 | |
| 813 | if (arg <= 0) |
| 814 | return portc->speed; |
| 815 | |
| 816 | if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* AD1845 has different timer than others */ |
| 817 | { |
| 818 | if (arg < 4000) |
| 819 | arg = 4000; |
| 820 | if (arg > 50000) |
| 821 | arg = 50000; |
| 822 | |
| 823 | portc->speed = arg; |
| 824 | portc->speed_bits = speed_table[3].bits; |
| 825 | return portc->speed; |
| 826 | } |
| 827 | if (arg < speed_table[0].speed) |
| 828 | selected = 0; |
| 829 | if (arg > speed_table[n - 1].speed) |
| 830 | selected = n - 1; |
| 831 | |
| 832 | for (i = 1 /*really */ ; selected == -1 && i < n; i++) |
| 833 | { |
| 834 | if (speed_table[i].speed == arg) |
| 835 | selected = i; |
| 836 | else if (speed_table[i].speed > arg) |
| 837 | { |
| 838 | int diff1, diff2; |
| 839 | |
| 840 | diff1 = arg - speed_table[i - 1].speed; |
| 841 | diff2 = speed_table[i].speed - arg; |
| 842 | |
| 843 | if (diff1 < diff2) |
| 844 | selected = i - 1; |
| 845 | else |
| 846 | selected = i; |
| 847 | } |
| 848 | } |
| 849 | if (selected == -1) |
| 850 | { |
| 851 | printk(KERN_WARNING "ad1848: Can't find speed???\n"); |
| 852 | selected = 3; |
| 853 | } |
| 854 | portc->speed = speed_table[selected].speed; |
| 855 | portc->speed_bits = speed_table[selected].bits; |
| 856 | return portc->speed; |
| 857 | } |
| 858 | |
| 859 | static short ad1848_set_channels(int dev, short arg) |
| 860 | { |
| 861 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 862 | |
| 863 | if (arg != 1 && arg != 2) |
| 864 | return portc->channels; |
| 865 | |
| 866 | portc->channels = arg; |
| 867 | return arg; |
| 868 | } |
| 869 | |
| 870 | static unsigned int ad1848_set_bits(int dev, unsigned int arg) |
| 871 | { |
| 872 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 873 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 874 | |
| 875 | static struct format_tbl |
| 876 | { |
| 877 | int format; |
| 878 | unsigned char bits; |
| 879 | } |
| 880 | format2bits[] = |
| 881 | { |
| 882 | { |
| 883 | 0, 0 |
| 884 | } |
| 885 | , |
| 886 | { |
| 887 | AFMT_MU_LAW, 1 |
| 888 | } |
| 889 | , |
| 890 | { |
| 891 | AFMT_A_LAW, 3 |
| 892 | } |
| 893 | , |
| 894 | { |
| 895 | AFMT_IMA_ADPCM, 5 |
| 896 | } |
| 897 | , |
| 898 | { |
| 899 | AFMT_U8, 0 |
| 900 | } |
| 901 | , |
| 902 | { |
| 903 | AFMT_S16_LE, 2 |
| 904 | } |
| 905 | , |
| 906 | { |
| 907 | AFMT_S16_BE, 6 |
| 908 | } |
| 909 | , |
| 910 | { |
| 911 | AFMT_S8, 0 |
| 912 | } |
| 913 | , |
| 914 | { |
| 915 | AFMT_U16_LE, 0 |
| 916 | } |
| 917 | , |
| 918 | { |
| 919 | AFMT_U16_BE, 0 |
| 920 | } |
| 921 | }; |
| 922 | int i, n = sizeof(format2bits) / sizeof(struct format_tbl); |
| 923 | |
| 924 | if (arg == 0) |
| 925 | return portc->audio_format; |
| 926 | |
| 927 | if (!(arg & ad_format_mask[devc->model])) |
| 928 | arg = AFMT_U8; |
| 929 | |
| 930 | portc->audio_format = arg; |
| 931 | |
| 932 | for (i = 0; i < n; i++) |
| 933 | if (format2bits[i].format == arg) |
| 934 | { |
| 935 | if ((portc->format_bits = format2bits[i].bits) == 0) |
| 936 | return portc->audio_format = AFMT_U8; /* Was not supported */ |
| 937 | |
| 938 | return arg; |
| 939 | } |
| 940 | /* Still hanging here. Something must be terribly wrong */ |
| 941 | portc->format_bits = 0; |
| 942 | return portc->audio_format = AFMT_U8; |
| 943 | } |
| 944 | |
| 945 | static struct audio_driver ad1848_audio_driver = |
| 946 | { |
| 947 | .owner = THIS_MODULE, |
| 948 | .open = ad1848_open, |
| 949 | .close = ad1848_close, |
| 950 | .output_block = ad1848_output_block, |
| 951 | .start_input = ad1848_start_input, |
| 952 | .prepare_for_input = ad1848_prepare_for_input, |
| 953 | .prepare_for_output = ad1848_prepare_for_output, |
| 954 | .halt_io = ad1848_halt, |
| 955 | .halt_input = ad1848_halt_input, |
| 956 | .halt_output = ad1848_halt_output, |
| 957 | .trigger = ad1848_trigger, |
| 958 | .set_speed = ad1848_set_speed, |
| 959 | .set_bits = ad1848_set_bits, |
| 960 | .set_channels = ad1848_set_channels |
| 961 | }; |
| 962 | |
| 963 | static struct mixer_operations ad1848_mixer_operations = |
| 964 | { |
| 965 | .owner = THIS_MODULE, |
| 966 | .id = "SOUNDPORT", |
| 967 | .name = "AD1848/CS4248/CS4231", |
| 968 | .ioctl = ad1848_mixer_ioctl |
| 969 | }; |
| 970 | |
| 971 | static int ad1848_open(int dev, int mode) |
| 972 | { |
| 973 | ad1848_info *devc; |
| 974 | ad1848_port_info *portc; |
| 975 | unsigned long flags; |
| 976 | |
| 977 | if (dev < 0 || dev >= num_audiodevs) |
| 978 | return -ENXIO; |
| 979 | |
| 980 | devc = (ad1848_info *) audio_devs[dev]->devc; |
| 981 | portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 982 | |
| 983 | /* here we don't have to protect against intr */ |
| 984 | spin_lock(&devc->lock); |
| 985 | if (portc->open_mode || (devc->open_mode & mode)) |
| 986 | { |
| 987 | spin_unlock(&devc->lock); |
| 988 | return -EBUSY; |
| 989 | } |
| 990 | devc->dual_dma = 0; |
| 991 | |
| 992 | if (audio_devs[dev]->flags & DMA_DUPLEX) |
| 993 | { |
| 994 | devc->dual_dma = 1; |
| 995 | } |
| 996 | devc->intr_active = 0; |
| 997 | devc->audio_mode = 0; |
| 998 | devc->open_mode |= mode; |
| 999 | portc->open_mode = mode; |
| 1000 | spin_unlock(&devc->lock); |
| 1001 | ad1848_trigger(dev, 0); |
| 1002 | |
| 1003 | if (mode & OPEN_READ) |
| 1004 | devc->record_dev = dev; |
| 1005 | if (mode & OPEN_WRITE) |
| 1006 | devc->playback_dev = dev; |
| 1007 | /* |
| 1008 | * Mute output until the playback really starts. This decreases clicking (hope so). |
| 1009 | */ |
| 1010 | spin_lock_irqsave(&devc->lock,flags); |
| 1011 | ad_mute(devc); |
| 1012 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1013 | |
| 1014 | return 0; |
| 1015 | } |
| 1016 | |
| 1017 | static void ad1848_close(int dev) |
| 1018 | { |
| 1019 | unsigned long flags; |
| 1020 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1021 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1022 | |
| 1023 | DEB(printk("ad1848_close(void)\n")); |
| 1024 | |
| 1025 | devc->intr_active = 0; |
| 1026 | ad1848_halt(dev); |
| 1027 | |
| 1028 | spin_lock_irqsave(&devc->lock,flags); |
| 1029 | |
| 1030 | devc->audio_mode = 0; |
| 1031 | devc->open_mode &= ~portc->open_mode; |
| 1032 | portc->open_mode = 0; |
| 1033 | |
| 1034 | ad_unmute(devc); |
| 1035 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1036 | } |
| 1037 | |
| 1038 | static void ad1848_output_block(int dev, unsigned long buf, int count, int intrflag) |
| 1039 | { |
| 1040 | unsigned long flags, cnt; |
| 1041 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1042 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1043 | |
| 1044 | cnt = count; |
| 1045 | |
| 1046 | if (portc->audio_format == AFMT_IMA_ADPCM) |
| 1047 | { |
| 1048 | cnt /= 4; |
| 1049 | } |
| 1050 | else |
| 1051 | { |
| 1052 | if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE)) /* 16 bit data */ |
| 1053 | cnt >>= 1; |
| 1054 | } |
| 1055 | if (portc->channels > 1) |
| 1056 | cnt >>= 1; |
| 1057 | cnt--; |
| 1058 | |
| 1059 | if ((devc->audio_mode & PCM_ENABLE_OUTPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) && |
| 1060 | intrflag && |
| 1061 | cnt == devc->xfer_count) |
| 1062 | { |
| 1063 | devc->audio_mode |= PCM_ENABLE_OUTPUT; |
| 1064 | devc->intr_active = 1; |
| 1065 | return; /* |
| 1066 | * Auto DMA mode on. No need to react |
| 1067 | */ |
| 1068 | } |
| 1069 | spin_lock_irqsave(&devc->lock,flags); |
| 1070 | |
| 1071 | ad_write(devc, 15, (unsigned char) (cnt & 0xff)); |
| 1072 | ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff)); |
| 1073 | |
| 1074 | devc->xfer_count = cnt; |
| 1075 | devc->audio_mode |= PCM_ENABLE_OUTPUT; |
| 1076 | devc->intr_active = 1; |
| 1077 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1078 | } |
| 1079 | |
| 1080 | static void ad1848_start_input(int dev, unsigned long buf, int count, int intrflag) |
| 1081 | { |
| 1082 | unsigned long flags, cnt; |
| 1083 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1084 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1085 | |
| 1086 | cnt = count; |
| 1087 | if (portc->audio_format == AFMT_IMA_ADPCM) |
| 1088 | { |
| 1089 | cnt /= 4; |
| 1090 | } |
| 1091 | else |
| 1092 | { |
| 1093 | if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE)) /* 16 bit data */ |
| 1094 | cnt >>= 1; |
| 1095 | } |
| 1096 | if (portc->channels > 1) |
| 1097 | cnt >>= 1; |
| 1098 | cnt--; |
| 1099 | |
| 1100 | if ((devc->audio_mode & PCM_ENABLE_INPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) && |
| 1101 | intrflag && |
| 1102 | cnt == devc->xfer_count) |
| 1103 | { |
| 1104 | devc->audio_mode |= PCM_ENABLE_INPUT; |
| 1105 | devc->intr_active = 1; |
| 1106 | return; /* |
| 1107 | * Auto DMA mode on. No need to react |
| 1108 | */ |
| 1109 | } |
| 1110 | spin_lock_irqsave(&devc->lock,flags); |
| 1111 | |
| 1112 | if (devc->model == MD_1848) |
| 1113 | { |
| 1114 | ad_write(devc, 15, (unsigned char) (cnt & 0xff)); |
| 1115 | ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff)); |
| 1116 | } |
| 1117 | else |
| 1118 | { |
| 1119 | ad_write(devc, 31, (unsigned char) (cnt & 0xff)); |
| 1120 | ad_write(devc, 30, (unsigned char) ((cnt >> 8) & 0xff)); |
| 1121 | } |
| 1122 | |
| 1123 | ad_unmute(devc); |
| 1124 | |
| 1125 | devc->xfer_count = cnt; |
| 1126 | devc->audio_mode |= PCM_ENABLE_INPUT; |
| 1127 | devc->intr_active = 1; |
| 1128 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1129 | } |
| 1130 | |
| 1131 | static int ad1848_prepare_for_output(int dev, int bsize, int bcount) |
| 1132 | { |
| 1133 | int timeout; |
| 1134 | unsigned char fs, old_fs, tmp = 0; |
| 1135 | unsigned long flags; |
| 1136 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1137 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1138 | |
| 1139 | ad_mute(devc); |
| 1140 | |
| 1141 | spin_lock_irqsave(&devc->lock,flags); |
| 1142 | fs = portc->speed_bits | (portc->format_bits << 5); |
| 1143 | |
| 1144 | if (portc->channels > 1) |
| 1145 | fs |= 0x10; |
| 1146 | |
| 1147 | ad_enter_MCE(devc); /* Enables changes to the format select reg */ |
| 1148 | |
| 1149 | if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* Use alternate speed select registers */ |
| 1150 | { |
| 1151 | fs &= 0xf0; /* Mask off the rate select bits */ |
| 1152 | |
| 1153 | ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */ |
| 1154 | ad_write(devc, 23, portc->speed & 0xff); /* Speed LSB */ |
| 1155 | } |
| 1156 | old_fs = ad_read(devc, 8); |
| 1157 | |
| 1158 | if (devc->model == MD_4232 || devc->model >= MD_4236) |
| 1159 | { |
| 1160 | tmp = ad_read(devc, 16); |
| 1161 | ad_write(devc, 16, tmp | 0x30); |
| 1162 | } |
| 1163 | if (devc->model == MD_IWAVE) |
| 1164 | ad_write(devc, 17, 0xc2); /* Disable variable frequency select */ |
| 1165 | |
| 1166 | ad_write(devc, 8, fs); |
| 1167 | |
| 1168 | /* |
| 1169 | * Write to I8 starts resynchronization. Wait until it completes. |
| 1170 | */ |
| 1171 | |
| 1172 | timeout = 0; |
| 1173 | while (timeout < 100 && inb(devc->base) != 0x80) |
| 1174 | timeout++; |
| 1175 | timeout = 0; |
| 1176 | while (timeout < 10000 && inb(devc->base) == 0x80) |
| 1177 | timeout++; |
| 1178 | |
| 1179 | if (devc->model >= MD_4232) |
| 1180 | ad_write(devc, 16, tmp & ~0x30); |
| 1181 | |
| 1182 | ad_leave_MCE(devc); /* |
| 1183 | * Starts the calibration process. |
| 1184 | */ |
| 1185 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1186 | devc->xfer_count = 0; |
| 1187 | |
| 1188 | #ifndef EXCLUDE_TIMERS |
| 1189 | if (dev == timer_installed && devc->timer_running) |
| 1190 | if ((fs & 0x01) != (old_fs & 0x01)) |
| 1191 | { |
| 1192 | ad1848_tmr_reprogram(dev); |
| 1193 | } |
| 1194 | #endif |
| 1195 | ad1848_halt_output(dev); |
| 1196 | return 0; |
| 1197 | } |
| 1198 | |
| 1199 | static int ad1848_prepare_for_input(int dev, int bsize, int bcount) |
| 1200 | { |
| 1201 | int timeout; |
| 1202 | unsigned char fs, old_fs, tmp = 0; |
| 1203 | unsigned long flags; |
| 1204 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1205 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1206 | |
| 1207 | if (devc->audio_mode) |
| 1208 | return 0; |
| 1209 | |
| 1210 | spin_lock_irqsave(&devc->lock,flags); |
| 1211 | fs = portc->speed_bits | (portc->format_bits << 5); |
| 1212 | |
| 1213 | if (portc->channels > 1) |
| 1214 | fs |= 0x10; |
| 1215 | |
| 1216 | ad_enter_MCE(devc); /* Enables changes to the format select reg */ |
| 1217 | |
| 1218 | if ((devc->model == MD_1845) || (devc->model == MD_1845_SSCAPE)) /* Use alternate speed select registers */ |
| 1219 | { |
| 1220 | fs &= 0xf0; /* Mask off the rate select bits */ |
| 1221 | |
| 1222 | ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */ |
| 1223 | ad_write(devc, 23, portc->speed & 0xff); /* Speed LSB */ |
| 1224 | } |
| 1225 | if (devc->model == MD_4232) |
| 1226 | { |
| 1227 | tmp = ad_read(devc, 16); |
| 1228 | ad_write(devc, 16, tmp | 0x30); |
| 1229 | } |
| 1230 | if (devc->model == MD_IWAVE) |
| 1231 | ad_write(devc, 17, 0xc2); /* Disable variable frequency select */ |
| 1232 | |
| 1233 | /* |
| 1234 | * If mode >= 2 (CS4231), set I28. It's the capture format register. |
| 1235 | */ |
| 1236 | |
| 1237 | if (devc->model != MD_1848) |
| 1238 | { |
| 1239 | old_fs = ad_read(devc, 28); |
| 1240 | ad_write(devc, 28, fs); |
| 1241 | |
| 1242 | /* |
| 1243 | * Write to I28 starts resynchronization. Wait until it completes. |
| 1244 | */ |
| 1245 | |
| 1246 | timeout = 0; |
| 1247 | while (timeout < 100 && inb(devc->base) != 0x80) |
| 1248 | timeout++; |
| 1249 | |
| 1250 | timeout = 0; |
| 1251 | while (timeout < 10000 && inb(devc->base) == 0x80) |
| 1252 | timeout++; |
| 1253 | |
| 1254 | if (devc->model != MD_1848 && devc->model != MD_1845 && devc->model != MD_1845_SSCAPE) |
| 1255 | { |
| 1256 | /* |
| 1257 | * CS4231 compatible devices don't have separate sampling rate selection |
| 1258 | * register for recording an playback. The I8 register is shared so we have to |
| 1259 | * set the speed encoding bits of it too. |
| 1260 | */ |
| 1261 | unsigned char tmp = portc->speed_bits | (ad_read(devc, 8) & 0xf0); |
| 1262 | |
| 1263 | ad_write(devc, 8, tmp); |
| 1264 | /* |
| 1265 | * Write to I8 starts resynchronization. Wait until it completes. |
| 1266 | */ |
| 1267 | timeout = 0; |
| 1268 | while (timeout < 100 && inb(devc->base) != 0x80) |
| 1269 | timeout++; |
| 1270 | |
| 1271 | timeout = 0; |
| 1272 | while (timeout < 10000 && inb(devc->base) == 0x80) |
| 1273 | timeout++; |
| 1274 | } |
| 1275 | } |
| 1276 | else |
| 1277 | { /* For AD1848 set I8. */ |
| 1278 | |
| 1279 | old_fs = ad_read(devc, 8); |
| 1280 | ad_write(devc, 8, fs); |
| 1281 | /* |
| 1282 | * Write to I8 starts resynchronization. Wait until it completes. |
| 1283 | */ |
| 1284 | timeout = 0; |
| 1285 | while (timeout < 100 && inb(devc->base) != 0x80) |
| 1286 | timeout++; |
| 1287 | timeout = 0; |
| 1288 | while (timeout < 10000 && inb(devc->base) == 0x80) |
| 1289 | timeout++; |
| 1290 | } |
| 1291 | |
| 1292 | if (devc->model == MD_4232) |
| 1293 | ad_write(devc, 16, tmp & ~0x30); |
| 1294 | |
| 1295 | ad_leave_MCE(devc); /* |
| 1296 | * Starts the calibration process. |
| 1297 | */ |
| 1298 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1299 | devc->xfer_count = 0; |
| 1300 | |
| 1301 | #ifndef EXCLUDE_TIMERS |
| 1302 | if (dev == timer_installed && devc->timer_running) |
| 1303 | { |
| 1304 | if ((fs & 0x01) != (old_fs & 0x01)) |
| 1305 | { |
| 1306 | ad1848_tmr_reprogram(dev); |
| 1307 | } |
| 1308 | } |
| 1309 | #endif |
| 1310 | ad1848_halt_input(dev); |
| 1311 | return 0; |
| 1312 | } |
| 1313 | |
| 1314 | static void ad1848_halt(int dev) |
| 1315 | { |
| 1316 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1317 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1318 | |
| 1319 | unsigned char bits = ad_read(devc, 9); |
| 1320 | |
| 1321 | if (bits & 0x01 && (portc->open_mode & OPEN_WRITE)) |
| 1322 | ad1848_halt_output(dev); |
| 1323 | |
| 1324 | if (bits & 0x02 && (portc->open_mode & OPEN_READ)) |
| 1325 | ad1848_halt_input(dev); |
| 1326 | devc->audio_mode = 0; |
| 1327 | } |
| 1328 | |
| 1329 | static void ad1848_halt_input(int dev) |
| 1330 | { |
| 1331 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1332 | unsigned long flags; |
| 1333 | |
| 1334 | if (!(ad_read(devc, 9) & 0x02)) |
| 1335 | return; /* Capture not enabled */ |
| 1336 | |
| 1337 | spin_lock_irqsave(&devc->lock,flags); |
| 1338 | |
| 1339 | ad_mute(devc); |
| 1340 | |
| 1341 | { |
| 1342 | int tmout; |
| 1343 | |
| 1344 | if(!isa_dma_bridge_buggy) |
| 1345 | disable_dma(audio_devs[dev]->dmap_in->dma); |
| 1346 | |
| 1347 | for (tmout = 0; tmout < 100000; tmout++) |
| 1348 | if (ad_read(devc, 11) & 0x10) |
| 1349 | break; |
| 1350 | ad_write(devc, 9, ad_read(devc, 9) & ~0x02); /* Stop capture */ |
| 1351 | |
| 1352 | if(!isa_dma_bridge_buggy) |
| 1353 | enable_dma(audio_devs[dev]->dmap_in->dma); |
| 1354 | devc->audio_mode &= ~PCM_ENABLE_INPUT; |
| 1355 | } |
| 1356 | |
| 1357 | outb(0, io_Status(devc)); /* Clear interrupt status */ |
| 1358 | outb(0, io_Status(devc)); /* Clear interrupt status */ |
| 1359 | |
| 1360 | devc->audio_mode &= ~PCM_ENABLE_INPUT; |
| 1361 | |
| 1362 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1363 | } |
| 1364 | |
| 1365 | static void ad1848_halt_output(int dev) |
| 1366 | { |
| 1367 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1368 | unsigned long flags; |
| 1369 | |
| 1370 | if (!(ad_read(devc, 9) & 0x01)) |
| 1371 | return; /* Playback not enabled */ |
| 1372 | |
| 1373 | spin_lock_irqsave(&devc->lock,flags); |
| 1374 | |
| 1375 | ad_mute(devc); |
| 1376 | { |
| 1377 | int tmout; |
| 1378 | |
| 1379 | if(!isa_dma_bridge_buggy) |
| 1380 | disable_dma(audio_devs[dev]->dmap_out->dma); |
| 1381 | |
| 1382 | for (tmout = 0; tmout < 100000; tmout++) |
| 1383 | if (ad_read(devc, 11) & 0x10) |
| 1384 | break; |
| 1385 | ad_write(devc, 9, ad_read(devc, 9) & ~0x01); /* Stop playback */ |
| 1386 | |
| 1387 | if(!isa_dma_bridge_buggy) |
| 1388 | enable_dma(audio_devs[dev]->dmap_out->dma); |
| 1389 | |
| 1390 | devc->audio_mode &= ~PCM_ENABLE_OUTPUT; |
| 1391 | } |
| 1392 | |
| 1393 | outb((0), io_Status(devc)); /* Clear interrupt status */ |
| 1394 | outb((0), io_Status(devc)); /* Clear interrupt status */ |
| 1395 | |
| 1396 | devc->audio_mode &= ~PCM_ENABLE_OUTPUT; |
| 1397 | |
| 1398 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1399 | } |
| 1400 | |
| 1401 | static void ad1848_trigger(int dev, int state) |
| 1402 | { |
| 1403 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 1404 | ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc; |
| 1405 | unsigned long flags; |
| 1406 | unsigned char tmp, old; |
| 1407 | |
| 1408 | spin_lock_irqsave(&devc->lock,flags); |
| 1409 | state &= devc->audio_mode; |
| 1410 | |
| 1411 | tmp = old = ad_read(devc, 9); |
| 1412 | |
| 1413 | if (portc->open_mode & OPEN_READ) |
| 1414 | { |
| 1415 | if (state & PCM_ENABLE_INPUT) |
| 1416 | tmp |= 0x02; |
| 1417 | else |
| 1418 | tmp &= ~0x02; |
| 1419 | } |
| 1420 | if (portc->open_mode & OPEN_WRITE) |
| 1421 | { |
| 1422 | if (state & PCM_ENABLE_OUTPUT) |
| 1423 | tmp |= 0x01; |
| 1424 | else |
| 1425 | tmp &= ~0x01; |
| 1426 | } |
| 1427 | /* ad_mute(devc); */ |
| 1428 | if (tmp != old) |
| 1429 | { |
| 1430 | ad_write(devc, 9, tmp); |
| 1431 | ad_unmute(devc); |
| 1432 | } |
| 1433 | spin_unlock_irqrestore(&devc->lock,flags); |
| 1434 | } |
| 1435 | |
| 1436 | static void ad1848_init_hw(ad1848_info * devc) |
| 1437 | { |
| 1438 | int i; |
| 1439 | int *init_values; |
| 1440 | |
| 1441 | /* |
| 1442 | * Initial values for the indirect registers of CS4248/AD1848. |
| 1443 | */ |
| 1444 | static int init_values_a[] = |
| 1445 | { |
| 1446 | 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, |
| 1447 | 0x00, 0x0c, 0x02, 0x00, 0x8a, 0x01, 0x00, 0x00, |
| 1448 | |
| 1449 | /* Positions 16 to 31 just for CS4231/2 and ad1845 */ |
| 1450 | 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40, |
| 1451 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1452 | }; |
| 1453 | |
| 1454 | static int init_values_b[] = |
| 1455 | { |
| 1456 | /* |
| 1457 | Values for the newer chips |
| 1458 | Some of the register initialization values were changed. In |
| 1459 | order to get rid of the click that preceded PCM playback, |
| 1460 | calibration was disabled on the 10th byte. On that same byte, |
| 1461 | dual DMA was enabled; on the 11th byte, ADC dithering was |
| 1462 | enabled, since that is theoretically desirable; on the 13th |
| 1463 | byte, Mode 3 was selected, to enable access to extended |
| 1464 | registers. |
| 1465 | */ |
| 1466 | 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, |
| 1467 | 0x00, 0x00, 0x06, 0x00, 0xe0, 0x01, 0x00, 0x00, |
| 1468 | 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40, |
| 1469 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1470 | }; |
| 1471 | |
| 1472 | /* |
| 1473 | * Select initialisation data |
| 1474 | */ |
| 1475 | |
| 1476 | init_values = init_values_a; |
| 1477 | if(devc->model >= MD_4236) |
| 1478 | init_values = init_values_b; |
| 1479 | |
| 1480 | for (i = 0; i < 16; i++) |
| 1481 | ad_write(devc, i, init_values[i]); |
| 1482 | |
| 1483 | |
| 1484 | ad_mute(devc); /* Initialize some variables */ |
| 1485 | ad_unmute(devc); /* Leave it unmuted now */ |
| 1486 | |
| 1487 | if (devc->model > MD_1848) |
| 1488 | { |
| 1489 | if (devc->model == MD_1845_SSCAPE) |
| 1490 | ad_write(devc, 12, ad_read(devc, 12) | 0x50); |
| 1491 | else |
| 1492 | ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */ |
| 1493 | |
| 1494 | if (devc->model == MD_IWAVE) |
| 1495 | ad_write(devc, 12, 0x6c); /* Select codec mode 3 */ |
| 1496 | |
| 1497 | if (devc->model != MD_1845_SSCAPE) |
| 1498 | for (i = 16; i < 32; i++) |
| 1499 | ad_write(devc, i, init_values[i]); |
| 1500 | |
| 1501 | if (devc->model == MD_IWAVE) |
| 1502 | ad_write(devc, 16, 0x30); /* Playback and capture counters enabled */ |
| 1503 | } |
| 1504 | if (devc->model > MD_1848) |
| 1505 | { |
| 1506 | if (devc->audio_flags & DMA_DUPLEX) |
| 1507 | ad_write(devc, 9, ad_read(devc, 9) & ~0x04); /* Dual DMA mode */ |
| 1508 | else |
| 1509 | ad_write(devc, 9, ad_read(devc, 9) | 0x04); /* Single DMA mode */ |
| 1510 | |
| 1511 | if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) |
| 1512 | ad_write(devc, 27, ad_read(devc, 27) | 0x08); /* Alternate freq select enabled */ |
| 1513 | |
| 1514 | if (devc->model == MD_IWAVE) |
| 1515 | { /* Some magic Interwave specific initialization */ |
| 1516 | ad_write(devc, 12, 0x6c); /* Select codec mode 3 */ |
| 1517 | ad_write(devc, 16, 0x30); /* Playback and capture counters enabled */ |
| 1518 | ad_write(devc, 17, 0xc2); /* Alternate feature enable */ |
| 1519 | } |
| 1520 | } |
| 1521 | else |
| 1522 | { |
| 1523 | devc->audio_flags &= ~DMA_DUPLEX; |
| 1524 | ad_write(devc, 9, ad_read(devc, 9) | 0x04); /* Single DMA mode */ |
| 1525 | if (soundpro) |
| 1526 | ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */ |
| 1527 | } |
| 1528 | |
| 1529 | outb((0), io_Status(devc)); /* Clear pending interrupts */ |
| 1530 | |
| 1531 | /* |
| 1532 | * Toggle the MCE bit. It completes the initialization phase. |
| 1533 | */ |
| 1534 | |
| 1535 | ad_enter_MCE(devc); /* In case the bit was off */ |
| 1536 | ad_leave_MCE(devc); |
| 1537 | |
| 1538 | ad1848_mixer_reset(devc); |
| 1539 | } |
| 1540 | |
| 1541 | int ad1848_detect(struct resource *ports, int *ad_flags, int *osp) |
| 1542 | { |
| 1543 | unsigned char tmp; |
| 1544 | ad1848_info *devc = &adev_info[nr_ad1848_devs]; |
| 1545 | unsigned char tmp1 = 0xff, tmp2 = 0xff; |
| 1546 | int optiC930 = 0; /* OPTi 82C930 flag */ |
| 1547 | int interwave = 0; |
| 1548 | int ad1847_flag = 0; |
| 1549 | int cs4248_flag = 0; |
| 1550 | int sscape_flag = 0; |
| 1551 | int io_base = ports->start; |
| 1552 | |
| 1553 | int i; |
| 1554 | |
| 1555 | DDB(printk("ad1848_detect(%x)\n", io_base)); |
| 1556 | |
| 1557 | if (ad_flags) |
| 1558 | { |
| 1559 | if (*ad_flags == 0x12345678) |
| 1560 | { |
| 1561 | interwave = 1; |
| 1562 | *ad_flags = 0; |
| 1563 | } |
| 1564 | |
| 1565 | if (*ad_flags == 0x87654321) |
| 1566 | { |
| 1567 | sscape_flag = 1; |
| 1568 | *ad_flags = 0; |
| 1569 | } |
| 1570 | |
| 1571 | if (*ad_flags == 0x12345677) |
| 1572 | { |
| 1573 | cs4248_flag = 1; |
| 1574 | *ad_flags = 0; |
| 1575 | } |
| 1576 | } |
| 1577 | if (nr_ad1848_devs >= MAX_AUDIO_DEV) |
| 1578 | { |
| 1579 | printk(KERN_ERR "ad1848 - Too many audio devices\n"); |
| 1580 | return 0; |
| 1581 | } |
| 1582 | spin_lock_init(&devc->lock); |
| 1583 | devc->base = io_base; |
| 1584 | devc->irq_ok = 0; |
| 1585 | devc->timer_running = 0; |
| 1586 | devc->MCE_bit = 0x40; |
| 1587 | devc->irq = 0; |
| 1588 | devc->open_mode = 0; |
| 1589 | devc->chip_name = devc->name = "AD1848"; |
| 1590 | devc->model = MD_1848; /* AD1848 or CS4248 */ |
| 1591 | devc->levels = NULL; |
| 1592 | devc->debug_flag = 0; |
| 1593 | |
| 1594 | /* |
| 1595 | * Check that the I/O address is in use. |
| 1596 | * |
| 1597 | * The bit 0x80 of the base I/O port is known to be 0 after the |
| 1598 | * chip has performed its power on initialization. Just assume |
| 1599 | * this has happened before the OS is starting. |
| 1600 | * |
| 1601 | * If the I/O address is unused, it typically returns 0xff. |
| 1602 | */ |
| 1603 | |
| 1604 | if (inb(devc->base) == 0xff) |
| 1605 | { |
| 1606 | DDB(printk("ad1848_detect: The base I/O address appears to be dead\n")); |
| 1607 | } |
| 1608 | |
| 1609 | /* |
| 1610 | * Wait for the device to stop initialization |
| 1611 | */ |
| 1612 | |
| 1613 | DDB(printk("ad1848_detect() - step 0\n")); |
| 1614 | |
| 1615 | for (i = 0; i < 10000000; i++) |
| 1616 | { |
| 1617 | unsigned char x = inb(devc->base); |
| 1618 | |
| 1619 | if (x == 0xff || !(x & 0x80)) |
| 1620 | break; |
| 1621 | } |
| 1622 | |
| 1623 | DDB(printk("ad1848_detect() - step A\n")); |
| 1624 | |
| 1625 | if (inb(devc->base) == 0x80) /* Not ready. Let's wait */ |
| 1626 | ad_leave_MCE(devc); |
| 1627 | |
| 1628 | if ((inb(devc->base) & 0x80) != 0x00) /* Not a AD1848 */ |
| 1629 | { |
| 1630 | DDB(printk("ad1848 detect error - step A (%02x)\n", (int) inb(devc->base))); |
| 1631 | return 0; |
| 1632 | } |
| 1633 | |
| 1634 | /* |
| 1635 | * Test if it's possible to change contents of the indirect registers. |
| 1636 | * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read only |
| 1637 | * so try to avoid using it. |
| 1638 | */ |
| 1639 | |
| 1640 | DDB(printk("ad1848_detect() - step B\n")); |
| 1641 | ad_write(devc, 0, 0xaa); |
| 1642 | ad_write(devc, 1, 0x45); /* 0x55 with bit 0x10 clear */ |
| 1643 | |
| 1644 | if ((tmp1 = ad_read(devc, 0)) != 0xaa || (tmp2 = ad_read(devc, 1)) != 0x45) |
| 1645 | { |
| 1646 | if (tmp2 == 0x65) /* AD1847 has couple of bits hardcoded to 1 */ |
| 1647 | ad1847_flag = 1; |
| 1648 | else |
| 1649 | { |
| 1650 | DDB(printk("ad1848 detect error - step B (%x/%x)\n", tmp1, tmp2)); |
| 1651 | return 0; |
| 1652 | } |
| 1653 | } |
| 1654 | DDB(printk("ad1848_detect() - step C\n")); |
| 1655 | ad_write(devc, 0, 0x45); |
| 1656 | ad_write(devc, 1, 0xaa); |
| 1657 | |
| 1658 | if ((tmp1 = ad_read(devc, 0)) != 0x45 || (tmp2 = ad_read(devc, 1)) != 0xaa) |
| 1659 | { |
| 1660 | if (tmp2 == 0x8a) /* AD1847 has few bits hardcoded to 1 */ |
| 1661 | ad1847_flag = 1; |
| 1662 | else |
| 1663 | { |
| 1664 | DDB(printk("ad1848 detect error - step C (%x/%x)\n", tmp1, tmp2)); |
| 1665 | return 0; |
| 1666 | } |
| 1667 | } |
| 1668 | |
| 1669 | /* |
| 1670 | * The indirect register I12 has some read only bits. Let's |
| 1671 | * try to change them. |
| 1672 | */ |
| 1673 | |
| 1674 | DDB(printk("ad1848_detect() - step D\n")); |
| 1675 | tmp = ad_read(devc, 12); |
| 1676 | ad_write(devc, 12, (~tmp) & 0x0f); |
| 1677 | |
| 1678 | if ((tmp & 0x0f) != ((tmp1 = ad_read(devc, 12)) & 0x0f)) |
| 1679 | { |
| 1680 | DDB(printk("ad1848 detect error - step D (%x)\n", tmp1)); |
| 1681 | return 0; |
| 1682 | } |
| 1683 | |
| 1684 | /* |
| 1685 | * NOTE! Last 4 bits of the reg I12 tell the chip revision. |
| 1686 | * 0x01=RevB and 0x0A=RevC. |
| 1687 | */ |
| 1688 | |
| 1689 | /* |
| 1690 | * The original AD1848/CS4248 has just 15 indirect registers. This means |
| 1691 | * that I0 and I16 should return the same value (etc.). |
| 1692 | * However this doesn't work with CS4248. Actually it seems to be impossible |
| 1693 | * to detect if the chip is a CS4231 or CS4248. |
| 1694 | * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test fails |
| 1695 | * with CS4231. |
| 1696 | */ |
| 1697 | |
| 1698 | /* |
| 1699 | * OPTi 82C930 has mode2 control bit in another place. This test will fail |
| 1700 | * with it. Accept this situation as a possible indication of this chip. |
| 1701 | */ |
| 1702 | |
| 1703 | DDB(printk("ad1848_detect() - step F\n")); |
| 1704 | ad_write(devc, 12, 0); /* Mode2=disabled */ |
| 1705 | |
| 1706 | for (i = 0; i < 16; i++) |
| 1707 | { |
| 1708 | if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16))) |
| 1709 | { |
| 1710 | DDB(printk("ad1848 detect step F(%d/%x/%x) - OPTi chip???\n", i, tmp1, tmp2)); |
| 1711 | if (!ad1847_flag) |
| 1712 | optiC930 = 1; |
| 1713 | break; |
| 1714 | } |
| 1715 | } |
| 1716 | |
| 1717 | /* |
| 1718 | * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit (0x40). |
| 1719 | * The bit 0x80 is always 1 in CS4248 and CS4231. |
| 1720 | */ |
| 1721 | |
| 1722 | DDB(printk("ad1848_detect() - step G\n")); |
| 1723 | |
| 1724 | if (ad_flags && *ad_flags == 400) |
| 1725 | *ad_flags = 0; |
| 1726 | else |
| 1727 | ad_write(devc, 12, 0x40); /* Set mode2, clear 0x80 */ |
| 1728 | |
| 1729 | |
| 1730 | if (ad_flags) |
| 1731 | *ad_flags = 0; |
| 1732 | |
| 1733 | tmp1 = ad_read(devc, 12); |
| 1734 | if (tmp1 & 0x80) |
| 1735 | { |
| 1736 | if (ad_flags) |
| 1737 | *ad_flags |= AD_F_CS4248; |
| 1738 | |
| 1739 | devc->chip_name = "CS4248"; /* Our best knowledge just now */ |
| 1740 | } |
| 1741 | if (optiC930 || (tmp1 & 0xc0) == (0x80 | 0x40)) |
| 1742 | { |
| 1743 | /* |
| 1744 | * CS4231 detected - is it? |
| 1745 | * |
| 1746 | * Verify that setting I0 doesn't change I16. |
| 1747 | */ |
| 1748 | |
| 1749 | DDB(printk("ad1848_detect() - step H\n")); |
| 1750 | ad_write(devc, 16, 0); /* Set I16 to known value */ |
| 1751 | |
| 1752 | ad_write(devc, 0, 0x45); |
| 1753 | if ((tmp1 = ad_read(devc, 16)) != 0x45) /* No change -> CS4231? */ |
| 1754 | { |
| 1755 | ad_write(devc, 0, 0xaa); |
| 1756 | if ((tmp1 = ad_read(devc, 16)) == 0xaa) /* Rotten bits? */ |
| 1757 | { |
| 1758 | DDB(printk("ad1848 detect error - step H(%x)\n", tmp1)); |
| 1759 | return 0; |
| 1760 | } |
| 1761 | |
| 1762 | /* |
| 1763 | * Verify that some bits of I25 are read only. |
| 1764 | */ |
| 1765 | |
| 1766 | DDB(printk("ad1848_detect() - step I\n")); |
| 1767 | tmp1 = ad_read(devc, 25); /* Original bits */ |
| 1768 | ad_write(devc, 25, ~tmp1); /* Invert all bits */ |
| 1769 | if ((ad_read(devc, 25) & 0xe7) == (tmp1 & 0xe7)) |
| 1770 | { |
| 1771 | int id; |
| 1772 | |
| 1773 | /* |
| 1774 | * It's at least CS4231 |
| 1775 | */ |
| 1776 | |
| 1777 | devc->chip_name = "CS4231"; |
| 1778 | devc->model = MD_4231; |
| 1779 | |
| 1780 | /* |
| 1781 | * It could be an AD1845 or CS4231A as well. |
| 1782 | * CS4231 and AD1845 report the same revision info in I25 |
| 1783 | * while the CS4231A reports different. |
| 1784 | */ |
| 1785 | |
| 1786 | id = ad_read(devc, 25); |
| 1787 | if ((id & 0xe7) == 0x80) /* Device busy??? */ |
| 1788 | id = ad_read(devc, 25); |
| 1789 | if ((id & 0xe7) == 0x80) /* Device still busy??? */ |
| 1790 | id = ad_read(devc, 25); |
| 1791 | DDB(printk("ad1848_detect() - step J (%02x/%02x)\n", id, ad_read(devc, 25))); |
| 1792 | |
| 1793 | if ((id & 0xe7) == 0x80) { |
| 1794 | /* |
| 1795 | * It must be a CS4231 or AD1845. The register I23 of |
| 1796 | * CS4231 is undefined and it appears to be read only. |
| 1797 | * AD1845 uses I23 for setting sample rate. Assume |
| 1798 | * the chip is AD1845 if I23 is changeable. |
| 1799 | */ |
| 1800 | |
| 1801 | unsigned char tmp = ad_read(devc, 23); |
| 1802 | ad_write(devc, 23, ~tmp); |
| 1803 | |
| 1804 | if (interwave) |
| 1805 | { |
| 1806 | devc->model = MD_IWAVE; |
| 1807 | devc->chip_name = "IWave"; |
| 1808 | } |
| 1809 | else if (ad_read(devc, 23) != tmp) /* AD1845 ? */ |
| 1810 | { |
| 1811 | devc->chip_name = "AD1845"; |
| 1812 | devc->model = MD_1845; |
| 1813 | } |
| 1814 | else if (cs4248_flag) |
| 1815 | { |
| 1816 | if (ad_flags) |
| 1817 | *ad_flags |= AD_F_CS4248; |
| 1818 | devc->chip_name = "CS4248"; |
| 1819 | devc->model = MD_1848; |
| 1820 | ad_write(devc, 12, ad_read(devc, 12) & ~0x40); /* Mode2 off */ |
| 1821 | } |
| 1822 | ad_write(devc, 23, tmp); /* Restore */ |
| 1823 | } |
| 1824 | else |
| 1825 | { |
| 1826 | switch (id & 0x1f) { |
| 1827 | case 3: /* CS4236/CS4235/CS42xB/CS4239 */ |
| 1828 | { |
| 1829 | int xid; |
| 1830 | ad_write(devc, 12, ad_read(devc, 12) | 0x60); /* switch to mode 3 */ |
| 1831 | ad_write(devc, 23, 0x9c); /* select extended register 25 */ |
| 1832 | xid = inb(io_Indexed_Data(devc)); |
| 1833 | ad_write(devc, 12, ad_read(devc, 12) & ~0x60); /* back to mode 0 */ |
| 1834 | switch (xid & 0x1f) |
| 1835 | { |
| 1836 | case 0x00: |
| 1837 | devc->chip_name = "CS4237B(B)"; |
| 1838 | devc->model = MD_42xB; |
| 1839 | break; |
| 1840 | case 0x08: |
| 1841 | /* Seems to be a 4238 ?? */ |
| 1842 | devc->chip_name = "CS4238"; |
| 1843 | devc->model = MD_42xB; |
| 1844 | break; |
| 1845 | case 0x09: |
| 1846 | devc->chip_name = "CS4238B"; |
| 1847 | devc->model = MD_42xB; |
| 1848 | break; |
| 1849 | case 0x0b: |
| 1850 | devc->chip_name = "CS4236B"; |
| 1851 | devc->model = MD_4236; |
| 1852 | break; |
| 1853 | case 0x10: |
| 1854 | devc->chip_name = "CS4237B"; |
| 1855 | devc->model = MD_42xB; |
| 1856 | break; |
| 1857 | case 0x1d: |
| 1858 | devc->chip_name = "CS4235"; |
| 1859 | devc->model = MD_4235; |
| 1860 | break; |
| 1861 | case 0x1e: |
| 1862 | devc->chip_name = "CS4239"; |
| 1863 | devc->model = MD_4239; |
| 1864 | break; |
| 1865 | default: |
| 1866 | printk("Chip ident is %X.\n", xid&0x1F); |
| 1867 | devc->chip_name = "CS42xx"; |
| 1868 | devc->model = MD_4232; |
| 1869 | break; |
| 1870 | } |
| 1871 | } |
| 1872 | break; |
| 1873 | |
| 1874 | case 2: /* CS4232/CS4232A */ |
| 1875 | devc->chip_name = "CS4232"; |
| 1876 | devc->model = MD_4232; |
| 1877 | break; |
| 1878 | |
| 1879 | case 0: |
| 1880 | if ((id & 0xe0) == 0xa0) |
| 1881 | { |
| 1882 | devc->chip_name = "CS4231A"; |
| 1883 | devc->model = MD_4231A; |
| 1884 | } |
| 1885 | else |
| 1886 | { |
| 1887 | devc->chip_name = "CS4321"; |
| 1888 | devc->model = MD_4231; |
| 1889 | } |
| 1890 | break; |
| 1891 | |
| 1892 | default: /* maybe */ |
| 1893 | DDB(printk("ad1848: I25 = %02x/%02x\n", ad_read(devc, 25), ad_read(devc, 25) & 0xe7)); |
| 1894 | if (optiC930) |
| 1895 | { |
| 1896 | devc->chip_name = "82C930"; |
| 1897 | devc->model = MD_C930; |
| 1898 | } |
| 1899 | else |
| 1900 | { |
| 1901 | devc->chip_name = "CS4231"; |
| 1902 | devc->model = MD_4231; |
| 1903 | } |
| 1904 | } |
| 1905 | } |
| 1906 | } |
| 1907 | ad_write(devc, 25, tmp1); /* Restore bits */ |
| 1908 | |
| 1909 | DDB(printk("ad1848_detect() - step K\n")); |
| 1910 | } |
| 1911 | } else if (tmp1 == 0x0a) { |
| 1912 | /* |
| 1913 | * Is it perhaps a SoundPro CMI8330? |
| 1914 | * If so, then we should be able to change indirect registers |
| 1915 | * greater than I15 after activating MODE2, even though reading |
| 1916 | * back I12 does not show it. |
| 1917 | */ |
| 1918 | |
| 1919 | /* |
| 1920 | * Let's try comparing register values |
| 1921 | */ |
| 1922 | for (i = 0; i < 16; i++) { |
| 1923 | if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16))) { |
| 1924 | DDB(printk("ad1848 detect step H(%d/%x/%x) - SoundPro chip?\n", i, tmp1, tmp2)); |
| 1925 | soundpro = 1; |
| 1926 | devc->chip_name = "SoundPro CMI 8330"; |
| 1927 | break; |
| 1928 | } |
| 1929 | } |
| 1930 | } |
| 1931 | |
| 1932 | DDB(printk("ad1848_detect() - step L\n")); |
| 1933 | if (ad_flags) |
| 1934 | { |
| 1935 | if (devc->model != MD_1848) |
| 1936 | *ad_flags |= AD_F_CS4231; |
| 1937 | } |
| 1938 | DDB(printk("ad1848_detect() - Detected OK\n")); |
| 1939 | |
| 1940 | if (devc->model == MD_1848 && ad1847_flag) |
| 1941 | devc->chip_name = "AD1847"; |
| 1942 | |
| 1943 | |
| 1944 | if (sscape_flag == 1) |
| 1945 | devc->model = MD_1845_SSCAPE; |
| 1946 | |
| 1947 | return 1; |
| 1948 | } |
| 1949 | |
| 1950 | int ad1848_init (char *name, struct resource *ports, int irq, int dma_playback, |
| 1951 | int dma_capture, int share_dma, int *osp, struct module *owner) |
| 1952 | { |
| 1953 | /* |
| 1954 | * NOTE! If irq < 0, there is another driver which has allocated the IRQ |
| 1955 | * so that this driver doesn't need to allocate/deallocate it. |
| 1956 | * The actually used IRQ is ABS(irq). |
| 1957 | */ |
| 1958 | |
| 1959 | int my_dev; |
| 1960 | char dev_name[100]; |
| 1961 | int e; |
| 1962 | |
| 1963 | ad1848_info *devc = &adev_info[nr_ad1848_devs]; |
| 1964 | |
| 1965 | ad1848_port_info *portc = NULL; |
| 1966 | |
| 1967 | devc->irq = (irq > 0) ? irq : 0; |
| 1968 | devc->open_mode = 0; |
| 1969 | devc->timer_ticks = 0; |
| 1970 | devc->dma1 = dma_playback; |
| 1971 | devc->dma2 = dma_capture; |
| 1972 | devc->subtype = cfg.card_subtype; |
| 1973 | devc->audio_flags = DMA_AUTOMODE; |
| 1974 | devc->playback_dev = devc->record_dev = 0; |
| 1975 | if (name != NULL) |
| 1976 | devc->name = name; |
| 1977 | |
| 1978 | if (name != NULL && name[0] != 0) |
| 1979 | sprintf(dev_name, |
| 1980 | "%s (%s)", name, devc->chip_name); |
| 1981 | else |
| 1982 | sprintf(dev_name, |
| 1983 | "Generic audio codec (%s)", devc->chip_name); |
| 1984 | |
| 1985 | rename_region(ports, devc->name); |
| 1986 | |
| 1987 | conf_printf2(dev_name, devc->base, devc->irq, dma_playback, dma_capture); |
| 1988 | |
| 1989 | if (devc->model == MD_1848 || devc->model == MD_C930) |
| 1990 | devc->audio_flags |= DMA_HARDSTOP; |
| 1991 | |
| 1992 | if (devc->model > MD_1848) |
| 1993 | { |
| 1994 | if (devc->dma1 == devc->dma2 || devc->dma2 == -1 || devc->dma1 == -1) |
| 1995 | devc->audio_flags &= ~DMA_DUPLEX; |
| 1996 | else |
| 1997 | devc->audio_flags |= DMA_DUPLEX; |
| 1998 | } |
| 1999 | |
| 2000 | portc = (ad1848_port_info *) kmalloc(sizeof(ad1848_port_info), GFP_KERNEL); |
| 2001 | if(portc==NULL) { |
| 2002 | release_region(devc->base, 4); |
| 2003 | return -1; |
| 2004 | } |
| 2005 | |
| 2006 | if ((my_dev = sound_install_audiodrv(AUDIO_DRIVER_VERSION, |
| 2007 | dev_name, |
| 2008 | &ad1848_audio_driver, |
| 2009 | sizeof(struct audio_driver), |
| 2010 | devc->audio_flags, |
| 2011 | ad_format_mask[devc->model], |
| 2012 | devc, |
| 2013 | dma_playback, |
| 2014 | dma_capture)) < 0) |
| 2015 | { |
| 2016 | release_region(devc->base, 4); |
| 2017 | kfree(portc); |
| 2018 | return -1; |
| 2019 | } |
| 2020 | |
| 2021 | audio_devs[my_dev]->portc = portc; |
| 2022 | audio_devs[my_dev]->mixer_dev = -1; |
| 2023 | if (owner) |
| 2024 | audio_devs[my_dev]->d->owner = owner; |
| 2025 | memset((char *) portc, 0, sizeof(*portc)); |
| 2026 | |
| 2027 | nr_ad1848_devs++; |
| 2028 | |
| 2029 | devc->pmdev = pm_register(PM_ISA_DEV, my_dev, ad1848_pm_callback); |
| 2030 | if (devc->pmdev) |
| 2031 | devc->pmdev->data = devc; |
| 2032 | |
| 2033 | ad1848_init_hw(devc); |
| 2034 | |
| 2035 | if (irq > 0) |
| 2036 | { |
| 2037 | devc->dev_no = my_dev; |
| 2038 | if (request_irq(devc->irq, adintr, 0, devc->name, (void *)my_dev) < 0) |
| 2039 | { |
| 2040 | printk(KERN_WARNING "ad1848: Unable to allocate IRQ\n"); |
| 2041 | /* Don't free it either then.. */ |
| 2042 | devc->irq = 0; |
| 2043 | } |
| 2044 | if (capabilities[devc->model].flags & CAP_F_TIMER) |
| 2045 | { |
| 2046 | #ifndef CONFIG_SMP |
| 2047 | int x; |
| 2048 | unsigned char tmp = ad_read(devc, 16); |
| 2049 | #endif |
| 2050 | |
| 2051 | devc->timer_ticks = 0; |
| 2052 | |
| 2053 | ad_write(devc, 21, 0x00); /* Timer MSB */ |
| 2054 | ad_write(devc, 20, 0x10); /* Timer LSB */ |
| 2055 | #ifndef CONFIG_SMP |
| 2056 | ad_write(devc, 16, tmp | 0x40); /* Enable timer */ |
| 2057 | for (x = 0; x < 100000 && devc->timer_ticks == 0; x++); |
| 2058 | ad_write(devc, 16, tmp & ~0x40); /* Disable timer */ |
| 2059 | |
| 2060 | if (devc->timer_ticks == 0) |
| 2061 | printk(KERN_WARNING "ad1848: Interrupt test failed (IRQ%d)\n", irq); |
| 2062 | else |
| 2063 | { |
| 2064 | DDB(printk("Interrupt test OK\n")); |
| 2065 | devc->irq_ok = 1; |
| 2066 | } |
| 2067 | #else |
| 2068 | devc->irq_ok = 1; |
| 2069 | #endif |
| 2070 | } |
| 2071 | else |
| 2072 | devc->irq_ok = 1; /* Couldn't test. assume it's OK */ |
| 2073 | } else if (irq < 0) |
| 2074 | irq2dev[-irq] = devc->dev_no = my_dev; |
| 2075 | |
| 2076 | #ifndef EXCLUDE_TIMERS |
| 2077 | if ((capabilities[devc->model].flags & CAP_F_TIMER) && |
| 2078 | devc->irq_ok) |
| 2079 | ad1848_tmr_install(my_dev); |
| 2080 | #endif |
| 2081 | |
| 2082 | if (!share_dma) |
| 2083 | { |
| 2084 | if (sound_alloc_dma(dma_playback, devc->name)) |
| 2085 | printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_playback); |
| 2086 | |
| 2087 | if (dma_capture != dma_playback) |
| 2088 | if (sound_alloc_dma(dma_capture, devc->name)) |
| 2089 | printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_capture); |
| 2090 | } |
| 2091 | |
| 2092 | if ((e = sound_install_mixer(MIXER_DRIVER_VERSION, |
| 2093 | dev_name, |
| 2094 | &ad1848_mixer_operations, |
| 2095 | sizeof(struct mixer_operations), |
| 2096 | devc)) >= 0) |
| 2097 | { |
| 2098 | audio_devs[my_dev]->mixer_dev = e; |
| 2099 | if (owner) |
| 2100 | mixer_devs[e]->owner = owner; |
| 2101 | } |
| 2102 | return my_dev; |
| 2103 | } |
| 2104 | |
| 2105 | int ad1848_control(int cmd, int arg) |
| 2106 | { |
| 2107 | ad1848_info *devc; |
| 2108 | unsigned long flags; |
| 2109 | |
| 2110 | if (nr_ad1848_devs < 1) |
| 2111 | return -ENODEV; |
| 2112 | |
| 2113 | devc = &adev_info[nr_ad1848_devs - 1]; |
| 2114 | |
| 2115 | switch (cmd) |
| 2116 | { |
| 2117 | case AD1848_SET_XTAL: /* Change clock frequency of AD1845 (only ) */ |
| 2118 | if (devc->model != MD_1845 || devc->model != MD_1845_SSCAPE) |
| 2119 | return -EINVAL; |
| 2120 | spin_lock_irqsave(&devc->lock,flags); |
| 2121 | ad_enter_MCE(devc); |
| 2122 | ad_write(devc, 29, (ad_read(devc, 29) & 0x1f) | (arg << 5)); |
| 2123 | ad_leave_MCE(devc); |
| 2124 | spin_unlock_irqrestore(&devc->lock,flags); |
| 2125 | break; |
| 2126 | |
| 2127 | case AD1848_MIXER_REROUTE: |
| 2128 | { |
| 2129 | int o = (arg >> 8) & 0xff; |
| 2130 | int n = arg & 0xff; |
| 2131 | |
| 2132 | if (o < 0 || o >= SOUND_MIXER_NRDEVICES) |
| 2133 | return -EINVAL; |
| 2134 | |
| 2135 | if (!(devc->supported_devices & (1 << o)) && |
| 2136 | !(devc->supported_rec_devices & (1 << o))) |
| 2137 | return -EINVAL; |
| 2138 | |
| 2139 | if (n == SOUND_MIXER_NONE) |
| 2140 | { /* Just hide this control */ |
| 2141 | ad1848_mixer_set(devc, o, 0); /* Shut up it */ |
| 2142 | devc->supported_devices &= ~(1 << o); |
| 2143 | devc->supported_rec_devices &= ~(1 << o); |
| 2144 | break; |
| 2145 | } |
| 2146 | |
| 2147 | /* Make the mixer control identified by o to appear as n */ |
| 2148 | if (n < 0 || n >= SOUND_MIXER_NRDEVICES) |
| 2149 | return -EINVAL; |
| 2150 | |
| 2151 | devc->mixer_reroute[n] = o; /* Rename the control */ |
| 2152 | if (devc->supported_devices & (1 << o)) |
| 2153 | devc->supported_devices |= (1 << n); |
| 2154 | if (devc->supported_rec_devices & (1 << o)) |
| 2155 | devc->supported_rec_devices |= (1 << n); |
| 2156 | |
| 2157 | devc->supported_devices &= ~(1 << o); |
| 2158 | devc->supported_rec_devices &= ~(1 << o); |
| 2159 | } |
| 2160 | break; |
| 2161 | } |
| 2162 | return 0; |
| 2163 | } |
| 2164 | |
| 2165 | void ad1848_unload(int io_base, int irq, int dma_playback, int dma_capture, int share_dma) |
| 2166 | { |
| 2167 | int i, mixer, dev = 0; |
| 2168 | ad1848_info *devc = NULL; |
| 2169 | |
| 2170 | for (i = 0; devc == NULL && i < nr_ad1848_devs; i++) |
| 2171 | { |
| 2172 | if (adev_info[i].base == io_base) |
| 2173 | { |
| 2174 | devc = &adev_info[i]; |
| 2175 | dev = devc->dev_no; |
| 2176 | } |
| 2177 | } |
| 2178 | |
| 2179 | if (devc != NULL) |
| 2180 | { |
| 2181 | if(audio_devs[dev]->portc!=NULL) |
| 2182 | kfree(audio_devs[dev]->portc); |
| 2183 | release_region(devc->base, 4); |
| 2184 | |
| 2185 | if (!share_dma) |
| 2186 | { |
| 2187 | if (devc->irq > 0) /* There is no point in freeing irq, if it wasn't allocated */ |
| 2188 | free_irq(devc->irq, (void *)devc->dev_no); |
| 2189 | |
| 2190 | sound_free_dma(dma_playback); |
| 2191 | |
| 2192 | if (dma_playback != dma_capture) |
| 2193 | sound_free_dma(dma_capture); |
| 2194 | |
| 2195 | } |
| 2196 | mixer = audio_devs[devc->dev_no]->mixer_dev; |
| 2197 | if(mixer>=0) |
| 2198 | sound_unload_mixerdev(mixer); |
| 2199 | |
| 2200 | if (devc->pmdev) |
| 2201 | pm_unregister(devc->pmdev); |
| 2202 | |
| 2203 | nr_ad1848_devs--; |
| 2204 | for ( ; i < nr_ad1848_devs ; i++) |
| 2205 | adev_info[i] = adev_info[i+1]; |
| 2206 | } |
| 2207 | else |
| 2208 | printk(KERN_ERR "ad1848: Can't find device to be unloaded. Base=%x\n", io_base); |
| 2209 | } |
| 2210 | |
| 2211 | irqreturn_t adintr(int irq, void *dev_id, struct pt_regs *dummy) |
| 2212 | { |
| 2213 | unsigned char status; |
| 2214 | ad1848_info *devc; |
| 2215 | int dev; |
| 2216 | int alt_stat = 0xff; |
| 2217 | unsigned char c930_stat = 0; |
| 2218 | int cnt = 0; |
| 2219 | |
| 2220 | dev = (int)dev_id; |
| 2221 | devc = (ad1848_info *) audio_devs[dev]->devc; |
| 2222 | |
| 2223 | interrupt_again: /* Jump back here if int status doesn't reset */ |
| 2224 | |
| 2225 | status = inb(io_Status(devc)); |
| 2226 | |
| 2227 | if (status == 0x80) |
| 2228 | printk(KERN_DEBUG "adintr: Why?\n"); |
| 2229 | if (devc->model == MD_1848) |
| 2230 | outb((0), io_Status(devc)); /* Clear interrupt status */ |
| 2231 | |
| 2232 | if (status & 0x01) |
| 2233 | { |
| 2234 | if (devc->model == MD_C930) |
| 2235 | { /* 82C930 has interrupt status register in MAD16 register MC11 */ |
| 2236 | |
| 2237 | spin_lock(&devc->lock); |
| 2238 | |
| 2239 | /* 0xe0e is C930 address port |
| 2240 | * 0xe0f is C930 data port |
| 2241 | */ |
| 2242 | outb(11, 0xe0e); |
| 2243 | c930_stat = inb(0xe0f); |
| 2244 | outb((~c930_stat), 0xe0f); |
| 2245 | |
| 2246 | spin_unlock(&devc->lock); |
| 2247 | |
| 2248 | alt_stat = (c930_stat << 2) & 0x30; |
| 2249 | } |
| 2250 | else if (devc->model != MD_1848) |
| 2251 | { |
| 2252 | spin_lock(&devc->lock); |
| 2253 | alt_stat = ad_read(devc, 24); |
| 2254 | ad_write(devc, 24, ad_read(devc, 24) & ~alt_stat); /* Selective ack */ |
| 2255 | spin_unlock(&devc->lock); |
| 2256 | } |
| 2257 | |
| 2258 | if ((devc->open_mode & OPEN_READ) && (devc->audio_mode & PCM_ENABLE_INPUT) && (alt_stat & 0x20)) |
| 2259 | { |
| 2260 | DMAbuf_inputintr(devc->record_dev); |
| 2261 | } |
| 2262 | if ((devc->open_mode & OPEN_WRITE) && (devc->audio_mode & PCM_ENABLE_OUTPUT) && |
| 2263 | (alt_stat & 0x10)) |
| 2264 | { |
| 2265 | DMAbuf_outputintr(devc->playback_dev, 1); |
| 2266 | } |
| 2267 | if (devc->model != MD_1848 && (alt_stat & 0x40)) /* Timer interrupt */ |
| 2268 | { |
| 2269 | devc->timer_ticks++; |
| 2270 | #ifndef EXCLUDE_TIMERS |
| 2271 | if (timer_installed == dev && devc->timer_running) |
| 2272 | sound_timer_interrupt(); |
| 2273 | #endif |
| 2274 | } |
| 2275 | } |
| 2276 | /* |
| 2277 | * Sometimes playback or capture interrupts occur while a timer interrupt |
| 2278 | * is being handled. The interrupt will not be retriggered if we don't |
| 2279 | * handle it now. Check if an interrupt is still pending and restart |
| 2280 | * the handler in this case. |
| 2281 | */ |
| 2282 | if (inb(io_Status(devc)) & 0x01 && cnt++ < 4) |
| 2283 | { |
| 2284 | goto interrupt_again; |
| 2285 | } |
| 2286 | return IRQ_HANDLED; |
| 2287 | } |
| 2288 | |
| 2289 | /* |
| 2290 | * Experimental initialization sequence for the integrated sound system |
| 2291 | * of the Compaq Deskpro M. |
| 2292 | */ |
| 2293 | |
| 2294 | static int init_deskpro_m(struct address_info *hw_config) |
| 2295 | { |
| 2296 | unsigned char tmp; |
| 2297 | |
| 2298 | if ((tmp = inb(0xc44)) == 0xff) |
| 2299 | { |
| 2300 | DDB(printk("init_deskpro_m: Dead port 0xc44\n")); |
| 2301 | return 0; |
| 2302 | } |
| 2303 | |
| 2304 | outb(0x10, 0xc44); |
| 2305 | outb(0x40, 0xc45); |
| 2306 | outb(0x00, 0xc46); |
| 2307 | outb(0xe8, 0xc47); |
| 2308 | outb(0x14, 0xc44); |
| 2309 | outb(0x40, 0xc45); |
| 2310 | outb(0x00, 0xc46); |
| 2311 | outb(0xe8, 0xc47); |
| 2312 | outb(0x10, 0xc44); |
| 2313 | |
| 2314 | return 1; |
| 2315 | } |
| 2316 | |
| 2317 | /* |
| 2318 | * Experimental initialization sequence for the integrated sound system |
| 2319 | * of Compaq Deskpro XL. |
| 2320 | */ |
| 2321 | |
| 2322 | static int init_deskpro(struct address_info *hw_config) |
| 2323 | { |
| 2324 | unsigned char tmp; |
| 2325 | |
| 2326 | if ((tmp = inb(0xc44)) == 0xff) |
| 2327 | { |
| 2328 | DDB(printk("init_deskpro: Dead port 0xc44\n")); |
| 2329 | return 0; |
| 2330 | } |
| 2331 | outb((tmp | 0x04), 0xc44); /* Select bank 1 */ |
| 2332 | if (inb(0xc44) != 0x04) |
| 2333 | { |
| 2334 | DDB(printk("init_deskpro: Invalid bank1 signature in port 0xc44\n")); |
| 2335 | return 0; |
| 2336 | } |
| 2337 | /* |
| 2338 | * OK. It looks like a Deskpro so let's proceed. |
| 2339 | */ |
| 2340 | |
| 2341 | /* |
| 2342 | * I/O port 0xc44 Audio configuration register. |
| 2343 | * |
| 2344 | * bits 0xc0: Audio revision bits |
| 2345 | * 0x00 = Compaq Business Audio |
| 2346 | * 0x40 = MS Sound System Compatible (reset default) |
| 2347 | * 0x80 = Reserved |
| 2348 | * 0xc0 = Reserved |
| 2349 | * bit 0x20: No Wait State Enable |
| 2350 | * 0x00 = Disabled (reset default, DMA mode) |
| 2351 | * 0x20 = Enabled (programmed I/O mode) |
| 2352 | * bit 0x10: MS Sound System Decode Enable |
| 2353 | * 0x00 = Decoding disabled (reset default) |
| 2354 | * 0x10 = Decoding enabled |
| 2355 | * bit 0x08: FM Synthesis Decode Enable |
| 2356 | * 0x00 = Decoding Disabled (reset default) |
| 2357 | * 0x08 = Decoding enabled |
| 2358 | * bit 0x04 Bank select |
| 2359 | * 0x00 = Bank 0 |
| 2360 | * 0x04 = Bank 1 |
| 2361 | * bits 0x03 MSS Base address |
| 2362 | * 0x00 = 0x530 (reset default) |
| 2363 | * 0x01 = 0x604 |
| 2364 | * 0x02 = 0xf40 |
| 2365 | * 0x03 = 0xe80 |
| 2366 | */ |
| 2367 | |
| 2368 | #ifdef DEBUGXL |
| 2369 | /* Debug printing */ |
| 2370 | printk("Port 0xc44 (before): "); |
| 2371 | outb((tmp & ~0x04), 0xc44); |
| 2372 | printk("%02x ", inb(0xc44)); |
| 2373 | outb((tmp | 0x04), 0xc44); |
| 2374 | printk("%02x\n", inb(0xc44)); |
| 2375 | #endif |
| 2376 | |
| 2377 | /* Set bank 1 of the register */ |
| 2378 | tmp = 0x58; /* MSS Mode, MSS&FM decode enabled */ |
| 2379 | |
| 2380 | switch (hw_config->io_base) |
| 2381 | { |
| 2382 | case 0x530: |
| 2383 | tmp |= 0x00; |
| 2384 | break; |
| 2385 | case 0x604: |
| 2386 | tmp |= 0x01; |
| 2387 | break; |
| 2388 | case 0xf40: |
| 2389 | tmp |= 0x02; |
| 2390 | break; |
| 2391 | case 0xe80: |
| 2392 | tmp |= 0x03; |
| 2393 | break; |
| 2394 | default: |
| 2395 | DDB(printk("init_deskpro: Invalid MSS port %x\n", hw_config->io_base)); |
| 2396 | return 0; |
| 2397 | } |
| 2398 | outb((tmp & ~0x04), 0xc44); /* Write to bank=0 */ |
| 2399 | |
| 2400 | #ifdef DEBUGXL |
| 2401 | /* Debug printing */ |
| 2402 | printk("Port 0xc44 (after): "); |
| 2403 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2404 | printk("%02x ", inb(0xc44)); |
| 2405 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2406 | printk("%02x\n", inb(0xc44)); |
| 2407 | #endif |
| 2408 | |
| 2409 | /* |
| 2410 | * I/O port 0xc45 FM Address Decode/MSS ID Register. |
| 2411 | * |
| 2412 | * bank=0, bits 0xfe: FM synthesis Decode Compare bits 7:1 (default=0x88) |
| 2413 | * bank=0, bit 0x01: SBIC Power Control Bit |
| 2414 | * 0x00 = Powered up |
| 2415 | * 0x01 = Powered down |
| 2416 | * bank=1, bits 0xfc: MSS ID (default=0x40) |
| 2417 | */ |
| 2418 | |
| 2419 | #ifdef DEBUGXL |
| 2420 | /* Debug printing */ |
| 2421 | printk("Port 0xc45 (before): "); |
| 2422 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2423 | printk("%02x ", inb(0xc45)); |
| 2424 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2425 | printk("%02x\n", inb(0xc45)); |
| 2426 | #endif |
| 2427 | |
| 2428 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2429 | outb((0x88), 0xc45); /* FM base 7:0 = 0x88 */ |
| 2430 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2431 | outb((0x10), 0xc45); /* MSS ID = 0x10 (MSS port returns 0x04) */ |
| 2432 | |
| 2433 | #ifdef DEBUGXL |
| 2434 | /* Debug printing */ |
| 2435 | printk("Port 0xc45 (after): "); |
| 2436 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2437 | printk("%02x ", inb(0xc45)); |
| 2438 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2439 | printk("%02x\n", inb(0xc45)); |
| 2440 | #endif |
| 2441 | |
| 2442 | |
| 2443 | /* |
| 2444 | * I/O port 0xc46 FM Address Decode/Address ASIC Revision Register. |
| 2445 | * |
| 2446 | * bank=0, bits 0xff: FM synthesis Decode Compare bits 15:8 (default=0x03) |
| 2447 | * bank=1, bits 0xff: Audio addressing ASIC id |
| 2448 | */ |
| 2449 | |
| 2450 | #ifdef DEBUGXL |
| 2451 | /* Debug printing */ |
| 2452 | printk("Port 0xc46 (before): "); |
| 2453 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2454 | printk("%02x ", inb(0xc46)); |
| 2455 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2456 | printk("%02x\n", inb(0xc46)); |
| 2457 | #endif |
| 2458 | |
| 2459 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2460 | outb((0x03), 0xc46); /* FM base 15:8 = 0x03 */ |
| 2461 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2462 | outb((0x11), 0xc46); /* ASIC ID = 0x11 */ |
| 2463 | |
| 2464 | #ifdef DEBUGXL |
| 2465 | /* Debug printing */ |
| 2466 | printk("Port 0xc46 (after): "); |
| 2467 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2468 | printk("%02x ", inb(0xc46)); |
| 2469 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2470 | printk("%02x\n", inb(0xc46)); |
| 2471 | #endif |
| 2472 | |
| 2473 | /* |
| 2474 | * I/O port 0xc47 FM Address Decode Register. |
| 2475 | * |
| 2476 | * bank=0, bits 0xff: Decode enable selection for various FM address bits |
| 2477 | * bank=1, bits 0xff: Reserved |
| 2478 | */ |
| 2479 | |
| 2480 | #ifdef DEBUGXL |
| 2481 | /* Debug printing */ |
| 2482 | printk("Port 0xc47 (before): "); |
| 2483 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2484 | printk("%02x ", inb(0xc47)); |
| 2485 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2486 | printk("%02x\n", inb(0xc47)); |
| 2487 | #endif |
| 2488 | |
| 2489 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2490 | outb((0x7c), 0xc47); /* FM decode enable bits = 0x7c */ |
| 2491 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2492 | outb((0x00), 0xc47); /* Reserved bank1 = 0x00 */ |
| 2493 | |
| 2494 | #ifdef DEBUGXL |
| 2495 | /* Debug printing */ |
| 2496 | printk("Port 0xc47 (after): "); |
| 2497 | outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ |
| 2498 | printk("%02x ", inb(0xc47)); |
| 2499 | outb((tmp | 0x04), 0xc44); /* Select bank=1 */ |
| 2500 | printk("%02x\n", inb(0xc47)); |
| 2501 | #endif |
| 2502 | |
| 2503 | /* |
| 2504 | * I/O port 0xc6f = Audio Disable Function Register |
| 2505 | */ |
| 2506 | |
| 2507 | #ifdef DEBUGXL |
| 2508 | printk("Port 0xc6f (before) = %02x\n", inb(0xc6f)); |
| 2509 | #endif |
| 2510 | |
| 2511 | outb((0x80), 0xc6f); |
| 2512 | |
| 2513 | #ifdef DEBUGXL |
| 2514 | printk("Port 0xc6f (after) = %02x\n", inb(0xc6f)); |
| 2515 | #endif |
| 2516 | |
| 2517 | return 1; |
| 2518 | } |
| 2519 | |
| 2520 | int probe_ms_sound(struct address_info *hw_config, struct resource *ports) |
| 2521 | { |
| 2522 | unsigned char tmp; |
| 2523 | |
| 2524 | DDB(printk("Entered probe_ms_sound(%x, %d)\n", hw_config->io_base, hw_config->card_subtype)); |
| 2525 | |
| 2526 | if (hw_config->card_subtype == 1) /* Has no IRQ/DMA registers */ |
| 2527 | { |
| 2528 | /* check_opl3(0x388, hw_config); */ |
| 2529 | return ad1848_detect(ports, NULL, hw_config->osp); |
| 2530 | } |
| 2531 | |
| 2532 | if (deskpro_xl && hw_config->card_subtype == 2) /* Compaq Deskpro XL */ |
| 2533 | { |
| 2534 | if (!init_deskpro(hw_config)) |
| 2535 | return 0; |
| 2536 | } |
| 2537 | |
| 2538 | if (deskpro_m) /* Compaq Deskpro M */ |
| 2539 | { |
| 2540 | if (!init_deskpro_m(hw_config)) |
| 2541 | return 0; |
| 2542 | } |
| 2543 | |
| 2544 | /* |
| 2545 | * Check if the IO port returns valid signature. The original MS Sound |
| 2546 | * system returns 0x04 while some cards (AudioTrix Pro for example) |
| 2547 | * return 0x00 or 0x0f. |
| 2548 | */ |
| 2549 | |
| 2550 | if ((tmp = inb(hw_config->io_base + 3)) == 0xff) /* Bus float */ |
| 2551 | { |
| 2552 | int ret; |
| 2553 | |
| 2554 | DDB(printk("I/O address is inactive (%x)\n", tmp)); |
| 2555 | if (!(ret = ad1848_detect(ports, NULL, hw_config->osp))) |
| 2556 | return 0; |
| 2557 | return 1; |
| 2558 | } |
| 2559 | DDB(printk("MSS signature = %x\n", tmp & 0x3f)); |
| 2560 | if ((tmp & 0x3f) != 0x04 && |
| 2561 | (tmp & 0x3f) != 0x0f && |
| 2562 | (tmp & 0x3f) != 0x00) |
| 2563 | { |
| 2564 | int ret; |
| 2565 | |
| 2566 | MDB(printk(KERN_ERR "No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, (int) inb(hw_config->io_base + 3))); |
| 2567 | DDB(printk("Trying to detect codec anyway but IRQ/DMA may not work\n")); |
| 2568 | if (!(ret = ad1848_detect(ports, NULL, hw_config->osp))) |
| 2569 | return 0; |
| 2570 | |
| 2571 | hw_config->card_subtype = 1; |
| 2572 | return 1; |
| 2573 | } |
| 2574 | if ((hw_config->irq != 5) && |
| 2575 | (hw_config->irq != 7) && |
| 2576 | (hw_config->irq != 9) && |
| 2577 | (hw_config->irq != 10) && |
| 2578 | (hw_config->irq != 11) && |
| 2579 | (hw_config->irq != 12)) |
| 2580 | { |
| 2581 | printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq); |
| 2582 | return 0; |
| 2583 | } |
| 2584 | if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3) |
| 2585 | { |
| 2586 | printk(KERN_ERR "MSS: Bad DMA %d\n", hw_config->dma); |
| 2587 | return 0; |
| 2588 | } |
| 2589 | /* |
| 2590 | * Check that DMA0 is not in use with a 8 bit board. |
| 2591 | */ |
| 2592 | |
| 2593 | if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80) |
| 2594 | { |
| 2595 | printk(KERN_ERR "MSS: Can't use DMA0 with a 8 bit card/slot\n"); |
| 2596 | return 0; |
| 2597 | } |
| 2598 | if (hw_config->irq > 7 && hw_config->irq != 9 && inb(hw_config->io_base + 3) & 0x80) |
| 2599 | { |
| 2600 | printk(KERN_ERR "MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq); |
| 2601 | return 0; |
| 2602 | } |
| 2603 | return ad1848_detect(ports, NULL, hw_config->osp); |
| 2604 | } |
| 2605 | |
| 2606 | void attach_ms_sound(struct address_info *hw_config, struct resource *ports, struct module *owner) |
| 2607 | { |
| 2608 | static signed char interrupt_bits[12] = |
| 2609 | { |
| 2610 | -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20 |
| 2611 | }; |
| 2612 | signed char bits; |
| 2613 | char dma2_bit = 0; |
| 2614 | |
| 2615 | static char dma_bits[4] = |
| 2616 | { |
| 2617 | 1, 2, 0, 3 |
| 2618 | }; |
| 2619 | |
| 2620 | int config_port = hw_config->io_base + 0; |
| 2621 | int version_port = hw_config->io_base + 3; |
| 2622 | int dma = hw_config->dma; |
| 2623 | int dma2 = hw_config->dma2; |
| 2624 | |
| 2625 | if (hw_config->card_subtype == 1) /* Has no IRQ/DMA registers */ |
| 2626 | { |
| 2627 | hw_config->slots[0] = ad1848_init("MS Sound System", ports, |
| 2628 | hw_config->irq, |
| 2629 | hw_config->dma, |
| 2630 | hw_config->dma2, 0, |
| 2631 | hw_config->osp, |
| 2632 | owner); |
| 2633 | return; |
| 2634 | } |
| 2635 | /* |
| 2636 | * Set the IRQ and DMA addresses. |
| 2637 | */ |
| 2638 | |
| 2639 | bits = interrupt_bits[hw_config->irq]; |
| 2640 | if (bits == -1) |
| 2641 | { |
| 2642 | printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq); |
| 2643 | release_region(ports->start, 4); |
| 2644 | release_region(ports->start - 4, 4); |
| 2645 | return; |
| 2646 | } |
| 2647 | outb((bits | 0x40), config_port); |
| 2648 | if ((inb(version_port) & 0x40) == 0) |
| 2649 | printk(KERN_ERR "[MSS: IRQ Conflict?]\n"); |
| 2650 | |
| 2651 | /* |
| 2652 | * Handle the capture DMA channel |
| 2653 | */ |
| 2654 | |
| 2655 | if (dma2 != -1 && dma2 != dma) |
| 2656 | { |
| 2657 | if (!((dma == 0 && dma2 == 1) || |
| 2658 | (dma == 1 && dma2 == 0) || |
| 2659 | (dma == 3 && dma2 == 0))) |
| 2660 | { /* Unsupported combination. Try to swap channels */ |
| 2661 | int tmp = dma; |
| 2662 | |
| 2663 | dma = dma2; |
| 2664 | dma2 = tmp; |
| 2665 | } |
| 2666 | if ((dma == 0 && dma2 == 1) || |
| 2667 | (dma == 1 && dma2 == 0) || |
| 2668 | (dma == 3 && dma2 == 0)) |
| 2669 | { |
| 2670 | dma2_bit = 0x04; /* Enable capture DMA */ |
| 2671 | } |
| 2672 | else |
| 2673 | { |
| 2674 | printk(KERN_WARNING "MSS: Invalid capture DMA\n"); |
| 2675 | dma2 = dma; |
| 2676 | } |
| 2677 | } |
| 2678 | else |
| 2679 | { |
| 2680 | dma2 = dma; |
| 2681 | } |
| 2682 | |
| 2683 | hw_config->dma = dma; |
| 2684 | hw_config->dma2 = dma2; |
| 2685 | |
| 2686 | outb((bits | dma_bits[dma] | dma2_bit), config_port); /* Write IRQ+DMA setup */ |
| 2687 | |
| 2688 | hw_config->slots[0] = ad1848_init("MS Sound System", ports, |
| 2689 | hw_config->irq, |
| 2690 | dma, dma2, 0, |
| 2691 | hw_config->osp, |
| 2692 | THIS_MODULE); |
| 2693 | } |
| 2694 | |
| 2695 | void unload_ms_sound(struct address_info *hw_config) |
| 2696 | { |
| 2697 | ad1848_unload(hw_config->io_base + 4, |
| 2698 | hw_config->irq, |
| 2699 | hw_config->dma, |
| 2700 | hw_config->dma2, 0); |
| 2701 | sound_unload_audiodev(hw_config->slots[0]); |
| 2702 | release_region(hw_config->io_base, 4); |
| 2703 | } |
| 2704 | |
| 2705 | #ifndef EXCLUDE_TIMERS |
| 2706 | |
| 2707 | /* |
| 2708 | * Timer stuff (for /dev/music). |
| 2709 | */ |
| 2710 | |
| 2711 | static unsigned int current_interval; |
| 2712 | |
| 2713 | static unsigned int ad1848_tmr_start(int dev, unsigned int usecs) |
| 2714 | { |
| 2715 | unsigned long flags; |
| 2716 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 2717 | unsigned long xtal_nsecs; /* nanoseconds per xtal oscillator tick */ |
| 2718 | unsigned long divider; |
| 2719 | |
| 2720 | spin_lock_irqsave(&devc->lock,flags); |
| 2721 | |
| 2722 | /* |
| 2723 | * Length of the timer interval (in nanoseconds) depends on the |
| 2724 | * selected crystal oscillator. Check this from bit 0x01 of I8. |
| 2725 | * |
| 2726 | * AD1845 has just one oscillator which has cycle time of 10.050 us |
| 2727 | * (when a 24.576 MHz xtal oscillator is used). |
| 2728 | * |
| 2729 | * Convert requested interval to nanoseconds before computing |
| 2730 | * the timer divider. |
| 2731 | */ |
| 2732 | |
| 2733 | if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) |
| 2734 | xtal_nsecs = 10050; |
| 2735 | else if (ad_read(devc, 8) & 0x01) |
| 2736 | xtal_nsecs = 9920; |
| 2737 | else |
| 2738 | xtal_nsecs = 9969; |
| 2739 | |
| 2740 | divider = (usecs * 1000 + xtal_nsecs / 2) / xtal_nsecs; |
| 2741 | |
| 2742 | if (divider < 100) /* Don't allow shorter intervals than about 1ms */ |
| 2743 | divider = 100; |
| 2744 | |
| 2745 | if (divider > 65535) /* Overflow check */ |
| 2746 | divider = 65535; |
| 2747 | |
| 2748 | ad_write(devc, 21, (divider >> 8) & 0xff); /* Set upper bits */ |
| 2749 | ad_write(devc, 20, divider & 0xff); /* Set lower bits */ |
| 2750 | ad_write(devc, 16, ad_read(devc, 16) | 0x40); /* Start the timer */ |
| 2751 | devc->timer_running = 1; |
| 2752 | spin_unlock_irqrestore(&devc->lock,flags); |
| 2753 | |
| 2754 | return current_interval = (divider * xtal_nsecs + 500) / 1000; |
| 2755 | } |
| 2756 | |
| 2757 | static void ad1848_tmr_reprogram(int dev) |
| 2758 | { |
| 2759 | /* |
| 2760 | * Audio driver has changed sampling rate so that a different xtal |
| 2761 | * oscillator was selected. We have to reprogram the timer rate. |
| 2762 | */ |
| 2763 | |
| 2764 | ad1848_tmr_start(dev, current_interval); |
| 2765 | sound_timer_syncinterval(current_interval); |
| 2766 | } |
| 2767 | |
| 2768 | static void ad1848_tmr_disable(int dev) |
| 2769 | { |
| 2770 | unsigned long flags; |
| 2771 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 2772 | |
| 2773 | spin_lock_irqsave(&devc->lock,flags); |
| 2774 | ad_write(devc, 16, ad_read(devc, 16) & ~0x40); |
| 2775 | devc->timer_running = 0; |
| 2776 | spin_unlock_irqrestore(&devc->lock,flags); |
| 2777 | } |
| 2778 | |
| 2779 | static void ad1848_tmr_restart(int dev) |
| 2780 | { |
| 2781 | unsigned long flags; |
| 2782 | ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc; |
| 2783 | |
| 2784 | if (current_interval == 0) |
| 2785 | return; |
| 2786 | |
| 2787 | spin_lock_irqsave(&devc->lock,flags); |
| 2788 | ad_write(devc, 16, ad_read(devc, 16) | 0x40); |
| 2789 | devc->timer_running = 1; |
| 2790 | spin_unlock_irqrestore(&devc->lock,flags); |
| 2791 | } |
| 2792 | |
| 2793 | static struct sound_lowlev_timer ad1848_tmr = |
| 2794 | { |
| 2795 | 0, |
| 2796 | 2, |
| 2797 | ad1848_tmr_start, |
| 2798 | ad1848_tmr_disable, |
| 2799 | ad1848_tmr_restart |
| 2800 | }; |
| 2801 | |
| 2802 | static int ad1848_tmr_install(int dev) |
| 2803 | { |
| 2804 | if (timer_installed != -1) |
| 2805 | return 0; /* Don't install another timer */ |
| 2806 | |
| 2807 | timer_installed = ad1848_tmr.dev = dev; |
| 2808 | sound_timer_init(&ad1848_tmr, audio_devs[dev]->name); |
| 2809 | |
| 2810 | return 1; |
| 2811 | } |
| 2812 | #endif /* EXCLUDE_TIMERS */ |
| 2813 | |
| 2814 | static int ad1848_suspend(ad1848_info *devc) |
| 2815 | { |
| 2816 | unsigned long flags; |
| 2817 | |
| 2818 | spin_lock_irqsave(&devc->lock,flags); |
| 2819 | |
| 2820 | ad_mute(devc); |
| 2821 | |
| 2822 | spin_unlock_irqrestore(&devc->lock,flags); |
| 2823 | return 0; |
| 2824 | } |
| 2825 | |
| 2826 | static int ad1848_resume(ad1848_info *devc) |
| 2827 | { |
| 2828 | int mixer_levels[32], i; |
| 2829 | |
| 2830 | /* Thinkpad is a bit more of PITA than normal. The BIOS tends to |
| 2831 | restore it in a different config to the one we use. Need to |
| 2832 | fix this somehow */ |
| 2833 | |
| 2834 | /* store old mixer levels */ |
| 2835 | memcpy(mixer_levels, devc->levels, sizeof (mixer_levels)); |
| 2836 | ad1848_init_hw(devc); |
| 2837 | |
| 2838 | /* restore mixer levels */ |
| 2839 | for (i = 0; i < 32; i++) |
| 2840 | ad1848_mixer_set(devc, devc->dev_no, mixer_levels[i]); |
| 2841 | |
| 2842 | if (!devc->subtype) { |
| 2843 | static signed char interrupt_bits[12] = { -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20 }; |
| 2844 | static char dma_bits[4] = { 1, 2, 0, 3 }; |
| 2845 | unsigned long flags; |
| 2846 | signed char bits; |
| 2847 | char dma2_bit = 0; |
| 2848 | |
| 2849 | int config_port = devc->base + 0; |
| 2850 | |
| 2851 | bits = interrupt_bits[devc->irq]; |
| 2852 | if (bits == -1) { |
| 2853 | printk(KERN_ERR "MSS: Bad IRQ %d\n", devc->irq); |
| 2854 | return -1; |
| 2855 | } |
| 2856 | |
| 2857 | spin_lock_irqsave(&devc->lock,flags); |
| 2858 | |
| 2859 | outb((bits | 0x40), config_port); |
| 2860 | |
| 2861 | if (devc->dma2 != -1 && devc->dma2 != devc->dma1) |
| 2862 | if ( (devc->dma1 == 0 && devc->dma2 == 1) || |
| 2863 | (devc->dma1 == 1 && devc->dma2 == 0) || |
| 2864 | (devc->dma1 == 3 && devc->dma2 == 0)) |
| 2865 | dma2_bit = 0x04; |
| 2866 | |
| 2867 | outb((bits | dma_bits[devc->dma1] | dma2_bit), config_port); |
| 2868 | spin_unlock_irqrestore(&devc->lock,flags); |
| 2869 | } |
| 2870 | |
| 2871 | return 0; |
| 2872 | } |
| 2873 | |
| 2874 | static int ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data) |
| 2875 | { |
| 2876 | ad1848_info *devc = dev->data; |
| 2877 | if (devc) { |
| 2878 | DEB(printk("ad1848: pm event received: 0x%x\n", rqst)); |
| 2879 | |
| 2880 | switch (rqst) { |
| 2881 | case PM_SUSPEND: |
| 2882 | ad1848_suspend(devc); |
| 2883 | break; |
| 2884 | case PM_RESUME: |
| 2885 | ad1848_resume(devc); |
| 2886 | break; |
| 2887 | } |
| 2888 | } |
| 2889 | return 0; |
| 2890 | } |
| 2891 | |
| 2892 | |
| 2893 | EXPORT_SYMBOL(ad1848_detect); |
| 2894 | EXPORT_SYMBOL(ad1848_init); |
| 2895 | EXPORT_SYMBOL(ad1848_unload); |
| 2896 | EXPORT_SYMBOL(ad1848_control); |
| 2897 | EXPORT_SYMBOL(adintr); |
| 2898 | EXPORT_SYMBOL(probe_ms_sound); |
| 2899 | EXPORT_SYMBOL(attach_ms_sound); |
| 2900 | EXPORT_SYMBOL(unload_ms_sound); |
| 2901 | |
| 2902 | static int __initdata io = -1; |
| 2903 | static int __initdata irq = -1; |
| 2904 | static int __initdata dma = -1; |
| 2905 | static int __initdata dma2 = -1; |
| 2906 | static int __initdata type = 0; |
| 2907 | |
| 2908 | module_param(io, int, 0); /* I/O for a raw AD1848 card */ |
| 2909 | module_param(irq, int, 0); /* IRQ to use */ |
| 2910 | module_param(dma, int, 0); /* First DMA channel */ |
| 2911 | module_param(dma2, int, 0); /* Second DMA channel */ |
| 2912 | module_param(type, int, 0); /* Card type */ |
| 2913 | module_param(deskpro_xl, bool, 0); /* Special magic for Deskpro XL boxen */ |
| 2914 | module_param(deskpro_m, bool, 0); /* Special magic for Deskpro M box */ |
| 2915 | module_param(soundpro, bool, 0); /* More special magic for SoundPro chips */ |
| 2916 | |
| 2917 | #ifdef CONFIG_PNP |
| 2918 | module_param(isapnp, int, 0); |
| 2919 | module_param(isapnpjump, int, 0); |
| 2920 | module_param(reverse, bool, 0); |
| 2921 | MODULE_PARM_DESC(isapnp, "When set to 0, Plug & Play support will be disabled"); |
| 2922 | MODULE_PARM_DESC(isapnpjump, "Jumps to a specific slot in the driver's PnP table. Use the source, Luke."); |
| 2923 | MODULE_PARM_DESC(reverse, "When set to 1, will reverse ISAPnP search order"); |
| 2924 | |
| 2925 | static struct pnp_dev *ad1848_dev = NULL; |
| 2926 | |
| 2927 | /* Please add new entries at the end of the table */ |
| 2928 | static struct { |
| 2929 | char *name; |
| 2930 | unsigned short card_vendor, card_device, |
| 2931 | vendor, function; |
| 2932 | short mss_io, irq, dma, dma2; /* index into isapnp table */ |
| 2933 | int type; |
| 2934 | } ad1848_isapnp_list[] __initdata = { |
| 2935 | {"CMI 8330 SoundPRO", |
| 2936 | ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001), |
| 2937 | ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001), |
| 2938 | 0, 0, 0,-1, 0}, |
| 2939 | {"CS4232 based card", |
| 2940 | ISAPNP_ANY_ID, ISAPNP_ANY_ID, |
| 2941 | ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000), |
| 2942 | 0, 0, 0, 1, 0}, |
| 2943 | {"CS4232 based card", |
| 2944 | ISAPNP_ANY_ID, ISAPNP_ANY_ID, |
| 2945 | ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100), |
| 2946 | 0, 0, 0, 1, 0}, |
| 2947 | {"OPL3-SA2 WSS mode", |
| 2948 | ISAPNP_ANY_ID, ISAPNP_ANY_ID, |
| 2949 | ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), |
| 2950 | 1, 0, 0, 1, 1}, |
| 2951 | {"Advanced Gravis InterWave Audio", |
| 2952 | ISAPNP_VENDOR('G','R','V'), ISAPNP_DEVICE(0x0001), |
| 2953 | ISAPNP_VENDOR('G','R','V'), ISAPNP_FUNCTION(0x0000), |
| 2954 | 0, 0, 0, 1, 0}, |
| 2955 | {NULL} |
| 2956 | }; |
| 2957 | |
| 2958 | static struct isapnp_device_id id_table[] __devinitdata = { |
| 2959 | { ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001), |
| 2960 | ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001), 0 }, |
| 2961 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, |
| 2962 | ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000), 0 }, |
| 2963 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, |
| 2964 | ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100), 0 }, |
| 2965 | /* The main driver for this card is opl3sa2 |
| 2966 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, |
| 2967 | ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), 0 }, |
| 2968 | */ |
| 2969 | { ISAPNP_VENDOR('G','R','V'), ISAPNP_DEVICE(0x0001), |
| 2970 | ISAPNP_VENDOR('G','R','V'), ISAPNP_FUNCTION(0x0000), 0 }, |
| 2971 | {0} |
| 2972 | }; |
| 2973 | |
| 2974 | MODULE_DEVICE_TABLE(isapnp, id_table); |
| 2975 | |
| 2976 | static struct pnp_dev *activate_dev(char *devname, char *resname, struct pnp_dev *dev) |
| 2977 | { |
| 2978 | int err; |
| 2979 | |
| 2980 | err = pnp_device_attach(dev); |
| 2981 | if (err < 0) |
| 2982 | return(NULL); |
| 2983 | |
| 2984 | if((err = pnp_activate_dev(dev)) < 0) { |
| 2985 | printk(KERN_ERR "ad1848: %s %s config failed (out of resources?)[%d]\n", devname, resname, err); |
| 2986 | |
| 2987 | pnp_device_detach(dev); |
| 2988 | |
| 2989 | return(NULL); |
| 2990 | } |
| 2991 | audio_activated = 1; |
| 2992 | return(dev); |
| 2993 | } |
| 2994 | |
| 2995 | static struct pnp_dev *ad1848_init_generic(struct pnp_card *bus, struct address_info *hw_config, int slot) |
| 2996 | { |
| 2997 | |
| 2998 | /* Configure Audio device */ |
| 2999 | if((ad1848_dev = pnp_find_dev(bus, ad1848_isapnp_list[slot].vendor, ad1848_isapnp_list[slot].function, NULL))) |
| 3000 | { |
| 3001 | if((ad1848_dev = activate_dev(ad1848_isapnp_list[slot].name, "ad1848", ad1848_dev))) |
| 3002 | { |
| 3003 | hw_config->io_base = pnp_port_start(ad1848_dev, ad1848_isapnp_list[slot].mss_io); |
| 3004 | hw_config->irq = pnp_irq(ad1848_dev, ad1848_isapnp_list[slot].irq); |
| 3005 | hw_config->dma = pnp_dma(ad1848_dev, ad1848_isapnp_list[slot].dma); |
| 3006 | if(ad1848_isapnp_list[slot].dma2 != -1) |
| 3007 | hw_config->dma2 = pnp_dma(ad1848_dev, ad1848_isapnp_list[slot].dma2); |
| 3008 | else |
| 3009 | hw_config->dma2 = -1; |
| 3010 | hw_config->card_subtype = ad1848_isapnp_list[slot].type; |
| 3011 | } else |
| 3012 | return(NULL); |
| 3013 | } else |
| 3014 | return(NULL); |
| 3015 | |
| 3016 | return(ad1848_dev); |
| 3017 | } |
| 3018 | |
| 3019 | static int __init ad1848_isapnp_init(struct address_info *hw_config, struct pnp_card *bus, int slot) |
| 3020 | { |
| 3021 | char *busname = bus->name[0] ? bus->name : ad1848_isapnp_list[slot].name; |
| 3022 | |
| 3023 | /* Initialize this baby. */ |
| 3024 | |
| 3025 | if(ad1848_init_generic(bus, hw_config, slot)) { |
| 3026 | /* We got it. */ |
| 3027 | |
| 3028 | printk(KERN_NOTICE "ad1848: PnP reports '%s' at i/o %#x, irq %d, dma %d, %d\n", |
| 3029 | busname, |
| 3030 | hw_config->io_base, hw_config->irq, hw_config->dma, |
| 3031 | hw_config->dma2); |
| 3032 | return 1; |
| 3033 | } |
| 3034 | return 0; |
| 3035 | } |
| 3036 | |
| 3037 | static int __init ad1848_isapnp_probe(struct address_info *hw_config) |
| 3038 | { |
| 3039 | static int first = 1; |
| 3040 | int i; |
| 3041 | |
| 3042 | /* Count entries in sb_isapnp_list */ |
| 3043 | for (i = 0; ad1848_isapnp_list[i].card_vendor != 0; i++); |
| 3044 | i--; |
| 3045 | |
| 3046 | /* Check and adjust isapnpjump */ |
| 3047 | if( isapnpjump < 0 || isapnpjump > i) { |
| 3048 | isapnpjump = reverse ? i : 0; |
| 3049 | printk(KERN_ERR "ad1848: Valid range for isapnpjump is 0-%d. Adjusted to %d.\n", i, isapnpjump); |
| 3050 | } |
| 3051 | |
| 3052 | if(!first || !reverse) |
| 3053 | i = isapnpjump; |
| 3054 | first = 0; |
| 3055 | while(ad1848_isapnp_list[i].card_vendor != 0) { |
| 3056 | static struct pnp_card *bus = NULL; |
| 3057 | |
| 3058 | while ((bus = pnp_find_card( |
| 3059 | ad1848_isapnp_list[i].card_vendor, |
| 3060 | ad1848_isapnp_list[i].card_device, |
| 3061 | bus))) { |
| 3062 | |
| 3063 | if(ad1848_isapnp_init(hw_config, bus, i)) { |
| 3064 | isapnpjump = i; /* start next search from here */ |
| 3065 | return 0; |
| 3066 | } |
| 3067 | } |
| 3068 | i += reverse ? -1 : 1; |
| 3069 | } |
| 3070 | |
| 3071 | return -ENODEV; |
| 3072 | } |
| 3073 | #endif |
| 3074 | |
| 3075 | |
| 3076 | static int __init init_ad1848(void) |
| 3077 | { |
| 3078 | printk(KERN_INFO "ad1848/cs4248 codec driver Copyright (C) by Hannu Savolainen 1993-1996\n"); |
| 3079 | |
| 3080 | #ifdef CONFIG_PNP |
| 3081 | if(isapnp && (ad1848_isapnp_probe(&cfg) < 0) ) { |
| 3082 | printk(KERN_NOTICE "ad1848: No ISAPnP cards found, trying standard ones...\n"); |
| 3083 | isapnp = 0; |
| 3084 | } |
| 3085 | #endif |
| 3086 | |
| 3087 | if(io != -1) { |
| 3088 | struct resource *ports; |
| 3089 | if( isapnp == 0 ) |
| 3090 | { |
| 3091 | if(irq == -1 || dma == -1) { |
| 3092 | printk(KERN_WARNING "ad1848: must give I/O , IRQ and DMA.\n"); |
| 3093 | return -EINVAL; |
| 3094 | } |
| 3095 | |
| 3096 | cfg.irq = irq; |
| 3097 | cfg.io_base = io; |
| 3098 | cfg.dma = dma; |
| 3099 | cfg.dma2 = dma2; |
| 3100 | cfg.card_subtype = type; |
| 3101 | } |
| 3102 | |
| 3103 | ports = request_region(io + 4, 4, "ad1848"); |
| 3104 | |
| 3105 | if (!ports) |
| 3106 | return -EBUSY; |
| 3107 | |
| 3108 | if (!request_region(io, 4, "WSS config")) { |
| 3109 | release_region(io + 4, 4); |
| 3110 | return -EBUSY; |
| 3111 | } |
| 3112 | |
| 3113 | if (!probe_ms_sound(&cfg, ports)) { |
| 3114 | release_region(io + 4, 4); |
| 3115 | release_region(io, 4); |
| 3116 | return -ENODEV; |
| 3117 | } |
| 3118 | attach_ms_sound(&cfg, ports, THIS_MODULE); |
| 3119 | loaded = 1; |
| 3120 | } |
| 3121 | return 0; |
| 3122 | } |
| 3123 | |
| 3124 | static void __exit cleanup_ad1848(void) |
| 3125 | { |
| 3126 | if(loaded) |
| 3127 | unload_ms_sound(&cfg); |
| 3128 | |
| 3129 | #ifdef CONFIG_PNP |
| 3130 | if(ad1848_dev){ |
| 3131 | if(audio_activated) |
| 3132 | pnp_device_detach(ad1848_dev); |
| 3133 | } |
| 3134 | #endif |
| 3135 | } |
| 3136 | |
| 3137 | module_init(init_ad1848); |
| 3138 | module_exit(cleanup_ad1848); |
| 3139 | |
| 3140 | #ifndef MODULE |
| 3141 | static int __init setup_ad1848(char *str) |
| 3142 | { |
| 3143 | /* io, irq, dma, dma2, type */ |
| 3144 | int ints[6]; |
| 3145 | |
| 3146 | str = get_options(str, ARRAY_SIZE(ints), ints); |
| 3147 | |
| 3148 | io = ints[1]; |
| 3149 | irq = ints[2]; |
| 3150 | dma = ints[3]; |
| 3151 | dma2 = ints[4]; |
| 3152 | type = ints[5]; |
| 3153 | |
| 3154 | return 1; |
| 3155 | } |
| 3156 | |
| 3157 | __setup("ad1848=", setup_ad1848); |
| 3158 | #endif |
| 3159 | MODULE_LICENSE("GPL"); |