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Christian Daudt8ac49e02012-11-19 09:46:10 -08001/*
Markus Mayere3b62ff2013-08-02 13:12:21 -07002 * Copyright (C) 2012-2013 Broadcom Corporation
Christian Daudt8ac49e02012-11-19 09:46:10 -08003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
Matt Porter5401cc42013-06-06 01:41:35 -040014#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16
Alex Elder2bb94532014-02-14 12:29:20 -060017#include "dt-bindings/clock/bcm281xx.h"
18
Matt Porter74375652013-06-06 01:41:34 -040019#include "skeleton.dtsi"
Christian Daudt8ac49e02012-11-19 09:46:10 -080020
21/ {
22 model = "BCM11351 SoC";
Christian Daudt15e22dd2013-07-30 16:27:10 -070023 compatible = "brcm,bcm11351";
Christian Daudt8ac49e02012-11-19 09:46:10 -080024 interrupt-parent = <&gic>;
25
26 chosen {
27 bootargs = "console=ttyS0,115200n8";
28 };
29
30 gic: interrupt-controller@3ff00100 {
31 compatible = "arm,cortex-a9-gic";
32 #interrupt-cells = <3>;
33 #address-cells = <0>;
34 interrupt-controller;
35 reg = <0x3ff01000 0x1000>,
36 <0x3ff00100 0x100>;
37 };
38
Christian Daudt7f6c62e2013-03-13 15:05:37 -070039 smc@0x3404c000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070040 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
Matt Porterd22dc5e2013-06-11 14:45:58 -040041 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
Christian Daudt7f6c62e2013-03-13 15:05:37 -070042 };
43
Christian Daudt8ac49e02012-11-19 09:46:10 -080044 uart@3e000000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070045 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
Christian Daudt8ac49e02012-11-19 09:46:10 -080046 status = "disabled";
47 reg = <0x3e000000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060048 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
Matt Porter5401cc42013-06-06 01:41:35 -040049 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080050 reg-shift = <2>;
51 reg-io-width = <4>;
52 };
53
Tim Kryger84491c02013-09-23 10:49:57 -070054 uart@3e001000 {
55 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
56 status = "disabled";
57 reg = <0x3e001000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060058 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
Tim Kryger84491c02013-09-23 10:49:57 -070059 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
60 reg-shift = <2>;
61 reg-io-width = <4>;
62 };
63
64 uart@3e002000 {
65 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
66 status = "disabled";
67 reg = <0x3e002000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060068 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
Tim Kryger84491c02013-09-23 10:49:57 -070069 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
70 reg-shift = <2>;
71 reg-io-width = <4>;
72 };
73
74 uart@3e003000 {
75 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
76 status = "disabled";
77 reg = <0x3e003000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060078 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
Tim Kryger84491c02013-09-23 10:49:57 -070079 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
80 reg-shift = <2>;
81 reg-io-width = <4>;
82 };
83
Christian Daudt8ac49e02012-11-19 09:46:10 -080084 L2: l2-cache {
Christian Daudt15e22dd2013-07-30 16:27:10 -070085 compatible = "brcm,bcm11351-a2-pl310-cache";
Christian Daudt3b656fe2013-05-09 22:21:01 +010086 reg = <0x3ff20000 0x1000>;
87 cache-unified;
88 cache-level = <2>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080089 };
Christian Daudt5f03dc22013-03-13 14:27:28 -070090
Markus Mayere3b62ff2013-08-02 13:12:21 -070091 watchdog@35002f40 {
92 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
93 reg = <0x35002f40 0x6c>;
94 };
95
Christian Daudt5f03dc22013-03-13 14:27:28 -070096 timer@35006000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070097 compatible = "brcm,kona-timer";
Christian Daudt5f03dc22013-03-13 14:27:28 -070098 reg = <0x35006000 0x1000>;
Matt Porter5401cc42013-06-06 01:41:35 -040099 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600100 clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
Christian Daudt5f03dc22013-03-13 14:27:28 -0700101 };
102
Markus Mayerd394c7b2013-09-10 11:07:03 -0700103 gpio: gpio@35003000 {
104 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
105 reg = <0x35003000 0x800>;
106 interrupts =
107 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
108 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
109 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
110 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
111 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
112 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
113 #gpio-cells = <2>;
114 #interrupt-cells = <2>;
115 gpio-controller;
116 interrupt-controller;
117 };
118
Christian Daudtd7358f82013-08-07 22:37:47 -0700119 sdio1: sdio@3f180000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700120 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700121 reg = <0x3f180000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400122 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600123 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700124 status = "disabled";
125 };
126
Christian Daudtd7358f82013-08-07 22:37:47 -0700127 sdio2: sdio@3f190000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700128 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700129 reg = <0x3f190000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400130 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600131 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700132 status = "disabled";
133 };
134
Christian Daudtd7358f82013-08-07 22:37:47 -0700135 sdio3: sdio@3f1a0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700136 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700137 reg = <0x3f1a0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400138 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600139 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700140 status = "disabled";
141 };
142
Christian Daudtd7358f82013-08-07 22:37:47 -0700143 sdio4: sdio@3f1b0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700144 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700145 reg = <0x3f1b0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400146 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600147 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700148 status = "disabled";
149 };
150
Sherman Yin67a57be2013-12-20 18:13:36 -0800151 pinctrl@35004800 {
Sherman Yina2530062014-01-23 12:44:47 -0800152 compatible = "brcm,bcm11351-pinctrl";
Sherman Yin67a57be2013-12-20 18:13:36 -0800153 reg = <0x35004800 0x430>;
154 };
Linus Torvaldsf8a504c2014-01-30 18:08:27 -0800155
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800156 i2c@3e016000 {
157 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
158 reg = <0x3e016000 0x80>;
159 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
160 #address-cells = <1>;
161 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600162 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800163 status = "disabled";
164 };
165
166 i2c@3e017000 {
167 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
168 reg = <0x3e017000 0x80>;
169 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
170 #address-cells = <1>;
171 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600172 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800173 status = "disabled";
174 };
175
176 i2c@3e018000 {
177 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
178 reg = <0x3e018000 0x80>;
179 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
180 #address-cells = <1>;
181 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600182 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800183 status = "disabled";
184 };
185
186 i2c@3500d000 {
187 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
188 reg = <0x3500d000 0x80>;
189 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
190 #address-cells = <1>;
191 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600192 clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800193 status = "disabled";
194 };
195
Tim Krygercc33e422014-04-25 11:31:13 -0700196 pwm: pwm@3e01a000 {
197 compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";
198 reg = <0x3e01a000 0xcc>;
199 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>;
200 #pwm-cells = <3>;
201 status = "disabled";
202 };
203
Tim Kryger0bd898b2013-12-05 11:20:37 -0800204 clocks {
Alex Elder2bb94532014-02-14 12:29:20 -0600205 #address-cells = <1>;
206 #size-cells = <1>;
207 ranges;
208
209 root_ccu: root_ccu {
210 compatible = "brcm,bcm11351-root-ccu";
211 reg = <0x35001000 0x0f00>;
212 #clock-cells = <1>;
213 clock-output-names = "frac_1m";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800214 };
215
Alex Elder2bb94532014-02-14 12:29:20 -0600216 hub_ccu: hub_ccu {
217 compatible = "brcm,bcm11351-hub-ccu";
218 reg = <0x34000000 0x0f00>;
219 #clock-cells = <1>;
220 clock-output-names = "tmon_1m";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800221 };
222
Alex Elder2bb94532014-02-14 12:29:20 -0600223 aon_ccu: aon_ccu {
224 compatible = "brcm,bcm11351-aon-ccu";
225 reg = <0x35002000 0x0f00>;
226 #clock-cells = <1>;
227 clock-output-names = "hub_timer",
228 "pmu_bsc",
229 "pmu_bsc_var";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800230 };
231
Alex Elder2bb94532014-02-14 12:29:20 -0600232 master_ccu: master_ccu {
233 compatible = "brcm,bcm11351-master-ccu";
234 reg = <0x3f001000 0x0f00>;
235 #clock-cells = <1>;
236 clock-output-names = "sdio1",
237 "sdio2",
238 "sdio3",
239 "sdio4",
240 "usb_ic",
241 "hsic2_48m",
242 "hsic2_12m";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800243 };
244
Alex Elder2bb94532014-02-14 12:29:20 -0600245 slave_ccu: slave_ccu {
246 compatible = "brcm,bcm11351-slave-ccu";
247 reg = <0x3e011000 0x0f00>;
248 #clock-cells = <1>;
249 clock-output-names = "uartb",
250 "uartb2",
251 "uartb3",
252 "uartb4",
253 "ssp0",
254 "ssp2",
255 "bsc1",
256 "bsc2",
257 "bsc3",
258 "pwm";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800259 };
260
Alex Elder2bb94532014-02-14 12:29:20 -0600261 ref_1m_clk: ref_1m {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800262 #clock-cells = <0>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800263 compatible = "fixed-clock";
264 clock-frequency = <1000000>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800265 };
266
Alex Elder2bb94532014-02-14 12:29:20 -0600267 ref_32k_clk: ref_32k {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800268 #clock-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600269 compatible = "fixed-clock";
270 clock-frequency = <32768>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800271 };
272
Alex Elder2bb94532014-02-14 12:29:20 -0600273 bbl_32k_clk: bbl_32k {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800274 #clock-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600275 compatible = "fixed-clock";
276 clock-frequency = <32768>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800277 };
278
Alex Elder2bb94532014-02-14 12:29:20 -0600279 ref_13m_clk: ref_13m {
280 #clock-cells = <0>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800281 compatible = "fixed-clock";
282 clock-frequency = <13000000>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800283 };
284
Alex Elder2bb94532014-02-14 12:29:20 -0600285 var_13m_clk: var_13m {
286 #clock-cells = <0>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800287 compatible = "fixed-clock";
288 clock-frequency = <13000000>;
Alex Elder2bb94532014-02-14 12:29:20 -0600289 };
290
291 dft_19_5m_clk: dft_19_5m {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800292 #clock-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600293 compatible = "fixed-clock";
294 clock-frequency = <19500000>;
295 };
296
297 ref_crystal_clk: ref_crystal {
298 #clock-cells = <0>;
299 compatible = "fixed-clock";
300 clock-frequency = <26000000>;
301 };
302
303 ref_cx40_clk: ref_cx40 {
304 #clock-cells = <0>;
305 compatible = "fixed-clock";
306 clock-frequency = <40000000>;
307 };
308
309 ref_52m_clk: ref_52m {
310 #clock-cells = <0>;
311 compatible = "fixed-clock";
312 clock-frequency = <52000000>;
313 };
314
315 var_52m_clk: var_52m {
316 #clock-cells = <0>;
317 compatible = "fixed-clock";
318 clock-frequency = <52000000>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800319 };
320
321 usb_otg_ahb_clk: usb_otg_ahb {
322 compatible = "fixed-clock";
323 clock-frequency = <52000000>;
324 #clock-cells = <0>;
325 };
Alex Elder2bb94532014-02-14 12:29:20 -0600326
327 ref_96m_clk: ref_96m {
328 #clock-cells = <0>;
329 compatible = "fixed-clock";
330 clock-frequency = <96000000>;
331 };
332
333 var_96m_clk: var_96m {
334 #clock-cells = <0>;
335 compatible = "fixed-clock";
336 clock-frequency = <96000000>;
337 };
338
339 ref_104m_clk: ref_104m {
340 #clock-cells = <0>;
341 compatible = "fixed-clock";
342 clock-frequency = <104000000>;
343 };
344
345 var_104m_clk: var_104m {
346 #clock-cells = <0>;
347 compatible = "fixed-clock";
348 clock-frequency = <104000000>;
349 };
350
351 ref_156m_clk: ref_156m {
352 #clock-cells = <0>;
353 compatible = "fixed-clock";
354 clock-frequency = <156000000>;
355 };
356
357 var_156m_clk: var_156m {
358 #clock-cells = <0>;
359 compatible = "fixed-clock";
360 clock-frequency = <156000000>;
361 };
362
363 ref_208m_clk: ref_208m {
364 #clock-cells = <0>;
365 compatible = "fixed-clock";
366 clock-frequency = <208000000>;
367 };
368
369 var_208m_clk: var_208m {
370 #clock-cells = <0>;
371 compatible = "fixed-clock";
372 clock-frequency = <208000000>;
373 };
374
375 ref_312m_clk: ref_312m {
376 #clock-cells = <0>;
377 compatible = "fixed-clock";
378 clock-frequency = <312000000>;
379 };
380
381 var_312m_clk: var_312m {
382 #clock-cells = <0>;
383 compatible = "fixed-clock";
384 clock-frequency = <312000000>;
385 };
Tim Kryger0bd898b2013-12-05 11:20:37 -0800386 };
Matt Porterd97f7992013-12-19 09:23:10 -0500387
388 usbotg: usb@3f120000 {
389 compatible = "snps,dwc2";
390 reg = <0x3f120000 0x10000>;
391 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
392 clocks = <&usb_otg_ahb_clk>;
393 clock-names = "otg";
394 phys = <&usbphy>;
395 phy-names = "usb2-phy";
396 status = "disabled";
397 };
398
399 usbphy: usb-phy@3f130000 {
400 compatible = "brcm,kona-usb2-phy";
401 reg = <0x3f130000 0x28>;
402 #phy-cells = <0>;
403 status = "disabled";
404 };
Christian Daudt8ac49e02012-11-19 09:46:10 -0800405};