Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 1 | /* |
Padmanabhan Komanduru | dbd2fb0 | 2016-12-02 15:18:49 +0530 | [diff] [blame] | 2 | * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #ifndef _DSI_CATALOG_H_ |
| 16 | #define _DSI_CATALOG_H_ |
| 17 | |
| 18 | #include "dsi_ctrl_hw.h" |
| 19 | #include "dsi_phy_hw.h" |
| 20 | |
| 21 | /** |
| 22 | * dsi_catalog_ctrl_setup() - return catalog info for dsi controller |
| 23 | * @ctrl: Pointer to DSI controller hw object. |
| 24 | * @version: DSI controller version. |
| 25 | * @index: DSI controller instance ID. |
Dhaval Patel | abfaa08 | 2017-07-28 12:41:10 -0700 | [diff] [blame] | 26 | * @phy_isolation_enabled: DSI controller works isolated from phy. |
Sravanthi Kollukuduru | d880932 | 2017-10-26 15:24:13 +0530 | [diff] [blame] | 27 | * @null_insertion_enabled: DSI controller inserts null packet. |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 28 | * |
| 29 | * This function setups the catalog information in the dsi_ctrl_hw object. |
| 30 | * |
| 31 | * return: error code for failure and 0 for success. |
| 32 | */ |
| 33 | int dsi_catalog_ctrl_setup(struct dsi_ctrl_hw *ctrl, |
Dhaval Patel | abfaa08 | 2017-07-28 12:41:10 -0700 | [diff] [blame] | 34 | enum dsi_ctrl_version version, u32 index, |
Sravanthi Kollukuduru | d880932 | 2017-10-26 15:24:13 +0530 | [diff] [blame] | 35 | bool phy_isolation_enabled, bool null_insertion_enabled); |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 36 | |
| 37 | /** |
| 38 | * dsi_catalog_phy_setup() - return catalog info for dsi phy hardware |
Padmanabhan Komanduru | 56611ef | 2016-12-19 12:21:11 +0530 | [diff] [blame] | 39 | * @phy: Pointer to DSI PHY hw object. |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 40 | * @version: DSI PHY version. |
| 41 | * @index: DSI PHY instance ID. |
| 42 | * |
| 43 | * This function setups the catalog information in the dsi_phy_hw object. |
| 44 | * |
| 45 | * return: error code for failure and 0 for success. |
| 46 | */ |
| 47 | int dsi_catalog_phy_setup(struct dsi_phy_hw *phy, |
| 48 | enum dsi_phy_version version, |
| 49 | u32 index); |
| 50 | |
Padmanabhan Komanduru | 56611ef | 2016-12-19 12:21:11 +0530 | [diff] [blame] | 51 | /** |
| 52 | * dsi_phy_timing_calc_init() - initialize info for DSI PHY timing calculations |
| 53 | * @phy: Pointer to DSI PHY hw object. |
| 54 | * @version: DSI PHY version. |
| 55 | * |
| 56 | * This function setups the catalog information in the dsi_phy_hw object. |
| 57 | * |
| 58 | * return: error code for failure and 0 for success. |
| 59 | */ |
| 60 | int dsi_phy_timing_calc_init(struct dsi_phy_hw *phy, |
| 61 | enum dsi_phy_version version); |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 62 | |
Padmanabhan Komanduru | 56611ef | 2016-12-19 12:21:11 +0530 | [diff] [blame] | 63 | /** |
| 64 | * dsi_phy_hw_calculate_timing_params() - DSI PHY timing parameter calculations |
| 65 | * @phy: Pointer to DSI PHY hw object. |
| 66 | * @mode: DSI mode information. |
| 67 | * @host: DSI host configuration. |
| 68 | * @timing: DSI phy lane configurations. |
| 69 | * |
| 70 | * This function setups the catalog information in the dsi_phy_hw object. |
| 71 | * |
| 72 | * return: error code for failure and 0 for success. |
| 73 | */ |
| 74 | int dsi_phy_hw_calculate_timing_params(struct dsi_phy_hw *phy, |
| 75 | struct dsi_mode_info *mode, |
| 76 | struct dsi_host_common_cfg *host, |
| 77 | struct dsi_phy_per_lane_cfgs *timing); |
| 78 | |
| 79 | /* Definitions for 14nm PHY hardware driver */ |
| 80 | void dsi_phy_hw_v2_0_regulator_enable(struct dsi_phy_hw *phy, |
| 81 | struct dsi_phy_per_lane_cfgs *cfg); |
| 82 | void dsi_phy_hw_v2_0_regulator_disable(struct dsi_phy_hw *phy); |
| 83 | void dsi_phy_hw_v2_0_enable(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg); |
| 84 | void dsi_phy_hw_v2_0_disable(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg); |
| 85 | void dsi_phy_hw_v2_0_idle_on(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg); |
| 86 | void dsi_phy_hw_v2_0_idle_off(struct dsi_phy_hw *phy); |
Padmanabhan Komanduru | ee89d21 | 2016-12-19 12:51:31 +0530 | [diff] [blame] | 87 | int dsi_phy_hw_timing_val_v2_0(struct dsi_phy_per_lane_cfgs *timing_cfg, |
| 88 | u32 *timing_val, u32 size); |
Padmanabhan Komanduru | 56611ef | 2016-12-19 12:21:11 +0530 | [diff] [blame] | 89 | |
| 90 | /* Definitions for 10nm PHY hardware driver */ |
| 91 | void dsi_phy_hw_v3_0_regulator_enable(struct dsi_phy_hw *phy, |
| 92 | struct dsi_phy_per_lane_cfgs *cfg); |
| 93 | void dsi_phy_hw_v3_0_regulator_disable(struct dsi_phy_hw *phy); |
| 94 | void dsi_phy_hw_v3_0_enable(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg); |
| 95 | void dsi_phy_hw_v3_0_disable(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg); |
| 96 | int dsi_phy_hw_v3_0_wait_for_lane_idle(struct dsi_phy_hw *phy, u32 lanes); |
| 97 | void dsi_phy_hw_v3_0_ulps_request(struct dsi_phy_hw *phy, |
| 98 | struct dsi_phy_cfg *cfg, u32 lanes); |
| 99 | void dsi_phy_hw_v3_0_ulps_exit(struct dsi_phy_hw *phy, |
| 100 | struct dsi_phy_cfg *cfg, u32 lanes); |
| 101 | u32 dsi_phy_hw_v3_0_get_lanes_in_ulps(struct dsi_phy_hw *phy); |
Veera Sundaram Sankaran | bb3680f | 2017-04-21 13:20:46 -0700 | [diff] [blame] | 102 | bool dsi_phy_hw_v3_0_is_lanes_in_ulps(u32 lanes, u32 ulps_lanes); |
Padmanabhan Komanduru | ee89d21 | 2016-12-19 12:51:31 +0530 | [diff] [blame] | 103 | int dsi_phy_hw_timing_val_v3_0(struct dsi_phy_per_lane_cfgs *timing_cfg, |
| 104 | u32 *timing_val, u32 size); |
Sandeep Panda | 11b20d8 | 2017-06-19 12:57:27 +0530 | [diff] [blame] | 105 | int dsi_phy_hw_v3_0_lane_reset(struct dsi_phy_hw *phy); |
Padmanabhan Komanduru | ee89d21 | 2016-12-19 12:51:31 +0530 | [diff] [blame] | 106 | |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 107 | /* DSI controller common ops */ |
| 108 | u32 dsi_ctrl_hw_cmn_get_interrupt_status(struct dsi_ctrl_hw *ctrl); |
Dhaval Patel | f9f3ffe | 2017-08-16 16:03:10 -0700 | [diff] [blame] | 109 | void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 110 | void dsi_ctrl_hw_cmn_clear_interrupt_status(struct dsi_ctrl_hw *ctrl, u32 ints); |
| 111 | void dsi_ctrl_hw_cmn_enable_status_interrupts(struct dsi_ctrl_hw *ctrl, |
| 112 | u32 ints); |
| 113 | |
| 114 | u64 dsi_ctrl_hw_cmn_get_error_status(struct dsi_ctrl_hw *ctrl); |
| 115 | void dsi_ctrl_hw_cmn_clear_error_status(struct dsi_ctrl_hw *ctrl, u64 errors); |
| 116 | void dsi_ctrl_hw_cmn_enable_error_interrupts(struct dsi_ctrl_hw *ctrl, |
| 117 | u64 errors); |
| 118 | |
| 119 | void dsi_ctrl_hw_cmn_video_test_pattern_setup(struct dsi_ctrl_hw *ctrl, |
| 120 | enum dsi_test_pattern type, |
| 121 | u32 init_val); |
| 122 | void dsi_ctrl_hw_cmn_cmd_test_pattern_setup(struct dsi_ctrl_hw *ctrl, |
| 123 | enum dsi_test_pattern type, |
| 124 | u32 init_val, |
| 125 | u32 stream_id); |
| 126 | void dsi_ctrl_hw_cmn_test_pattern_enable(struct dsi_ctrl_hw *ctrl, bool enable); |
| 127 | void dsi_ctrl_hw_cmn_trigger_cmd_test_pattern(struct dsi_ctrl_hw *ctrl, |
| 128 | u32 stream_id); |
| 129 | |
| 130 | void dsi_ctrl_hw_cmn_host_setup(struct dsi_ctrl_hw *ctrl, |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 131 | struct dsi_host_common_cfg *config); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 132 | void dsi_ctrl_hw_cmn_video_engine_en(struct dsi_ctrl_hw *ctrl, bool on); |
| 133 | void dsi_ctrl_hw_cmn_video_engine_setup(struct dsi_ctrl_hw *ctrl, |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 134 | struct dsi_host_common_cfg *common_cfg, |
| 135 | struct dsi_video_engine_cfg *cfg); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 136 | void dsi_ctrl_hw_cmn_set_video_timing(struct dsi_ctrl_hw *ctrl, |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 137 | struct dsi_mode_info *mode); |
Raviteja Tamatam | 68892de | 2017-06-20 04:47:19 +0530 | [diff] [blame] | 138 | void dsi_ctrl_hw_cmn_set_timing_db(struct dsi_ctrl_hw *ctrl, |
| 139 | bool enable); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 140 | void dsi_ctrl_hw_cmn_cmd_engine_setup(struct dsi_ctrl_hw *ctrl, |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 141 | struct dsi_host_common_cfg *common_cfg, |
| 142 | struct dsi_cmd_engine_cfg *cfg); |
| 143 | |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 144 | void dsi_ctrl_hw_cmn_ctrl_en(struct dsi_ctrl_hw *ctrl, bool on); |
| 145 | void dsi_ctrl_hw_cmn_cmd_engine_en(struct dsi_ctrl_hw *ctrl, bool on); |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 146 | |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 147 | void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl, |
Alexander Beykun | ac18235 | 2017-02-27 17:46:51 -0500 | [diff] [blame] | 148 | struct dsi_mode_info *mode, |
Ajay Singh Parmar | aa9152d | 2016-05-16 18:02:07 -0700 | [diff] [blame] | 149 | u32 h_stride, |
Lloyd Atkinson | 16e96de | 2017-04-19 11:18:14 -0400 | [diff] [blame] | 150 | u32 vc_id, |
| 151 | struct dsi_rect *roi); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 152 | void dsi_ctrl_hw_cmn_phy_sw_reset(struct dsi_ctrl_hw *ctrl); |
| 153 | void dsi_ctrl_hw_cmn_soft_reset(struct dsi_ctrl_hw *ctrl); |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 154 | |
Rajkumar Subbiah | 01e6dd64 | 2017-07-05 14:47:47 -0400 | [diff] [blame] | 155 | void dsi_ctrl_hw_cmn_setup_misr(struct dsi_ctrl_hw *ctrl, |
| 156 | enum dsi_op_mode panel_mode, |
| 157 | bool enable, u32 frame_count); |
| 158 | u32 dsi_ctrl_hw_cmn_collect_misr(struct dsi_ctrl_hw *ctrl, |
| 159 | enum dsi_op_mode panel_mode); |
| 160 | |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 161 | void dsi_ctrl_hw_cmn_kickoff_command(struct dsi_ctrl_hw *ctrl, |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 162 | struct dsi_ctrl_cmd_dma_info *cmd, |
| 163 | u32 flags); |
| 164 | |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 165 | void dsi_ctrl_hw_cmn_kickoff_fifo_command(struct dsi_ctrl_hw *ctrl, |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 166 | struct dsi_ctrl_cmd_dma_fifo_info *cmd, |
| 167 | u32 flags); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 168 | void dsi_ctrl_hw_cmn_reset_cmd_fifo(struct dsi_ctrl_hw *ctrl); |
| 169 | void dsi_ctrl_hw_cmn_trigger_command_dma(struct dsi_ctrl_hw *ctrl); |
| 170 | void dsi_ctrl_hw_dln0_phy_err(struct dsi_ctrl_hw *ctrl); |
| 171 | void dsi_ctrl_hw_cmn_phy_reset_config(struct dsi_ctrl_hw *ctrl, |
| 172 | bool enable); |
Shashank Babu Chinta Venkata | afef820 | 2017-04-21 13:49:56 -0700 | [diff] [blame] | 173 | void dsi_ctrl_hw_22_phy_reset_config(struct dsi_ctrl_hw *ctrl, |
| 174 | bool enable); |
Sandeep Panda | 7945000 | 2017-05-08 17:14:24 +0530 | [diff] [blame] | 175 | u32 dsi_ctrl_hw_cmn_get_cmd_read_data(struct dsi_ctrl_hw *ctrl, |
| 176 | u8 *rd_buf, |
| 177 | u32 read_offset, |
| 178 | u32 rx_byte, |
| 179 | u32 pkt_size, u32 *hw_read_cnt); |
| 180 | void dsi_ctrl_hw_cmn_clear_rdbk_reg(struct dsi_ctrl_hw *ctrl); |
Sandeep Panda | a2a3c8c | 2017-07-09 02:10:44 +0530 | [diff] [blame] | 181 | void dsi_ctrl_hw_22_schedule_dma_cmd(struct dsi_ctrl_hw *ctrl, int line_on); |
Sandeep Panda | 11b20d8 | 2017-06-19 12:57:27 +0530 | [diff] [blame] | 182 | int dsi_ctrl_hw_cmn_ctrl_reset(struct dsi_ctrl_hw *ctrl, |
| 183 | int mask); |
| 184 | void dsi_ctrl_hw_cmn_mask_error_intr(struct dsi_ctrl_hw *ctrl, u32 idx, |
| 185 | bool en); |
| 186 | void dsi_ctrl_hw_cmn_error_intr_ctrl(struct dsi_ctrl_hw *ctrl, bool en); |
| 187 | u32 dsi_ctrl_hw_cmn_get_error_mask(struct dsi_ctrl_hw *ctrl); |
| 188 | u32 dsi_ctrl_hw_cmn_get_hw_version(struct dsi_ctrl_hw *ctrl); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 189 | |
| 190 | /* Definitions specific to 1.4 DSI controller hardware */ |
| 191 | int dsi_ctrl_hw_14_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes); |
| 192 | void dsi_ctrl_hw_14_setup_lane_map(struct dsi_ctrl_hw *ctrl, |
| 193 | struct dsi_lane_map *lane_map); |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 194 | void dsi_ctrl_hw_14_ulps_request(struct dsi_ctrl_hw *ctrl, u32 lanes); |
| 195 | void dsi_ctrl_hw_14_ulps_exit(struct dsi_ctrl_hw *ctrl, u32 lanes); |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 196 | u32 dsi_ctrl_hw_14_get_lanes_in_ulps(struct dsi_ctrl_hw *ctrl); |
| 197 | |
| 198 | void dsi_ctrl_hw_14_clamp_enable(struct dsi_ctrl_hw *ctrl, |
| 199 | u32 lanes, |
| 200 | bool enable_ulps); |
| 201 | |
| 202 | void dsi_ctrl_hw_14_clamp_disable(struct dsi_ctrl_hw *ctrl, |
| 203 | u32 lanes, |
| 204 | bool disable_ulps); |
Ajay Singh Parmar | 48ea427 | 2016-06-27 11:44:34 -0700 | [diff] [blame] | 205 | ssize_t dsi_ctrl_hw_14_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl, |
| 206 | char *buf, |
| 207 | u32 size); |
Padmanabhan Komanduru | 8ee8ee5 | 2016-12-19 12:10:51 +0530 | [diff] [blame] | 208 | |
| 209 | /* Definitions specific to 2.0 DSI controller hardware */ |
| 210 | void dsi_ctrl_hw_20_setup_lane_map(struct dsi_ctrl_hw *ctrl, |
| 211 | struct dsi_lane_map *lane_map); |
| 212 | int dsi_ctrl_hw_20_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes); |
| 213 | ssize_t dsi_ctrl_hw_20_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl, |
| 214 | char *buf, |
| 215 | u32 size); |
| 216 | |
Shashank Babu Chinta Venkata | 7d60873 | 2017-05-31 14:10:26 -0700 | [diff] [blame] | 217 | /* Definitions specific to 2.2 DSI controller hardware */ |
| 218 | bool dsi_ctrl_hw_22_get_cont_splash_status(struct dsi_ctrl_hw *ctrl); |
| 219 | |
Ajay Singh Parmar | 0e18781 | 2016-05-16 17:45:31 -0700 | [diff] [blame] | 220 | #endif /* _DSI_CATALOG_H_ */ |