Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * Device tree for AXC003 CPU card: HS38x UP configuration |
| 11 | */ |
| 12 | |
Vineet Gupta | 2e8cd93 | 2016-01-19 16:00:42 +0530 | [diff] [blame] | 13 | /include/ "skeleton_hs.dtsi" |
| 14 | |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 15 | / { |
| 16 | compatible = "snps,arc"; |
Alexey Brodkin | e2fc61f | 2015-06-29 19:15:03 +0300 | [diff] [blame] | 17 | clock-frequency = <90000000>; |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 18 | #address-cells = <1>; |
| 19 | #size-cells = <1>; |
| 20 | |
| 21 | cpu_card { |
| 22 | compatible = "simple-bus"; |
| 23 | #address-cells = <1>; |
| 24 | #size-cells = <1>; |
| 25 | |
| 26 | ranges = <0x00000000 0xf0000000 0x10000000>; |
| 27 | |
Vineet Gupta | b3d6aba | 2016-01-01 18:48:40 +0530 | [diff] [blame^] | 28 | core_clk: core_clk { |
| 29 | #clock-cells = <0>; |
| 30 | compatible = "fixed-clock"; |
| 31 | clock-frequency = <90000000>; |
| 32 | }; |
| 33 | |
Vineet Gupta | 9ba7648 | 2016-01-28 09:57:12 +0530 | [diff] [blame] | 34 | core_intc: archs-intc@cpu { |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 35 | compatible = "snps,archs-intc"; |
| 36 | interrupt-controller; |
| 37 | #interrupt-cells = <1>; |
| 38 | }; |
| 39 | |
| 40 | /* |
| 41 | * this GPIO block ORs all interrupts on CPU card (creg,..) |
| 42 | * to uplink only 1 IRQ to ARC core intc |
| 43 | */ |
| 44 | dw-apb-gpio@0x2000 { |
| 45 | compatible = "snps,dw-apb-gpio"; |
| 46 | reg = < 0x2000 0x80 >; |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <0>; |
| 49 | |
| 50 | ictl_intc: gpio-controller@0 { |
| 51 | compatible = "snps,dw-apb-gpio-port"; |
| 52 | gpio-controller; |
| 53 | #gpio-cells = <2>; |
| 54 | snps,nr-gpios = <30>; |
| 55 | reg = <0>; |
| 56 | interrupt-controller; |
| 57 | #interrupt-cells = <2>; |
Vineet Gupta | 9ba7648 | 2016-01-28 09:57:12 +0530 | [diff] [blame] | 58 | interrupt-parent = <&core_intc>; |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 59 | interrupts = <25>; |
| 60 | }; |
| 61 | }; |
| 62 | |
| 63 | debug_uart: dw-apb-uart@0x5000 { |
| 64 | compatible = "snps,dw-apb-uart"; |
| 65 | reg = <0x5000 0x100>; |
| 66 | clock-frequency = <33333000>; |
| 67 | interrupt-parent = <&ictl_intc>; |
| 68 | interrupts = <2 4>; |
| 69 | baud = <115200>; |
| 70 | reg-shift = <2>; |
| 71 | reg-io-width = <4>; |
| 72 | }; |
| 73 | |
| 74 | arcpct0: pct { |
| 75 | compatible = "snps,archs-pct"; |
| 76 | #interrupt-cells = <1>; |
Vineet Gupta | 9ba7648 | 2016-01-28 09:57:12 +0530 | [diff] [blame] | 77 | interrupt-parent = <&core_intc>; |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 78 | interrupts = <20>; |
| 79 | }; |
| 80 | }; |
| 81 | |
| 82 | /* |
Vineet Gupta | 0907495 | 2015-08-19 17:23:58 +0530 | [diff] [blame] | 83 | * The DW APB ICTL intc on MB is connected to CPU intc via a |
| 84 | * DT "invisible" DW APB GPIO block, configured to simply pass thru |
| 85 | * interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c) |
| 86 | * |
| 87 | * So here we mimic a direct connection betwen them, ignoring the |
| 88 | * ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core) |
| 89 | * instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO) |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 90 | * |
| 91 | * This intc actually resides on MB, but we move it here to |
| 92 | * avoid duplicating the MB dtsi file given that IRQ from |
| 93 | * this intc to cpu intc are different for axs101 and axs103 |
| 94 | */ |
| 95 | mb_intc: dw-apb-ictl@0xe0012000 { |
| 96 | #interrupt-cells = <1>; |
| 97 | compatible = "snps,dw-apb-ictl"; |
| 98 | reg = < 0xe0012000 0x200 >; |
| 99 | interrupt-controller; |
Vineet Gupta | 9ba7648 | 2016-01-28 09:57:12 +0530 | [diff] [blame] | 100 | interrupt-parent = <&core_intc>; |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 101 | interrupts = < 24 >; |
| 102 | }; |
| 103 | |
| 104 | memory { |
| 105 | #address-cells = <1>; |
| 106 | #size-cells = <1>; |
| 107 | ranges = <0x00000000 0x80000000 0x40000000>; |
| 108 | device_type = "memory"; |
Vineet Gupta | f759ee5 | 2015-01-23 18:10:26 +0530 | [diff] [blame] | 109 | reg = <0x80000000 0x20000000>; /* 512MiB */ |
Vineet Gupta | 5fa2daa | 2015-03-09 14:33:40 +0530 | [diff] [blame] | 110 | }; |
| 111 | }; |