Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Carsten Langgaard, carstenl@mips.com |
| 3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
Dmitri Vorobiev | 52d65cf | 2008-04-01 02:03:24 +0400 | [diff] [blame] | 4 | * Copyright (C) 2008 Dmitri Vorobiev |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can distribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License (Version 2) as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 13 | * for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 18 | */ |
Dmitri Vorobiev | 54bf038 | 2008-01-24 19:52:49 +0300 | [diff] [blame] | 19 | #include <linux/cpu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <linux/init.h> |
| 21 | #include <linux/sched.h> |
| 22 | #include <linux/ioport.h> |
Dmitri Vorobiev | 54bf038 | 2008-01-24 19:52:49 +0300 | [diff] [blame] | 23 | #include <linux/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/pci.h> |
Jon Smirl | 894673e | 2006-07-10 04:44:13 -0700 | [diff] [blame] | 25 | #include <linux/screen_info.h> |
Dmitri Vorobiev | 54bf038 | 2008-01-24 19:52:49 +0300 | [diff] [blame] | 26 | #include <linux/time.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <asm/bootinfo.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <asm/mips-boards/generic.h> |
| 30 | #include <asm/mips-boards/prom.h> |
| 31 | #include <asm/mips-boards/malta.h> |
| 32 | #include <asm/mips-boards/maltaint.h> |
| 33 | #include <asm/dma.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/traps.h> |
Steven J. Hill | b6d92b4 | 2013-03-25 13:47:29 -0500 | [diff] [blame] | 35 | #include <asm/gcmpregs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #ifdef CONFIG_VT |
| 37 | #include <linux/console.h> |
| 38 | #endif |
| 39 | |
Ralf Baechle | 39b8d52 | 2008-04-28 17:14:26 +0100 | [diff] [blame] | 40 | extern void malta_be_init(void); |
| 41 | extern int malta_be_handler(struct pt_regs *regs, int is_fixup); |
| 42 | |
Dmitri Vorobiev | 52d65cf | 2008-04-01 02:03:24 +0400 | [diff] [blame] | 43 | static struct resource standard_io_resources[] = { |
Dmitri Vorobiev | 4ca7651 | 2008-01-24 19:52:41 +0300 | [diff] [blame] | 44 | { |
| 45 | .name = "dma1", |
| 46 | .start = 0x00, |
| 47 | .end = 0x1f, |
| 48 | .flags = IORESOURCE_BUSY |
| 49 | }, |
| 50 | { |
| 51 | .name = "timer", |
| 52 | .start = 0x40, |
| 53 | .end = 0x5f, |
| 54 | .flags = IORESOURCE_BUSY |
| 55 | }, |
| 56 | { |
| 57 | .name = "keyboard", |
| 58 | .start = 0x60, |
| 59 | .end = 0x6f, |
| 60 | .flags = IORESOURCE_BUSY |
| 61 | }, |
| 62 | { |
| 63 | .name = "dma page reg", |
| 64 | .start = 0x80, |
| 65 | .end = 0x8f, |
| 66 | .flags = IORESOURCE_BUSY |
| 67 | }, |
| 68 | { |
| 69 | .name = "dma2", |
| 70 | .start = 0xc0, |
| 71 | .end = 0xdf, |
| 72 | .flags = IORESOURCE_BUSY |
| 73 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | const char *get_system_type(void) |
| 77 | { |
| 78 | return "MIPS Malta"; |
| 79 | } |
| 80 | |
Ralf Baechle | 79894c7 | 2007-05-16 17:54:08 +0200 | [diff] [blame] | 81 | #if defined(CONFIG_MIPS_MT_SMTC) |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 82 | const char display_string[] = " SMTC LINUX ON MALTA "; |
Ralf Baechle | 79894c7 | 2007-05-16 17:54:08 +0200 | [diff] [blame] | 83 | #else |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 84 | const char display_string[] = " LINUX ON MALTA "; |
Ralf Baechle | 79894c7 | 2007-05-16 17:54:08 +0200 | [diff] [blame] | 85 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 86 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | #ifdef CONFIG_BLK_DEV_FD |
Dmitri Vorobiev | ef7645c | 2008-01-24 19:52:55 +0300 | [diff] [blame] | 88 | static void __init fd_activate(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | { |
| 90 | /* |
| 91 | * Activate Floppy Controller in the SMSC FDC37M817 Super I/O |
| 92 | * Controller. |
| 93 | * Done by YAMON 2.00 onwards |
| 94 | */ |
| 95 | /* Entering config state. */ |
| 96 | SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG); |
| 97 | |
| 98 | /* Activate floppy controller. */ |
| 99 | SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG); |
| 100 | SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG); |
| 101 | SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG); |
| 102 | SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG); |
| 103 | |
| 104 | /* Exit config state. */ |
| 105 | SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG); |
| 106 | } |
| 107 | #endif |
| 108 | |
Steven J. Hill | b6d92b4 | 2013-03-25 13:47:29 -0500 | [diff] [blame] | 109 | static int __init plat_enable_iocoherency(void) |
| 110 | { |
| 111 | int supported = 0; |
| 112 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) { |
| 113 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { |
| 114 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; |
| 115 | pr_info("Enabled Bonito CPU coherency\n"); |
| 116 | supported = 1; |
| 117 | } |
| 118 | if (strstr(fw_getcmdline(), "iobcuncached")) { |
| 119 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; |
| 120 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & |
| 121 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
| 122 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
| 123 | pr_info("Disabled Bonito IOBC coherency\n"); |
| 124 | } else { |
| 125 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; |
| 126 | BONITO_PCIMEMBASECFG |= |
| 127 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
| 128 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
| 129 | pr_info("Enabled Bonito IOBC coherency\n"); |
| 130 | } |
| 131 | } else if (gcmp_niocu() != 0) { |
| 132 | /* Nothing special needs to be done to enable coherency */ |
| 133 | pr_info("CMP IOCU detected\n"); |
| 134 | if ((*(unsigned int *)0xbf403000 & 0x81) != 0x81) { |
| 135 | pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n"); |
| 136 | return 0; |
| 137 | } |
| 138 | supported = 1; |
| 139 | } |
| 140 | hw_coherentio = supported; |
| 141 | return supported; |
| 142 | } |
| 143 | |
| 144 | static void __init plat_setup_iocoherency(void) |
| 145 | { |
| 146 | #ifdef CONFIG_DMA_NONCOHERENT |
| 147 | /* |
| 148 | * Kernel has been configured with software coherency |
| 149 | * but we might choose to turn it off and use hardware |
| 150 | * coherency instead. |
| 151 | */ |
| 152 | if (plat_enable_iocoherency()) { |
| 153 | if (coherentio == 0) |
| 154 | pr_info("Hardware DMA cache coherency disabled\n"); |
| 155 | else |
| 156 | pr_info("Hardware DMA cache coherency enabled\n"); |
| 157 | } else { |
| 158 | if (coherentio == 1) |
| 159 | pr_info("Hardware DMA cache coherency unsupported, but enabled from command line!\n"); |
| 160 | else |
| 161 | pr_info("Software DMA cache coherency enabled\n"); |
| 162 | } |
| 163 | #else |
| 164 | if (!plat_enable_iocoherency()) |
| 165 | panic("Hardware DMA cache coherency not supported!"); |
| 166 | #endif |
| 167 | } |
| 168 | |
Dmitri Vorobiev | f3a4ce9 | 2008-01-24 19:52:43 +0300 | [diff] [blame] | 169 | #ifdef CONFIG_BLK_DEV_IDE |
| 170 | static void __init pci_clock_check(void) |
| 171 | { |
| 172 | unsigned int __iomem *jmpr_p = |
| 173 | (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int)); |
| 174 | int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07; |
Uwe Kleine-König | 4a043d7 | 2012-07-19 09:11:16 +0200 | [diff] [blame] | 175 | static const int pciclocks[] __initconst = { |
Dmitri Vorobiev | f3a4ce9 | 2008-01-24 19:52:43 +0300 | [diff] [blame] | 176 | 33, 20, 25, 30, 12, 16, 37, 10 |
| 177 | }; |
| 178 | int pciclock = pciclocks[jmpr]; |
| 179 | char *argptr = prom_getcmdline(); |
| 180 | |
| 181 | if (pciclock != 33 && !strstr(argptr, "idebus=")) { |
| 182 | printk(KERN_WARNING "WARNING: PCI clock is %dMHz, " |
| 183 | "setting idebus\n", pciclock); |
| 184 | argptr += strlen(argptr); |
| 185 | sprintf(argptr, " idebus=%d", pciclock); |
| 186 | if (pciclock < 20 || pciclock > 66) |
| 187 | printk(KERN_WARNING "WARNING: IDE timing " |
| 188 | "calculations will be incorrect\n"); |
| 189 | } |
| 190 | } |
| 191 | #endif |
| 192 | |
Dmitri Vorobiev | a382963 | 2008-01-24 19:52:44 +0300 | [diff] [blame] | 193 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) |
| 194 | static void __init screen_info_setup(void) |
| 195 | { |
| 196 | screen_info = (struct screen_info) { |
| 197 | .orig_x = 0, |
| 198 | .orig_y = 25, |
| 199 | .ext_mem_k = 0, |
| 200 | .orig_video_page = 0, |
| 201 | .orig_video_mode = 0, |
| 202 | .orig_video_cols = 80, |
| 203 | .unused2 = 0, |
| 204 | .orig_video_ega_bx = 0, |
| 205 | .unused3 = 0, |
| 206 | .orig_video_lines = 25, |
| 207 | .orig_video_isVGA = VIDEO_TYPE_VGAC, |
| 208 | .orig_video_points = 16 |
| 209 | }; |
| 210 | } |
| 211 | #endif |
| 212 | |
Dmitri Vorobiev | 750dc31 | 2008-01-24 19:52:56 +0300 | [diff] [blame] | 213 | static void __init bonito_quirks_setup(void) |
| 214 | { |
| 215 | char *argptr; |
| 216 | |
| 217 | argptr = prom_getcmdline(); |
| 218 | if (strstr(argptr, "debug")) { |
| 219 | BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; |
| 220 | printk(KERN_INFO "Enabled Bonito debug mode\n"); |
| 221 | } else |
| 222 | BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; |
| 223 | |
| 224 | #ifdef CONFIG_DMA_COHERENT |
| 225 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { |
| 226 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; |
| 227 | printk(KERN_INFO "Enabled Bonito CPU coherency\n"); |
| 228 | |
| 229 | argptr = prom_getcmdline(); |
| 230 | if (strstr(argptr, "iobcuncached")) { |
| 231 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; |
| 232 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & |
| 233 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
| 234 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
| 235 | printk(KERN_INFO "Disabled Bonito IOBC coherency\n"); |
| 236 | } else { |
| 237 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; |
| 238 | BONITO_PCIMEMBASECFG |= |
| 239 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
| 240 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
| 241 | printk(KERN_INFO "Enabled Bonito IOBC coherency\n"); |
| 242 | } |
| 243 | } else |
| 244 | panic("Hardware DMA cache coherency not supported"); |
| 245 | #endif |
| 246 | } |
| 247 | |
Ralf Baechle | 2925aba | 2006-06-18 01:32:22 +0100 | [diff] [blame] | 248 | void __init plat_mem_setup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | { |
| 250 | unsigned int i; |
| 251 | |
Ralf Baechle | c83cfc9 | 2005-06-21 13:56:30 +0000 | [diff] [blame] | 252 | mips_pcibios_init(); |
| 253 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | /* Request I/O space for devices used on the Malta board. */ |
| 255 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) |
| 256 | request_resource(&ioport_resource, standard_io_resources+i); |
| 257 | |
| 258 | /* |
| 259 | * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge. |
| 260 | */ |
| 261 | enable_dma(4); |
| 262 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | #ifdef CONFIG_DMA_COHERENT |
Dmitri Vorobiev | 750dc31 | 2008-01-24 19:52:56 +0300 | [diff] [blame] | 264 | if (mips_revision_sconid != MIPS_REVISION_SCON_BONITO) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | panic("Hardware DMA cache coherency not supported"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | #endif |
| 267 | |
Dmitri Vorobiev | 750dc31 | 2008-01-24 19:52:56 +0300 | [diff] [blame] | 268 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) |
| 269 | bonito_quirks_setup(); |
| 270 | |
Steven J. Hill | b6d92b4 | 2013-03-25 13:47:29 -0500 | [diff] [blame] | 271 | plat_setup_iocoherency(); |
| 272 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | #ifdef CONFIG_BLK_DEV_IDE |
Dmitri Vorobiev | f3a4ce9 | 2008-01-24 19:52:43 +0300 | [diff] [blame] | 274 | pci_clock_check(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | #endif |
Dmitri Vorobiev | 750dc31 | 2008-01-24 19:52:56 +0300 | [diff] [blame] | 276 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | #ifdef CONFIG_BLK_DEV_FD |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 278 | fd_activate(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | #endif |
Dmitri Vorobiev | 750dc31 | 2008-01-24 19:52:56 +0300 | [diff] [blame] | 280 | |
Dmitri Vorobiev | a382963 | 2008-01-24 19:52:44 +0300 | [diff] [blame] | 281 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) |
| 282 | screen_info_setup(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | #endif |
Ralf Baechle | 39b8d52 | 2008-04-28 17:14:26 +0100 | [diff] [blame] | 284 | |
| 285 | board_be_init = malta_be_init; |
| 286 | board_be_handler = malta_be_handler; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | } |