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Sergei Shtylyovf138e542015-10-01 02:02:27 +03001/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Sergei Shtylyov493b4da2016-01-21 14:36:01 -080011/*
12 * SSI-AK4642
13 *
Sergei Shtylyovf3b063c82016-02-12 00:49:52 +030014 * JP3: 2-1: AK4642
15 * 2-3: ADV7511
Sergei Shtylyov493b4da2016-01-21 14:36:01 -080016 *
17 * This command is required before playback/capture:
18 *
19 * amixer set "LINEOUT Mixer DACL" on
20 */
21
Sergei Shtylyovf138e542015-10-01 02:02:27 +030022/dts-v1/;
23#include "r8a7791.dtsi"
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030024#include <dt-bindings/gpio/gpio.h>
Sergei Shtylyovf138e542015-10-01 02:02:27 +030025
26/ {
27 model = "Porter";
28 compatible = "renesas,porter", "renesas,r8a7791";
29
30 aliases {
31 serial0 = &scif0;
32 };
33
34 chosen {
Sergei Shtylyov08770982015-10-06 01:51:01 +030035 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Geert Uytterhoevenbf204762015-12-08 18:54:17 +010036 stdout-path = "serial0:115200n8";
Sergei Shtylyovf138e542015-10-01 02:02:27 +030037 };
38
39 memory@40000000 {
40 device_type = "memory";
41 reg = <0 0x40000000 0 0x40000000>;
42 };
43
44 memory@200000000 {
45 device_type = "memory";
46 reg = <2 0x00000000 0 0x40000000>;
47 };
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030048
Geert Uytterhoevenafed0c92016-05-20 09:10:11 +020049 vcc_sdhi0: regulator-vcc-sdhi0 {
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030050 compatible = "regulator-fixed";
51
52 regulator-name = "SDHI0 Vcc";
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
55 regulator-always-on;
56 };
57
Geert Uytterhoevenafed0c92016-05-20 09:10:11 +020058 vccq_sdhi0: regulator-vccq-sdhi0 {
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030059 compatible = "regulator-gpio";
60
61 regulator-name = "SDHI0 VccQ";
62 regulator-min-microvolt = <1800000>;
63 regulator-max-microvolt = <3300000>;
64
65 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
66 gpios-states = <1>;
67 states = <3300000 1
68 1800000 0>;
69 };
70
Geert Uytterhoevenafed0c92016-05-20 09:10:11 +020071 vcc_sdhi2: regulator-vcc-sdhi2 {
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030072 compatible = "regulator-fixed";
73
74 regulator-name = "SDHI2 Vcc";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
77 regulator-always-on;
78 };
79
Geert Uytterhoevenafed0c92016-05-20 09:10:11 +020080 vccq_sdhi2: regulator-vccq-sdhi2 {
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030081 compatible = "regulator-gpio";
82
83 regulator-name = "SDHI2 VccQ";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <3300000>;
86
87 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
88 gpios-states = <1>;
89 states = <3300000 1
90 1800000 0>;
91 };
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +030092
93 hdmi-out {
94 compatible = "hdmi-connector";
95 type = "a";
96
97 port {
98 hdmi_con: endpoint {
99 remote-endpoint = <&adv7511_out>;
100 };
101 };
102 };
103
104 x3_clk: x3-clock {
105 compatible = "fixed-clock";
106 #clock-cells = <0>;
107 clock-frequency = <148500000>;
108 };
109
110 x16_clk: x16-clock {
111 compatible = "fixed-clock";
112 #clock-cells = <0>;
113 clock-frequency = <74250000>;
114 };
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800115
Simon Horman203f0ef2016-03-18 08:17:57 +0900116 x14_clk: audio_clock {
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800117 compatible = "fixed-clock";
118 #clock-cells = <0>;
119 clock-frequency = <11289600>;
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800120 };
121
122 sound {
123 compatible = "simple-audio-card";
124
125 simple-audio-card,format = "left_j";
126 simple-audio-card,bitclock-master = <&soundcodec>;
127 simple-audio-card,frame-master = <&soundcodec>;
128
129 simple-audio-card,cpu {
130 sound-dai = <&rcar_sound>;
131 };
132
133 soundcodec: simple-audio-card,codec {
134 sound-dai = <&ak4642>;
135 clocks = <&x14_clk>;
136 };
137 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +0300138};
139
140&extal_clk {
141 clock-frequency = <20000000>;
142};
143
144&pfc {
Geert Uytterhoevena1cd3c52016-06-10 15:00:57 +0200145 scif0_pins: scif0 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900146 groups = "scif0_data_d";
147 function = "scif0";
Sergei Shtylyovf138e542015-10-01 02:02:27 +0300148 };
Sergei Shtylyov08770982015-10-06 01:51:01 +0300149
150 ether_pins: ether {
Simon Hormanb2abb292016-03-18 07:55:31 +0900151 groups = "eth_link", "eth_mdio", "eth_rmii";
152 function = "eth";
Sergei Shtylyov08770982015-10-06 01:51:01 +0300153 };
154
155 phy1_pins: phy1 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900156 groups = "intc_irq0";
157 function = "intc";
Sergei Shtylyov08770982015-10-06 01:51:01 +0300158 };
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300159
160 sdhi0_pins: sd0 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900161 groups = "sdhi0_data4", "sdhi0_ctrl";
162 function = "sdhi0";
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300163 };
164
165 sdhi2_pins: sd2 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900166 groups = "sdhi2_data4", "sdhi2_ctrl";
167 function = "sdhi2";
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300168 };
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300169
Geert Uytterhoeven2d3e17012016-06-10 15:00:58 +0200170 qspi_pins: qspi {
Simon Hormanb2abb292016-03-18 07:55:31 +0900171 groups = "qspi_ctrl", "qspi_data4";
172 function = "qspi";
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300173 };
174
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300175 i2c2_pins: i2c2 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900176 groups = "i2c2";
177 function = "i2c2";
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300178 };
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300179
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300180 usb0_pins: usb0 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900181 groups = "usb0";
182 function = "usb0";
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300183 };
184
185 usb1_pins: usb1 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900186 groups = "usb1";
187 function = "usb1";
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300188 };
189
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300190 vin0_pins: vin0 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900191 groups = "vin0_data8", "vin0_clk";
192 function = "vin0";
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300193 };
Sergei Shtylyov0768fba2015-10-28 00:03:22 +0300194
195 can0_pins: can0 {
Simon Hormanb2abb292016-03-18 07:55:31 +0900196 groups = "can0_data";
197 function = "can0";
Sergei Shtylyov0768fba2015-10-28 00:03:22 +0300198 };
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300199
200 du_pins: du {
Simon Hormanb2abb292016-03-18 07:55:31 +0900201 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
202 function = "du";
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300203 };
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800204
205 ssi_pins: sound {
Simon Hormanb2abb292016-03-18 07:55:31 +0900206 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
207 function = "ssi";
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800208 };
209
210 audio_clk_pins: audio_clk {
Simon Hormanb2abb292016-03-18 07:55:31 +0900211 groups = "audio_clk_a";
212 function = "audio_clk";
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800213 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +0300214};
215
216&scif0 {
217 pinctrl-0 = <&scif0_pins>;
218 pinctrl-names = "default";
219
220 status = "okay";
221};
Sergei Shtylyov08770982015-10-06 01:51:01 +0300222
223&ether {
224 pinctrl-0 = <&ether_pins &phy1_pins>;
225 pinctrl-names = "default";
226
227 phy-handle = <&phy1>;
228 renesas,ether-link-active-low;
229 status = "ok";
230
231 phy1: ethernet-phy@1 {
232 reg = <1>;
233 interrupt-parent = <&irqc0>;
234 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
235 micrel,led-mode = <1>;
236 };
237};
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300238
239&sdhi0 {
240 pinctrl-0 = <&sdhi0_pins>;
241 pinctrl-names = "default";
242
243 vmmc-supply = <&vcc_sdhi0>;
244 vqmmc-supply = <&vccq_sdhi0>;
245 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
246 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
247 status = "okay";
248};
249
250&sdhi2 {
251 pinctrl-0 = <&sdhi2_pins>;
252 pinctrl-names = "default";
253
254 vmmc-supply = <&vcc_sdhi2>;
255 vqmmc-supply = <&vccq_sdhi2>;
256 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
257 status = "okay";
258};
Sergei Shtylyovefbb05c22015-10-08 01:00:06 +0300259
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300260&qspi {
261 pinctrl-0 = <&qspi_pins>;
262 pinctrl-names = "default";
263
264 status = "okay";
265
266 flash@0 {
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300267 compatible = "spansion,s25fl512s", "jedec,spi-nor";
268 reg = <0>;
269 spi-max-frequency = <30000000>;
270 spi-tx-bus-width = <4>;
271 spi-rx-bus-width = <4>;
272 m25p,fast-read;
273
Geert Uytterhoeven26fac0e2015-11-20 11:38:54 -0800274 partitions {
Geert Uytterhoeven947ef622015-12-21 11:33:50 +0100275 compatible = "fixed-partitions";
Geert Uytterhoeven26fac0e2015-11-20 11:38:54 -0800276 #address-cells = <1>;
277 #size-cells = <1>;
278
279 partition@0 {
280 label = "loader_prg";
281 reg = <0x00000000 0x00040000>;
282 read-only;
283 };
284 partition@40000 {
285 label = "user_prg";
286 reg = <0x00040000 0x00400000>;
287 read-only;
288 };
289 partition@440000 {
290 label = "flash_fs";
291 reg = <0x00440000 0x03bc0000>;
292 };
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300293 };
294 };
295};
296
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300297&i2c2 {
298 pinctrl-0 = <&i2c2_pins>;
299 pinctrl-names = "default";
300
301 status = "okay";
302 clock-frequency = <400000>;
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300303
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800304 ak4642: codec@12 {
305 compatible = "asahi-kasei,ak4642";
306 #sound-dai-cells = <0>;
307 reg = <0x12>;
308 };
309
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300310 composite-in@20 {
311 compatible = "adi,adv7180";
312 reg = <0x20>;
313 remote = <&vin0>;
314
315 port {
316 adv7180: endpoint {
317 bus-width = <8>;
318 remote-endpoint = <&vin0ep>;
319 };
320 };
321 };
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300322
323 hdmi@39 {
324 compatible = "adi,adv7511w";
325 reg = <0x39>;
326 interrupt-parent = <&gpio3>;
327 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
328
329 adi,input-depth = <8>;
330 adi,input-colorspace = "rgb";
331 adi,input-clock = "1x";
332 adi,input-style = <1>;
333 adi,input-justification = "evenly";
334
335 ports {
336 #address-cells = <1>;
337 #size-cells = <0>;
338
339 port@0 {
340 reg = <0>;
341 adv7511_in: endpoint {
342 remote-endpoint = <&du_out_rgb>;
343 };
344 };
345
346 port@1 {
347 reg = <1>;
348 adv7511_out: endpoint {
349 remote-endpoint = <&hdmi_con>;
350 };
351 };
352 };
353 };
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300354};
355
Sergei Shtylyovefbb05c22015-10-08 01:00:06 +0300356&sata0 {
357 status = "okay";
358};
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300359
360/* composite video input */
361&vin0 {
362 status = "ok";
363 pinctrl-0 = <&vin0_pins>;
364 pinctrl-names = "default";
365
366 port {
367 #address-cells = <1>;
368 #size-cells = <0>;
369
370 vin0ep: endpoint {
371 remote-endpoint = <&adv7180>;
372 bus-width = <8>;
373 };
374 };
375};
Sergei Shtylyovf9953c52015-10-10 00:41:26 +0300376
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300377&pci0 {
378 pinctrl-0 = <&usb0_pins>;
379 pinctrl-names = "default";
380
381 status = "okay";
382};
383
384&pci1 {
385 pinctrl-0 = <&usb1_pins>;
386 pinctrl-names = "default";
387
388 status = "okay";
389};
390
Sergei Shtylyovc794f6a2015-10-14 22:35:46 +0300391&hsusb {
392 pinctrl-0 = <&usb0_pins>;
393 pinctrl-names = "default";
394
395 status = "okay";
Sergei Shtylyovc794f6a2015-10-14 22:35:46 +0300396};
397
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300398&usbphy {
399 status = "okay";
400};
401
Sergei Shtylyovf9953c52015-10-10 00:41:26 +0300402&pcie_bus_clk {
Sjoerd Simonsac6908b2016-04-06 14:52:53 +0200403 clock-frequency = <100000000>;
Sergei Shtylyovf9953c52015-10-10 00:41:26 +0300404 status = "okay";
405};
406
407&pciec {
408 status = "okay";
409};
Sergei Shtylyov0768fba2015-10-28 00:03:22 +0300410
411&can0 {
412 pinctrl-0 = <&can0_pins>;
413 pinctrl-names = "default";
414
415 status = "okay";
416};
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300417
418&du {
419 pinctrl-0 = <&du_pins>;
420 pinctrl-names = "default";
421 status = "okay";
422
423 clocks = <&mstp7_clks R8A7791_CLK_DU0>,
424 <&mstp7_clks R8A7791_CLK_DU1>,
425 <&mstp7_clks R8A7791_CLK_LVDS0>,
426 <&x3_clk>, <&x16_clk>;
427 clock-names = "du.0", "du.1", "lvds.0",
428 "dclkin.0", "dclkin.1";
429
430 ports {
431 port@1 {
432 endpoint {
433 remote-endpoint = <&adv7511_in>;
434 };
435 };
436 };
437};
Sergei Shtylyov493b4da2016-01-21 14:36:01 -0800438
439&rcar_sound {
440 pinctrl-0 = <&ssi_pins &audio_clk_pins>;
441 pinctrl-names = "default";
442 status = "okay";
443
444 /* Single DAI */
445 #sound-dai-cells = <0>;
446
447 rcar_sound,dai {
448 dai0 {
449 playback = <&ssi0>;
450 capture = <&ssi1>;
451 };
452 };
453};
454
455&ssi1 {
456 shared-pin;
457};