blob: b13764ca23fdfc9d272fd780c0bd6dc121ac9a24 [file] [log] [blame]
Erich Chen1c57e862006-07-12 08:59:32 -07001/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
NickCheng97b99122011-01-06 17:32:41 +08005** BY : Nick Cheng
Erich Chen1c57e862006-07-12 08:59:32 -07006** Description: SCSI RAID Device Driver for
7** ARECA RAID Host adapter
8*******************************************************************************
9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10**
11** Web site: www.areca.com.tw
Nick Cheng1a4f5502007-09-13 17:26:40 +080012** E-mail: support@areca.com.tw
Erich Chen1c57e862006-07-12 08:59:32 -070013**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License version 2 as
16** published by the Free Software Foundation.
17** This program is distributed in the hope that it will be useful,
18** but WITHOUT ANY WARRANTY; without even the implied warranty of
19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20** GNU General Public License for more details.
21*******************************************************************************
22** Redistribution and use in source and binary forms, with or without
23** modification, are permitted provided that the following conditions
24** are met:
25** 1. Redistributions of source code must retain the above copyright
26** notice, this list of conditions and the following disclaimer.
27** 2. Redistributions in binary form must reproduce the above copyright
28** notice, this list of conditions and the following disclaimer in the
29** documentation and/or other materials provided with the distribution.
30** 3. The name of the author may not be used to endorse or promote products
31** derived from this software without specific prior written permission.
32**
33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43*******************************************************************************
44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46*******************************************************************************
47*/
48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
David Millera7c89622010-08-16 21:20:07 -070059#include <linux/slab.h>
Erich Chen1c57e862006-07-12 08:59:32 -070060#include <linux/pci.h>
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +080061#include <linux/aer.h>
Erich Chen1c57e862006-07-12 08:59:32 -070062#include <asm/dma.h>
63#include <asm/io.h>
Erich Chen1c57e862006-07-12 08:59:32 -070064#include <asm/uaccess.h>
65#include <scsi/scsi_host.h>
66#include <scsi/scsi.h>
67#include <scsi/scsi_cmnd.h>
68#include <scsi/scsi_tcq.h>
69#include <scsi/scsi_device.h>
70#include <scsi/scsi_transport.h>
71#include <scsi/scsicam.h>
72#include "arcmsr.h"
Nick Chengae52e7f2010-06-18 15:39:12 +080073MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
Nick Chengcdd3cb12010-07-13 20:03:04 +080074MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
Erich Chen1c57e862006-07-12 08:59:32 -070075MODULE_LICENSE("Dual BSD/GPL");
76MODULE_VERSION(ARCMSR_DRIVER_VERSION);
Tomas Henzl8b7eb862011-04-29 16:28:24 +020077
78#define ARCMSR_SLEEPTIME 10
79#define ARCMSR_RETRYCOUNT 12
80
Nick Chengae52e7f2010-06-18 15:39:12 +080081wait_queue_head_t wait_q;
Nick Cheng1a4f5502007-09-13 17:26:40 +080082static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
83 struct scsi_cmnd *cmd);
84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070085static int arcmsr_abort(struct scsi_cmnd *);
86static int arcmsr_bus_reset(struct scsi_cmnd *);
87static int arcmsr_bios_param(struct scsi_device *sdev,
Nick Cheng1a4f5502007-09-13 17:26:40 +080088 struct block_device *bdev, sector_t capacity, int *info);
Jeff Garzikf2812332010-11-16 02:10:29 -050089static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
Erich Chen1c57e862006-07-12 08:59:32 -070090static int arcmsr_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id);
92static void arcmsr_remove(struct pci_dev *pdev);
93static void arcmsr_shutdown(struct pci_dev *pdev);
94static void arcmsr_iop_init(struct AdapterControlBlock *acb);
95static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080096static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070097static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080098static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
99static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800100static void arcmsr_request_device_map(unsigned long pacb);
101static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
102static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800103static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800104static void arcmsr_message_isr_bh_fn(struct work_struct *work);
Nick Chengae52e7f2010-06-18 15:39:12 +0800105static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800106static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800107static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
108static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700109static const char *arcmsr_info(struct Scsi_Host *);
110static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800111static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
Mike Christiee881a172009-10-15 17:46:39 -0700112 int queue_depth, int reason)
Erich Chen1c57e862006-07-12 08:59:32 -0700113{
Mike Christiee881a172009-10-15 17:46:39 -0700114 if (reason != SCSI_QDEPTH_DEFAULT)
115 return -EOPNOTSUPP;
116
Erich Chen1c57e862006-07-12 08:59:32 -0700117 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
118 queue_depth = ARCMSR_MAX_CMD_PERLUN;
119 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
120 return queue_depth;
121}
122
123static struct scsi_host_template arcmsr_scsi_host_template = {
124 .module = THIS_MODULE,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800125 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
126 ARCMSR_DRIVER_VERSION,
Erich Chen1c57e862006-07-12 08:59:32 -0700127 .info = arcmsr_info,
128 .queuecommand = arcmsr_queue_command,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800129 .eh_abort_handler = arcmsr_abort,
Erich Chen1c57e862006-07-12 08:59:32 -0700130 .eh_bus_reset_handler = arcmsr_bus_reset,
131 .bios_param = arcmsr_bios_param,
132 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
Nick Chengae52e7f2010-06-18 15:39:12 +0800133 .can_queue = ARCMSR_MAX_FREECCB_NUM,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800134 .this_id = ARCMSR_SCSI_INITIATOR_ID,
135 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
136 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
Erich Chen1c57e862006-07-12 08:59:32 -0700137 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
138 .use_clustering = ENABLE_CLUSTERING,
139 .shost_attrs = arcmsr_host_attrs,
Martin K. Petersen54b2b502013-10-23 06:25:40 -0400140 .no_write_same = 1,
Erich Chen1c57e862006-07-12 08:59:32 -0700141};
Erich Chen1c57e862006-07-12 08:59:32 -0700142static struct pci_device_id arcmsr_device_id_table[] = {
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
Nick Cheng1a4f5502007-09-13 17:26:40 +0800148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
Erich Chen1c57e862006-07-12 08:59:32 -0700151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
Nick Chengae52e7f2010-06-18 15:39:12 +0800161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
Erich Chen1c57e862006-07-12 08:59:32 -0700162 {0, 0}, /* Terminating entry */
163};
164MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
165static struct pci_driver arcmsr_pci_driver = {
166 .name = "arcmsr",
Nick Chengcdd3cb12010-07-13 20:03:04 +0800167 .id_table = arcmsr_device_id_table,
Erich Chen1c57e862006-07-12 08:59:32 -0700168 .probe = arcmsr_probe,
169 .remove = arcmsr_remove,
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +0800170 .shutdown = arcmsr_shutdown,
Erich Chen1c57e862006-07-12 08:59:32 -0700171};
Nick Chengcdd3cb12010-07-13 20:03:04 +0800172/*
173****************************************************************************
174****************************************************************************
175*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800176
177static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800178{
179 switch (acb->adapter_type) {
180 case ACB_ADAPTER_TYPE_A:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800181 case ACB_ADAPTER_TYPE_C:
Nick Chengae52e7f2010-06-18 15:39:12 +0800182 break;
183 case ACB_ADAPTER_TYPE_B:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800184 dma_free_coherent(&acb->pdev->dev,
185 sizeof(struct MessageUnit_B),
186 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
Nick Chengae52e7f2010-06-18 15:39:12 +0800187 }
188 }
189}
190
191static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
192{
193 struct pci_dev *pdev = acb->pdev;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800194 switch (acb->adapter_type){
Nick Chengae52e7f2010-06-18 15:39:12 +0800195 case ACB_ADAPTER_TYPE_A:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800196 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
Nick Chengae52e7f2010-06-18 15:39:12 +0800197 if (!acb->pmuA) {
198 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
199 return false;
200 }
201 break;
202 }
203 case ACB_ADAPTER_TYPE_B:{
204 void __iomem *mem_base0, *mem_base1;
205 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
206 if (!mem_base0) {
207 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
208 return false;
209 }
210 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
211 if (!mem_base1) {
212 iounmap(mem_base0);
213 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
214 return false;
215 }
216 acb->mem_base0 = mem_base0;
217 acb->mem_base1 = mem_base1;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800218 break;
219 }
220 case ACB_ADAPTER_TYPE_C:{
221 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
222 if (!acb->pmuC) {
223 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
224 return false;
225 }
226 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
227 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
228 return true;
229 }
230 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800231 }
232 }
233 return true;
234}
235
236static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
237{
238 switch (acb->adapter_type) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800239 case ACB_ADAPTER_TYPE_A:{
240 iounmap(acb->pmuA);
241 }
242 break;
243 case ACB_ADAPTER_TYPE_B:{
244 iounmap(acb->mem_base0);
245 iounmap(acb->mem_base1);
246 }
247
248 break;
249 case ACB_ADAPTER_TYPE_C:{
250 iounmap(acb->pmuC);
251 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800252 }
253}
254
David Howells7d12e782006-10-05 14:55:46 +0100255static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
Erich Chen1c57e862006-07-12 08:59:32 -0700256{
257 irqreturn_t handle_state;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800258 struct AdapterControlBlock *acb = dev_id;
Erich Chen1c57e862006-07-12 08:59:32 -0700259
Erich Chen1c57e862006-07-12 08:59:32 -0700260 handle_state = arcmsr_interrupt(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700261 return handle_state;
262}
263
264static int arcmsr_bios_param(struct scsi_device *sdev,
265 struct block_device *bdev, sector_t capacity, int *geom)
266{
267 int ret, heads, sectors, cylinders, total_capacity;
268 unsigned char *buffer;/* return copy of block device's partition table */
269
270 buffer = scsi_bios_ptable(bdev);
271 if (buffer) {
272 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
273 kfree(buffer);
274 if (ret != -1)
275 return ret;
276 }
277 total_capacity = capacity;
278 heads = 64;
279 sectors = 32;
280 cylinders = total_capacity / (heads * sectors);
281 if (cylinders > 1024) {
282 heads = 255;
283 sectors = 63;
284 cylinders = total_capacity / (heads * sectors);
285 }
286 geom[0] = heads;
287 geom[1] = sectors;
288 geom[2] = cylinders;
289 return 0;
290}
291
Nick Cheng1a4f5502007-09-13 17:26:40 +0800292static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -0700293{
294 struct pci_dev *pdev = acb->pdev;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800295 u16 dev_id;
296 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
Nick Chengae52e7f2010-06-18 15:39:12 +0800297 acb->dev_id = dev_id;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800298 switch (dev_id) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800299 case 0x1880: {
300 acb->adapter_type = ACB_ADAPTER_TYPE_C;
301 }
302 break;
303 case 0x1201: {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800304 acb->adapter_type = ACB_ADAPTER_TYPE_B;
305 }
306 break;
Erich Chen1c57e862006-07-12 08:59:32 -0700307
Nick Chengcdd3cb12010-07-13 20:03:04 +0800308 default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800309 }
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200310}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800311
Nick Chengae52e7f2010-06-18 15:39:12 +0800312static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800313{
Nick Chengae52e7f2010-06-18 15:39:12 +0800314 struct MessageUnit_A __iomem *reg = acb->pmuA;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200315 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800316
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200317 for (i = 0; i < 2000; i++) {
318 if (readl(&reg->outbound_intstatus) &
319 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
320 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
321 &reg->outbound_intstatus);
322 return true;
323 }
324 msleep(10);
325 } /* max 20 seconds */
326
Nick Chengcdd3cb12010-07-13 20:03:04 +0800327 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800328}
329
330static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
331{
332 struct MessageUnit_B *reg = acb->pmuB;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200333 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800334
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200335 for (i = 0; i < 2000; i++) {
336 if (readl(reg->iop2drv_doorbell)
337 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
338 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
339 reg->iop2drv_doorbell);
340 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
341 reg->drv2iop_doorbell);
342 return true;
343 }
344 msleep(10);
345 } /* max 20 seconds */
346
Nick Chengcdd3cb12010-07-13 20:03:04 +0800347 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800348}
349
Nick Chengcdd3cb12010-07-13 20:03:04 +0800350static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
351{
352 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200353 int i;
354
355 for (i = 0; i < 2000; i++) {
356 if (readl(&phbcmu->outbound_doorbell)
357 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
358 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
359 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
360 return true;
361 }
362 msleep(10);
363 } /* max 20 seconds */
364
Nick Chengcdd3cb12010-07-13 20:03:04 +0800365 return false;
366}
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200367
Nick Chengae52e7f2010-06-18 15:39:12 +0800368static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
369{
370 struct MessageUnit_A __iomem *reg = acb->pmuA;
371 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800372 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
373 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800374 if (arcmsr_hba_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800375 break;
376 else {
377 retry_count--;
378 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
379 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
380 }
381 } while (retry_count != 0);
382}
383
384static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
385{
386 struct MessageUnit_B *reg = acb->pmuB;
387 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800388 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
389 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800390 if (arcmsr_hbb_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800391 break;
392 else {
393 retry_count--;
394 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
395 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
396 }
397 } while (retry_count != 0);
398}
399
Nick Chengcdd3cb12010-07-13 20:03:04 +0800400static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
401{
402 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
403 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
404 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
405 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
406 do {
407 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
408 break;
409 } else {
410 retry_count--;
411 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
412 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
413 }
414 } while (retry_count != 0);
415 return;
416}
Nick Chengae52e7f2010-06-18 15:39:12 +0800417static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
418{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800419 switch (acb->adapter_type) {
420
421 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800422 arcmsr_flush_hba_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800423 }
424 break;
425
426 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800427 arcmsr_flush_hbb_cache(acb);
428 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800429 break;
430 case ACB_ADAPTER_TYPE_C: {
431 arcmsr_flush_hbc_cache(acb);
432 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800433 }
434}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800435
Nick Chengae52e7f2010-06-18 15:39:12 +0800436static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
437{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800438 struct pci_dev *pdev = acb->pdev;
439 void *dma_coherent;
440 dma_addr_t dma_coherent_handle;
441 struct CommandControlBlock *ccb_tmp;
442 int i = 0, j = 0;
443 dma_addr_t cdb_phyaddr;
Tomas Henzl87f76152011-04-29 16:28:30 +0200444 unsigned long roundup_ccbsize;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800445 unsigned long max_xfer_len;
446 unsigned long max_sg_entrys;
447 uint32_t firm_config_version;
Tomas Henzl87f76152011-04-29 16:28:30 +0200448
Nick Chengcdd3cb12010-07-13 20:03:04 +0800449 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
450 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
451 acb->devstate[i][j] = ARECA_RAID_GONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800452
Nick Chengcdd3cb12010-07-13 20:03:04 +0800453 max_xfer_len = ARCMSR_MAX_XFER_LEN;
454 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
455 firm_config_version = acb->firm_cfg_version;
456 if((firm_config_version & 0xFF) >= 3){
457 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
Tomas Henzl87f76152011-04-29 16:28:30 +0200458 max_sg_entrys = (max_xfer_len/4096);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800459 }
460 acb->host->max_sectors = max_xfer_len/512;
461 acb->host->sg_tablesize = max_sg_entrys;
462 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
Tomas Henzl87f76152011-04-29 16:28:30 +0200463 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800464 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
465 if(!dma_coherent){
Tomas Henzl87f76152011-04-29 16:28:30 +0200466 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800467 return -ENOMEM;
468 }
469 acb->dma_coherent = dma_coherent;
470 acb->dma_coherent_handle = dma_coherent_handle;
471 memset(dma_coherent, 0, acb->uncache_size);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800472 ccb_tmp = dma_coherent;
473 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
474 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
475 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
476 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
477 acb->pccb_pool[i] = ccb_tmp;
478 ccb_tmp->acb = acb;
479 INIT_LIST_HEAD(&ccb_tmp->list);
480 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
481 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
482 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
Erich Chen1c57e862006-07-12 08:59:32 -0700483 }
Erich Chen1c57e862006-07-12 08:59:32 -0700484 return 0;
485}
Nick Cheng36b83de2010-05-17 11:22:42 +0800486
Nick Chengcdd3cb12010-07-13 20:03:04 +0800487static void arcmsr_message_isr_bh_fn(struct work_struct *work)
488{
489 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +0800490 switch (acb->adapter_type) {
491 case ACB_ADAPTER_TYPE_A: {
492
493 struct MessageUnit_A __iomem *reg = acb->pmuA;
494 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800495 uint32_t __iomem *signature = (uint32_t __iomem*) (&reg->message_rwbuffer[0]);
496 char __iomem *devicemap = (char __iomem*) (&reg->message_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800497 int target, lun;
498 struct scsi_device *psdev;
499 char diff;
500
501 atomic_inc(&acb->rq_map_token);
502 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800503 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800504 diff = (*acb_dev_map)^readb(devicemap);
505 if (diff != 0) {
506 char temp;
507 *acb_dev_map = readb(devicemap);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800508 temp =*acb_dev_map;
509 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
510 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800511 scsi_add_device(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800512 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800513 psdev = scsi_device_lookup(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800514 if (psdev != NULL ) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800515 scsi_remove_device(psdev);
516 scsi_device_put(psdev);
517 }
518 }
519 temp >>= 1;
520 diff >>= 1;
521 }
522 }
523 devicemap++;
524 acb_dev_map++;
525 }
526 }
527 break;
528 }
529
530 case ACB_ADAPTER_TYPE_B: {
531 struct MessageUnit_B *reg = acb->pmuB;
532 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800533 uint32_t __iomem *signature = (uint32_t __iomem*)(&reg->message_rwbuffer[0]);
534 char __iomem *devicemap = (char __iomem*)(&reg->message_rwbuffer[21]);
535 int target, lun;
536 struct scsi_device *psdev;
537 char diff;
538
539 atomic_inc(&acb->rq_map_token);
540 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
541 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
542 diff = (*acb_dev_map)^readb(devicemap);
543 if (diff != 0) {
544 char temp;
545 *acb_dev_map = readb(devicemap);
546 temp =*acb_dev_map;
547 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
548 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
549 scsi_add_device(acb->host, 0, target, lun);
550 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
551 psdev = scsi_device_lookup(acb->host, 0, target, lun);
552 if (psdev != NULL ) {
553 scsi_remove_device(psdev);
554 scsi_device_put(psdev);
555 }
556 }
557 temp >>= 1;
558 diff >>= 1;
559 }
560 }
561 devicemap++;
562 acb_dev_map++;
563 }
564 }
565 }
566 break;
567 case ACB_ADAPTER_TYPE_C: {
568 struct MessageUnit_C *reg = acb->pmuC;
569 char *acb_dev_map = (char *)acb->device_map;
570 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
571 char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800572 int target, lun;
573 struct scsi_device *psdev;
574 char diff;
575
576 atomic_inc(&acb->rq_map_token);
577 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
578 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
579 diff = (*acb_dev_map)^readb(devicemap);
580 if (diff != 0) {
581 char temp;
582 *acb_dev_map = readb(devicemap);
583 temp = *acb_dev_map;
584 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
585 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
586 scsi_add_device(acb->host, 0, target, lun);
587 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
588 psdev = scsi_device_lookup(acb->host, 0, target, lun);
589 if (psdev != NULL) {
590 scsi_remove_device(psdev);
591 scsi_device_put(psdev);
592 }
593 }
594 temp >>= 1;
595 diff >>= 1;
596 }
597 }
598 devicemap++;
599 acb_dev_map++;
600 }
601 }
602 }
603 }
604}
Erich Chen1c57e862006-07-12 08:59:32 -0700605
Nick Chengae52e7f2010-06-18 15:39:12 +0800606static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
Erich Chen1c57e862006-07-12 08:59:32 -0700607{
608 struct Scsi_Host *host;
609 struct AdapterControlBlock *acb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800610 uint8_t bus,dev_fun;
Erich Chen1c57e862006-07-12 08:59:32 -0700611 int error;
Erich Chen1c57e862006-07-12 08:59:32 -0700612 error = pci_enable_device(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800613 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800614 return -ENODEV;
Erich Chen1c57e862006-07-12 08:59:32 -0700615 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800616 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800617 if(!host){
618 goto pci_disable_dev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800619 }
Yang Hongyang6a355282009-04-06 19:01:13 -0700620 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800621 if(error){
Yang Hongyang284901a2009-04-06 19:01:15 -0700622 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800623 if(error){
Erich Chen1c57e862006-07-12 08:59:32 -0700624 printk(KERN_WARNING
625 "scsi%d: No suitable DMA mask available\n",
626 host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +0800627 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700628 }
629 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800630 init_waitqueue_head(&wait_q);
Erich Chen1c57e862006-07-12 08:59:32 -0700631 bus = pdev->bus->number;
632 dev_fun = pdev->devfn;
Nick Chengae52e7f2010-06-18 15:39:12 +0800633 acb = (struct AdapterControlBlock *) host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800634 memset(acb,0,sizeof(struct AdapterControlBlock));
Erich Chen1c57e862006-07-12 08:59:32 -0700635 acb->pdev = pdev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800636 acb->host = host;
Erich Chen1c57e862006-07-12 08:59:32 -0700637 host->max_lun = ARCMSR_MAX_TARGETLUN;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800638 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
639 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
640 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
641 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
Erich Chen1c57e862006-07-12 08:59:32 -0700642 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
643 host->unique_id = (bus << 8) | dev_fun;
Nick Chengae52e7f2010-06-18 15:39:12 +0800644 pci_set_drvdata(pdev, host);
645 pci_set_master(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -0700646 error = pci_request_regions(pdev, "arcmsr");
Nick Chengcdd3cb12010-07-13 20:03:04 +0800647 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800648 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700649 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800650 spin_lock_init(&acb->eh_lock);
651 spin_lock_init(&acb->ccblist_lock);
Erich Chen1c57e862006-07-12 08:59:32 -0700652 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
Nick Chengcdd3cb12010-07-13 20:03:04 +0800653 ACB_F_MESSAGE_RQBUFFER_CLEARED |
654 ACB_F_MESSAGE_WQBUFFER_READED);
Erich Chen1c57e862006-07-12 08:59:32 -0700655 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
656 INIT_LIST_HEAD(&acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800657 arcmsr_define_adapter_type(acb);
658 error = arcmsr_remap_pciregion(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800659 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800660 goto pci_release_regs;
661 }
662 error = arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800663 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800664 goto unmap_pci_region;
665 }
Erich Chen1c57e862006-07-12 08:59:32 -0700666 error = arcmsr_alloc_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800667 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800668 goto free_hbb_mu;
669 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800670 arcmsr_iop_init(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700671 error = scsi_add_host(host, &pdev->dev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800672 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800673 goto RAID_controller_stop;
674 }
675 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800676 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800677 goto scsi_host_remove;
678 }
679 host->irq = pdev->irq;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800680 scsi_scan_host(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800681 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
Nick Cheng36b83de2010-05-17 11:22:42 +0800682 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +0800683 atomic_set(&acb->ante_token_value, 16);
684 acb->fw_flag = FW_NORMAL;
Nick Cheng36b83de2010-05-17 11:22:42 +0800685 init_timer(&acb->eternal_timer);
Nick Chengae52e7f2010-06-18 15:39:12 +0800686 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Nick Cheng36b83de2010-05-17 11:22:42 +0800687 acb->eternal_timer.data = (unsigned long) acb;
688 acb->eternal_timer.function = &arcmsr_request_device_map;
689 add_timer(&acb->eternal_timer);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800690 if(arcmsr_alloc_sysfs_attr(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800691 goto out_free_sysfs;
Erich Chen1c57e862006-07-12 08:59:32 -0700692 return 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800693out_free_sysfs:
Nick Chengae52e7f2010-06-18 15:39:12 +0800694scsi_host_remove:
695 scsi_remove_host(host);
696RAID_controller_stop:
697 arcmsr_stop_adapter_bgrb(acb);
698 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700699 arcmsr_free_ccb_pool(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800700free_hbb_mu:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800701 arcmsr_free_hbb_mu(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800702unmap_pci_region:
703 arcmsr_unmap_pciregion(acb);
704pci_release_regs:
Erich Chen1c57e862006-07-12 08:59:32 -0700705 pci_release_regions(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800706scsi_host_release:
Erich Chen1c57e862006-07-12 08:59:32 -0700707 scsi_host_put(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800708pci_disable_dev:
Erich Chen1c57e862006-07-12 08:59:32 -0700709 pci_disable_device(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800710 return -ENODEV;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800711}
712
Nick Cheng36b83de2010-05-17 11:22:42 +0800713static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800714{
Al Viro80da1ad2007-10-29 05:08:28 +0000715 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -0700716 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800717 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Erich Chen1c57e862006-07-12 08:59:32 -0700718 printk(KERN_NOTICE
719 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
720 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800721 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800722 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800723 return true;
Erich Chen1c57e862006-07-12 08:59:32 -0700724}
725
Nick Cheng36b83de2010-05-17 11:22:42 +0800726static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800727{
Al Viro80da1ad2007-10-29 05:08:28 +0000728 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800729
Nick Chengae52e7f2010-06-18 15:39:12 +0800730 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800731 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800732 printk(KERN_NOTICE
733 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
734 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800735 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800736 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800737 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800738}
Nick Chengcdd3cb12010-07-13 20:03:04 +0800739static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
740{
741 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
742 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
743 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
744 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
745 printk(KERN_NOTICE
746 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
747 , pACB->host->host_no);
748 return false;
749 }
750 return true;
751}
Nick Cheng36b83de2010-05-17 11:22:42 +0800752static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800753{
Nick Cheng36b83de2010-05-17 11:22:42 +0800754 uint8_t rtnval = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800755 switch (acb->adapter_type) {
756 case ACB_ADAPTER_TYPE_A: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800757 rtnval = arcmsr_abort_hba_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800758 }
759 break;
760
761 case ACB_ADAPTER_TYPE_B: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800762 rtnval = arcmsr_abort_hbb_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800763 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800764 break;
765
766 case ACB_ADAPTER_TYPE_C: {
767 rtnval = arcmsr_abort_hbc_allcmd(acb);
768 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800769 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800770 return rtnval;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800771}
772
Nick Chengae52e7f2010-06-18 15:39:12 +0800773static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
774{
775 struct MessageUnit_B *reg = pacb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800776 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800777 if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800778 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
779 return false;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800780 }
781 return true;
Nick Chengae52e7f2010-06-18 15:39:12 +0800782}
783
Erich Chen1c57e862006-07-12 08:59:32 -0700784static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
785{
Erich Chen1c57e862006-07-12 08:59:32 -0700786 struct scsi_cmnd *pcmd = ccb->pcmd;
787
FUJITA Tomonorideff2622007-05-14 19:25:56 +0900788 scsi_dma_unmap(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800789}
Erich Chen1c57e862006-07-12 08:59:32 -0700790
Nick Chengae52e7f2010-06-18 15:39:12 +0800791static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
Erich Chen1c57e862006-07-12 08:59:32 -0700792{
793 struct AdapterControlBlock *acb = ccb->acb;
794 struct scsi_cmnd *pcmd = ccb->pcmd;
Nick Chengae52e7f2010-06-18 15:39:12 +0800795 unsigned long flags;
Nick Chengae52e7f2010-06-18 15:39:12 +0800796 atomic_dec(&acb->ccboutstandingcount);
Erich Chen1c57e862006-07-12 08:59:32 -0700797 arcmsr_pci_unmap_dma(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -0700798 ccb->startdone = ARCMSR_CCB_DONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800799 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700800 list_add_tail(&ccb->list, &acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800801 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700802 pcmd->scsi_done(pcmd);
803}
804
Nick Cheng1a4f5502007-09-13 17:26:40 +0800805static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
806{
807
808 struct scsi_cmnd *pcmd = ccb->pcmd;
809 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800810 pcmd->result = DID_OK << 16;
811 if (sensebuffer) {
812 int sense_data_length =
FUJITA Tomonorib80ca4f2008-01-13 15:46:13 +0900813 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
814 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
815 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800816 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
817 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
818 sensebuffer->Valid = 1;
819 }
820}
821
822static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
823{
824 u32 orig_mask = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800825 switch (acb->adapter_type) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800826 case ACB_ADAPTER_TYPE_A : {
Al Viro80da1ad2007-10-29 05:08:28 +0000827 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800828 orig_mask = readl(&reg->outbound_intmask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800829 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
830 &reg->outbound_intmask);
831 }
832 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800833 case ACB_ADAPTER_TYPE_B : {
Al Viro80da1ad2007-10-29 05:08:28 +0000834 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800835 orig_mask = readl(reg->iop2drv_doorbell_mask);
836 writel(0, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800837 }
838 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800839 case ACB_ADAPTER_TYPE_C:{
840 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
841 /* disable all outbound interrupt */
842 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
843 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
844 }
845 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800846 }
847 return orig_mask;
848}
849
Nick Chengcdd3cb12010-07-13 20:03:04 +0800850static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
851 struct CommandControlBlock *ccb, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800852{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800853 uint8_t id, lun;
854 id = ccb->pcmd->device->id;
855 lun = ccb->pcmd->device->lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800856 if (!error) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800857 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
858 acb->devstate[id][lun] = ARECA_RAID_GOOD;
Julia Lawall7968f192010-08-05 22:19:36 +0200859 ccb->pcmd->result = DID_OK << 16;
860 arcmsr_ccb_complete(ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800861 }else{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800862 switch (ccb->arcmsr_cdb.DeviceStatus) {
863 case ARCMSR_DEV_SELECT_TIMEOUT: {
864 acb->devstate[id][lun] = ARECA_RAID_GONE;
865 ccb->pcmd->result = DID_NO_CONNECT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800866 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800867 }
868 break;
869
870 case ARCMSR_DEV_ABORTED:
871
872 case ARCMSR_DEV_INIT_FAIL: {
873 acb->devstate[id][lun] = ARECA_RAID_GONE;
874 ccb->pcmd->result = DID_BAD_TARGET << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800875 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800876 }
877 break;
878
879 case ARCMSR_DEV_CHECK_CONDITION: {
880 acb->devstate[id][lun] = ARECA_RAID_GOOD;
881 arcmsr_report_sense_info(ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800882 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800883 }
884 break;
885
886 default:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800887 printk(KERN_NOTICE
888 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
889 but got unknown DeviceStatus = 0x%x \n"
890 , acb->host->host_no
891 , id
892 , lun
893 , ccb->arcmsr_cdb.DeviceStatus);
894 acb->devstate[id][lun] = ARECA_RAID_GONE;
895 ccb->pcmd->result = DID_NO_CONNECT << 16;
896 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800897 break;
898 }
899 }
900}
901
Nick Chengcdd3cb12010-07-13 20:03:04 +0800902static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800903{
Nick Chengae52e7f2010-06-18 15:39:12 +0800904 int id, lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800905 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
906 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
907 struct scsi_cmnd *abortcmd = pCCB->pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800908 if (abortcmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800909 id = abortcmd->device->id;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800910 lun = abortcmd->device->lun;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800911 abortcmd->result |= DID_ABORT << 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800912 arcmsr_ccb_complete(pCCB);
913 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
914 acb->host->host_no, pCCB);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800915 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800916 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800917 }
918 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
919 done acb = '0x%p'"
920 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
921 " ccboutstandingcount = %d \n"
922 , acb->host->host_no
923 , acb
Nick Chengcdd3cb12010-07-13 20:03:04 +0800924 , pCCB
925 , pCCB->acb
926 , pCCB->startdone
Nick Cheng1a4f5502007-09-13 17:26:40 +0800927 , atomic_read(&acb->ccboutstandingcount));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800928 return;
NickCheng97b99122011-01-06 17:32:41 +0800929 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800930 arcmsr_report_ccb_state(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800931}
932
933static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
934{
935 int i = 0;
936 uint32_t flag_ccb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800937 struct ARCMSR_CDB *pARCMSR_CDB;
938 bool error;
939 struct CommandControlBlock *pCCB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800940 switch (acb->adapter_type) {
941
942 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +0000943 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800944 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +0000945 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Cheng1a4f5502007-09-13 17:26:40 +0800946 acb->outbound_int_enable;
947 /*clear and abort all outbound posted Q*/
948 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800949 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800950 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800951 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
952 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
953 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
954 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800955 }
956 }
957 break;
958
959 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +0000960 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800961 /*clear all outbound posted Q*/
NickCheng97b99122011-01-06 17:32:41 +0800962 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
Nick Cheng1a4f5502007-09-13 17:26:40 +0800963 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
964 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
965 writel(0, &reg->done_qbuffer[i]);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800966 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
967 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
968 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
969 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800970 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800971 reg->post_qbuffer[i] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800972 }
973 reg->doneq_index = 0;
974 reg->postq_index = 0;
975 }
976 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800977 case ACB_ADAPTER_TYPE_C: {
978 struct MessageUnit_C *reg = acb->pmuC;
979 struct ARCMSR_CDB *pARCMSR_CDB;
980 uint32_t flag_ccb, ccb_cdb_phy;
981 bool error;
982 struct CommandControlBlock *pCCB;
983 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
984 /*need to do*/
985 flag_ccb = readl(&reg->outbound_queueport_low);
986 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
987 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
988 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
989 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
990 arcmsr_drain_donequeue(acb, pCCB, error);
991 }
992 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800993 }
994}
Erich Chen1c57e862006-07-12 08:59:32 -0700995static void arcmsr_remove(struct pci_dev *pdev)
996{
997 struct Scsi_Host *host = pci_get_drvdata(pdev);
998 struct AdapterControlBlock *acb =
999 (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07001000 int poll_count = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001001 arcmsr_free_sysfs_attr(acb);
1002 scsi_remove_host(host);
Tejun Heo43829732012-08-20 14:51:24 -07001003 flush_work(&acb->arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +08001004 del_timer_sync(&acb->eternal_timer);
1005 arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001006 arcmsr_stop_adapter_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001007 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001008 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1009 acb->acb_flags &= ~ACB_F_IOP_INITED;
1010
Nick Chengcdd3cb12010-07-13 20:03:04 +08001011 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
Erich Chen1c57e862006-07-12 08:59:32 -07001012 if (!atomic_read(&acb->ccboutstandingcount))
1013 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001014 arcmsr_interrupt(acb);/* FIXME: need spinlock */
Erich Chen1c57e862006-07-12 08:59:32 -07001015 msleep(25);
1016 }
1017
1018 if (atomic_read(&acb->ccboutstandingcount)) {
1019 int i;
1020
1021 arcmsr_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001022 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001023 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1024 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1025 if (ccb->startdone == ARCMSR_CCB_START) {
1026 ccb->startdone = ARCMSR_CCB_ABORTED;
1027 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001028 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001029 }
1030 }
1031 }
Erich Chen1c57e862006-07-12 08:59:32 -07001032 free_irq(pdev->irq, acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001033 arcmsr_free_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001034 arcmsr_free_hbb_mu(acb);
1035 arcmsr_unmap_pciregion(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001036 pci_release_regions(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001037 scsi_host_put(host);
Erich Chen1c57e862006-07-12 08:59:32 -07001038 pci_disable_device(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -07001039}
1040
1041static void arcmsr_shutdown(struct pci_dev *pdev)
1042{
1043 struct Scsi_Host *host = pci_get_drvdata(pdev);
1044 struct AdapterControlBlock *acb =
1045 (struct AdapterControlBlock *)host->hostdata;
Nick Cheng36b83de2010-05-17 11:22:42 +08001046 del_timer_sync(&acb->eternal_timer);
1047 arcmsr_disable_outbound_ints(acb);
Tejun Heo43829732012-08-20 14:51:24 -07001048 flush_work(&acb->arcmsr_do_message_isr_bh);
Erich Chen1c57e862006-07-12 08:59:32 -07001049 arcmsr_stop_adapter_bgrb(acb);
1050 arcmsr_flush_adapter_cache(acb);
1051}
1052
1053static int arcmsr_module_init(void)
1054{
1055 int error = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001056 error = pci_register_driver(&arcmsr_pci_driver);
1057 return error;
1058}
1059
1060static void arcmsr_module_exit(void)
1061{
1062 pci_unregister_driver(&arcmsr_pci_driver);
1063}
1064module_init(arcmsr_module_init);
1065module_exit(arcmsr_module_exit);
1066
Nick Cheng36b83de2010-05-17 11:22:42 +08001067static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001068 u32 intmask_org)
Erich Chen1c57e862006-07-12 08:59:32 -07001069{
Erich Chen1c57e862006-07-12 08:59:32 -07001070 u32 mask;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001071 switch (acb->adapter_type) {
1072
Nick Chengcdd3cb12010-07-13 20:03:04 +08001073 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001074 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001075 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
Nick Cheng36b83de2010-05-17 11:22:42 +08001076 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1077 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001078 writel(mask, &reg->outbound_intmask);
1079 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1080 }
1081 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001082
Nick Chengcdd3cb12010-07-13 20:03:04 +08001083 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001084 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +08001085 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1086 ARCMSR_IOP2DRV_DATA_READ_OK |
1087 ARCMSR_IOP2DRV_CDB_DONE |
1088 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
Nick Chengae52e7f2010-06-18 15:39:12 +08001089 writel(mask, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001090 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1091 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001092 break;
1093 case ACB_ADAPTER_TYPE_C: {
1094 struct MessageUnit_C *reg = acb->pmuC;
1095 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1096 writel(intmask_org & mask, &reg->host_int_mask);
1097 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1098 }
Erich Chen1c57e862006-07-12 08:59:32 -07001099 }
1100}
1101
Nick Cheng76d78302008-02-04 23:53:24 -08001102static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07001103 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1104{
1105 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1106 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
Al Viro80da1ad2007-10-29 05:08:28 +00001107 __le32 address_lo, address_hi;
Erich Chen1c57e862006-07-12 08:59:32 -07001108 int arccdbsize = 0x30;
Nick Chengae52e7f2010-06-18 15:39:12 +08001109 __le32 length = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001110 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +08001111 struct scatterlist *sg;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001112 int nseg;
Erich Chen1c57e862006-07-12 08:59:32 -07001113 ccb->pcmd = pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001114 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
Erich Chen1c57e862006-07-12 08:59:32 -07001115 arcmsr_cdb->TargetID = pcmd->device->id;
1116 arcmsr_cdb->LUN = pcmd->device->lun;
1117 arcmsr_cdb->Function = 1;
Nick Chengae52e7f2010-06-18 15:39:12 +08001118 arcmsr_cdb->Context = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001119 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
Erich Chen1c57e862006-07-12 08:59:32 -07001120
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001121 nseg = scsi_dma_map(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001122 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
Nick Cheng76d78302008-02-04 23:53:24 -08001123 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001124 scsi_for_each_sg(pcmd, sg, nseg, i) {
1125 /* Get the physical address of the current data pointer */
1126 length = cpu_to_le32(sg_dma_len(sg));
1127 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1128 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1129 if (address_hi == 0) {
1130 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001131
Nick Chengcdd3cb12010-07-13 20:03:04 +08001132 pdma_sg->address = address_lo;
1133 pdma_sg->length = length;
1134 psge += sizeof (struct SG32ENTRY);
1135 arccdbsize += sizeof (struct SG32ENTRY);
1136 } else {
1137 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001138
Nick Chengcdd3cb12010-07-13 20:03:04 +08001139 pdma_sg->addresshigh = address_hi;
1140 pdma_sg->address = address_lo;
1141 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1142 psge += sizeof (struct SG64ENTRY);
1143 arccdbsize += sizeof (struct SG64ENTRY);
Erich Chen1c57e862006-07-12 08:59:32 -07001144 }
Erich Chen1c57e862006-07-12 08:59:32 -07001145 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001146 arcmsr_cdb->sgcount = (uint8_t)nseg;
1147 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1148 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1149 if ( arccdbsize > 256)
1150 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
roel kluinc32e0612011-01-01 19:40:23 +01001151 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001152 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001153 ccb->arc_cdb_size = arccdbsize;
Nick Cheng76d78302008-02-04 23:53:24 -08001154 return SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07001155}
1156
1157static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1158{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001159 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
Erich Chen1c57e862006-07-12 08:59:32 -07001160 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07001161 atomic_inc(&acb->ccboutstandingcount);
1162 ccb->startdone = ARCMSR_CCB_START;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001163 switch (acb->adapter_type) {
1164 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001165 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001166
1167 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001168 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
Erich Chen1c57e862006-07-12 08:59:32 -07001169 &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001170 else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001171 writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001172 }
1173 }
1174 break;
1175
1176 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001177 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001178 uint32_t ending_index, index = reg->postq_index;
1179
1180 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1181 writel(0, &reg->post_qbuffer[ending_index]);
1182 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001183 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
Nick Cheng1a4f5502007-09-13 17:26:40 +08001184 &reg->post_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001185 } else {
1186 writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001187 }
1188 index++;
1189 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1190 reg->postq_index = index;
Nick Chengae52e7f2010-06-18 15:39:12 +08001191 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001192 }
1193 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001194 case ACB_ADAPTER_TYPE_C: {
1195 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1196 uint32_t ccb_post_stamp, arc_cdb_size;
1197
1198 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1199 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1200 if (acb->cdb_phyaddr_hi32) {
1201 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1202 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1203 } else {
1204 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1205 }
1206 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001207 }
Erich Chen1c57e862006-07-12 08:59:32 -07001208}
1209
Nick Cheng1a4f5502007-09-13 17:26:40 +08001210static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001211{
Al Viro80da1ad2007-10-29 05:08:28 +00001212 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001213 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1214 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001215 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001216 printk(KERN_NOTICE
1217 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1218 , acb->host->host_no);
1219 }
1220}
1221
1222static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1223{
Al Viro80da1ad2007-10-29 05:08:28 +00001224 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001225 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001226 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001227
Nick Chengcdd3cb12010-07-13 20:03:04 +08001228 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001229 printk(KERN_NOTICE
1230 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1231 , acb->host->host_no);
Erich Chen1c57e862006-07-12 08:59:32 -07001232 }
1233}
1234
Nick Chengcdd3cb12010-07-13 20:03:04 +08001235static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1236{
1237 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1238 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1239 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1240 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1241 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1242 printk(KERN_NOTICE
1243 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1244 , pACB->host->host_no);
1245 }
1246 return;
1247}
Erich Chen1c57e862006-07-12 08:59:32 -07001248static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1249{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001250 switch (acb->adapter_type) {
1251 case ACB_ADAPTER_TYPE_A: {
1252 arcmsr_stop_hba_bgrb(acb);
1253 }
1254 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001255
Nick Cheng1a4f5502007-09-13 17:26:40 +08001256 case ACB_ADAPTER_TYPE_B: {
1257 arcmsr_stop_hbb_bgrb(acb);
1258 }
1259 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001260 case ACB_ADAPTER_TYPE_C: {
1261 arcmsr_stop_hbc_bgrb(acb);
1262 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001263 }
Erich Chen1c57e862006-07-12 08:59:32 -07001264}
1265
1266static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1267{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001268 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
Erich Chen1c57e862006-07-12 08:59:32 -07001269}
1270
Nick Cheng1a4f5502007-09-13 17:26:40 +08001271void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001272{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001273 switch (acb->adapter_type) {
1274 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001275 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001276 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1277 }
1278 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001279
Nick Cheng1a4f5502007-09-13 17:26:40 +08001280 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001281 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001282 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001283 }
1284 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001285 case ACB_ADAPTER_TYPE_C: {
1286 struct MessageUnit_C __iomem *reg = acb->pmuC;
1287 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1288 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001289 }
1290}
1291
1292static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1293{
1294 switch (acb->adapter_type) {
1295 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001296 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001297 /*
1298 ** push inbound doorbell tell iop, driver data write ok
1299 ** and wait reply on next hwinterrupt for next Qbuffer post
1300 */
1301 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1302 }
1303 break;
1304
1305 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001306 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001307 /*
1308 ** push inbound doorbell tell iop, driver data write ok
1309 ** and wait reply on next hwinterrupt for next Qbuffer post
1310 */
Nick Chengae52e7f2010-06-18 15:39:12 +08001311 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001312 }
1313 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001314 case ACB_ADAPTER_TYPE_C: {
1315 struct MessageUnit_C __iomem *reg = acb->pmuC;
1316 /*
1317 ** push inbound doorbell tell iop, driver data write ok
1318 ** and wait reply on next hwinterrupt for next Qbuffer post
1319 */
1320 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1321 }
1322 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001323 }
1324}
1325
Al Viro80da1ad2007-10-29 05:08:28 +00001326struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001327{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001328 struct QBUFFER __iomem *qbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001329 switch (acb->adapter_type) {
1330
1331 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001332 struct MessageUnit_A __iomem *reg = acb->pmuA;
1333 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001334 }
1335 break;
1336
1337 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001338 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001339 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001340 }
1341 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001342 case ACB_ADAPTER_TYPE_C: {
1343 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1344 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1345 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001346 }
1347 return qbuffer;
1348}
1349
Al Viro80da1ad2007-10-29 05:08:28 +00001350static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001351{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001352 struct QBUFFER __iomem *pqbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001353 switch (acb->adapter_type) {
1354
1355 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001356 struct MessageUnit_A __iomem *reg = acb->pmuA;
1357 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001358 }
1359 break;
1360
1361 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001362 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001363 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001364 }
1365 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001366 case ACB_ADAPTER_TYPE_C: {
1367 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1368 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1369 }
1370
Nick Cheng1a4f5502007-09-13 17:26:40 +08001371 }
1372 return pqbuffer;
1373}
1374
1375static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1376{
Al Viro80da1ad2007-10-29 05:08:28 +00001377 struct QBUFFER __iomem *prbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001378 struct QBUFFER *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001379 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001380 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001381 rqbuf_lastindex = acb->rqbuf_lastindex;
1382 rqbuf_firstindex = acb->rqbuf_firstindex;
1383 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001384 iop_data = (uint8_t __iomem *)prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001385 iop_len = prbuffer->data_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001386 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001387
1388 if (my_empty_len >= iop_len)
1389 {
1390 while (iop_len > 0) {
1391 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
Nick Chengcdd3cb12010-07-13 20:03:04 +08001392 memcpy(pQbuffer, iop_data, 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001393 rqbuf_lastindex++;
1394 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1395 iop_data++;
1396 iop_len--;
1397 }
1398 acb->rqbuf_lastindex = rqbuf_lastindex;
1399 arcmsr_iop_message_read(acb);
1400 }
1401
1402 else {
1403 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1404 }
1405}
1406
1407static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1408{
1409 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1410 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1411 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001412 struct QBUFFER __iomem *pwbuffer;
1413 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001414 int32_t allxfer_len = 0;
1415
1416 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1417 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1418 iop_data = (uint8_t __iomem *)pwbuffer->data;
1419
1420 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1421 (allxfer_len < 124)) {
1422 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1423 memcpy(iop_data, pQbuffer, 1);
1424 acb->wqbuf_firstindex++;
1425 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1426 iop_data++;
1427 allxfer_len++;
1428 }
1429 pwbuffer->data_len = allxfer_len;
1430
1431 arcmsr_iop_message_wrote(acb);
1432 }
1433
1434 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1435 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1436 }
1437}
1438
1439static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1440{
1441 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001442 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001443 outbound_doorbell = readl(&reg->outbound_doorbell);
1444 writel(outbound_doorbell, &reg->outbound_doorbell);
1445 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1446 arcmsr_iop2drv_data_wrote_handle(acb);
1447 }
1448
Nick Chengcdd3cb12010-07-13 20:03:04 +08001449 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001450 arcmsr_iop2drv_data_read_handle(acb);
1451 }
1452}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001453static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1454{
1455 uint32_t outbound_doorbell;
1456 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1457 /*
1458 *******************************************************************
1459 ** Maybe here we need to check wrqbuffer_lock is lock or not
1460 ** DOORBELL: din! don!
1461 ** check if there are any mail need to pack from firmware
1462 *******************************************************************
1463 */
1464 outbound_doorbell = readl(&reg->outbound_doorbell);
1465 writel(outbound_doorbell, &reg->outbound_doorbell_clear);/*clear interrupt*/
1466 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1467 arcmsr_iop2drv_data_wrote_handle(pACB);
1468 }
1469 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1470 arcmsr_iop2drv_data_read_handle(pACB);
1471 }
1472 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1473 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
1474 }
1475 return;
1476}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001477static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1478{
1479 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001480 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001481 struct ARCMSR_CDB *pARCMSR_CDB;
1482 struct CommandControlBlock *pCCB;
1483 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001484 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001485 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1486 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1487 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1488 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001489 }
1490}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001491static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1492{
1493 uint32_t index;
1494 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001495 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001496 struct ARCMSR_CDB *pARCMSR_CDB;
1497 struct CommandControlBlock *pCCB;
1498 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001499 index = reg->doneq_index;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001500 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1501 writel(0, &reg->done_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001502 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1503 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1504 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1505 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001506 index++;
1507 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1508 reg->doneq_index = index;
1509 }
1510}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001511
1512static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1513{
1514 struct MessageUnit_C *phbcmu;
1515 struct ARCMSR_CDB *arcmsr_cdb;
1516 struct CommandControlBlock *ccb;
1517 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1518 int error;
1519
1520 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1521 /* areca cdb command done */
1522 /* Use correct offset and size for syncing */
1523
1524 while (readl(&phbcmu->host_int_status) &
1525 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
1526 /* check if command done with no error*/
1527 flag_ccb = readl(&phbcmu->outbound_queueport_low);
1528 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
1529 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1530 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
1531 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1532 /* check if command done with no error */
1533 arcmsr_drain_donequeue(acb, ccb, error);
1534 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1535 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
1536 break;
1537 }
1538 throttling++;
1539 }
1540}
Nick Cheng36b83de2010-05-17 11:22:42 +08001541/*
1542**********************************************************************************
1543** Handle a message interrupt
1544**
Nick Chengcdd3cb12010-07-13 20:03:04 +08001545** The only message interrupt we expect is in response to a query for the current adapter config.
Nick Cheng36b83de2010-05-17 11:22:42 +08001546** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1547**********************************************************************************
1548*/
1549static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1550{
1551 struct MessageUnit_A *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001552 /*clear interrupt and message state*/
1553 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1554 schedule_work(&acb->arcmsr_do_message_isr_bh);
1555}
1556static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1557{
1558 struct MessageUnit_B *reg = acb->pmuB;
1559
1560 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001561 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001562 schedule_work(&acb->arcmsr_do_message_isr_bh);
1563}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001564/*
1565**********************************************************************************
1566** Handle a message interrupt
1567**
1568** The only message interrupt we expect is in response to a query for the
1569** current adapter config.
1570** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1571**********************************************************************************
1572*/
1573static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1574{
1575 struct MessageUnit_C *reg = acb->pmuC;
1576 /*clear interrupt and message state*/
1577 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1578 schedule_work(&acb->arcmsr_do_message_isr_bh);
1579}
1580
Nick Cheng1a4f5502007-09-13 17:26:40 +08001581static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1582{
1583 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001584 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001585 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001586 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001587 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1588 return 1;
1589 }
Erich Chen1c57e862006-07-12 08:59:32 -07001590 writel(outbound_intstatus, &reg->outbound_intstatus);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001591 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1592 arcmsr_hba_doorbell_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001593 }
1594 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001595 arcmsr_hba_postqueue_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001596 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001597 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001598 /* messenger of "driver to iop commands" */
1599 arcmsr_hba_message_isr(acb);
1600 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001601 return 0;
1602}
1603
1604static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1605{
1606 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001607 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001608 outbound_doorbell = readl(reg->iop2drv_doorbell) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001609 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001610 if (!outbound_doorbell)
1611 return 1;
1612
Nick Chengae52e7f2010-06-18 15:39:12 +08001613 writel(~outbound_doorbell, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001614 /*in case the last action of doorbell interrupt clearance is cached,
1615 this action can push HW to write down the clear bit*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001616 readl(reg->iop2drv_doorbell);
1617 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001618 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001619 arcmsr_iop2drv_data_wrote_handle(acb);
1620 }
1621 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1622 arcmsr_iop2drv_data_read_handle(acb);
1623 }
1624 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1625 arcmsr_hbb_postqueue_isr(acb);
1626 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001627 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001628 /* messenger of "driver to iop commands" */
1629 arcmsr_hbb_message_isr(acb);
1630 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001631 return 0;
1632}
1633
Nick Chengcdd3cb12010-07-13 20:03:04 +08001634static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1635{
1636 uint32_t host_interrupt_status;
1637 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1638 /*
1639 *********************************************
1640 ** check outbound intstatus
1641 *********************************************
1642 */
1643 host_interrupt_status = readl(&phbcmu->host_int_status);
1644 if (!host_interrupt_status) {
1645 /*it must be share irq*/
1646 return 1;
1647 }
1648 /* MU ioctl transfer doorbell interrupts*/
1649 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1650 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
1651 }
1652 /* MU post queue interrupts*/
1653 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1654 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
1655 }
1656 return 0;
1657}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001658static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1659{
1660 switch (acb->adapter_type) {
1661 case ACB_ADAPTER_TYPE_A: {
1662 if (arcmsr_handle_hba_isr(acb)) {
1663 return IRQ_NONE;
1664 }
1665 }
1666 break;
1667
1668 case ACB_ADAPTER_TYPE_B: {
1669 if (arcmsr_handle_hbb_isr(acb)) {
1670 return IRQ_NONE;
1671 }
1672 }
1673 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001674 case ACB_ADAPTER_TYPE_C: {
1675 if (arcmsr_handle_hbc_isr(acb)) {
1676 return IRQ_NONE;
1677 }
1678 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001679 }
Erich Chen1c57e862006-07-12 08:59:32 -07001680 return IRQ_HANDLED;
1681}
1682
1683static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1684{
1685 if (acb) {
1686 /* stop adapter background rebuild */
1687 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001688 uint32_t intmask_org;
Erich Chen1c57e862006-07-12 08:59:32 -07001689 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001690 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001691 arcmsr_stop_adapter_bgrb(acb);
1692 arcmsr_flush_adapter_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001693 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07001694 }
1695 }
1696}
1697
Nick Cheng1a4f5502007-09-13 17:26:40 +08001698void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001699{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001700 int32_t wqbuf_firstindex, wqbuf_lastindex;
1701 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001702 struct QBUFFER __iomem *pwbuffer;
1703 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001704 int32_t allxfer_len = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001705 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1706 iop_data = (uint8_t __iomem *)pwbuffer->data;
1707 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1708 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1709 wqbuf_firstindex = acb->wqbuf_firstindex;
1710 wqbuf_lastindex = acb->wqbuf_lastindex;
1711 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1712 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1713 memcpy(iop_data, pQbuffer, 1);
1714 wqbuf_firstindex++;
1715 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1716 iop_data++;
1717 allxfer_len++;
1718 }
1719 acb->wqbuf_firstindex = wqbuf_firstindex;
1720 pwbuffer->data_len = allxfer_len;
1721 arcmsr_iop_message_wrote(acb);
1722 }
1723}
1724
Nick Cheng36b83de2010-05-17 11:22:42 +08001725static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001726 struct scsi_cmnd *cmd)
1727{
Erich Chen1c57e862006-07-12 08:59:32 -07001728 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1729 int retvalue = 0, transfer_len = 0;
1730 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001731 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07001732 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1733 (uint32_t ) cmd->cmnd[6] << 16 |
1734 (uint32_t ) cmd->cmnd[7] << 8 |
1735 (uint32_t ) cmd->cmnd[8];
Nick Cheng1a4f5502007-09-13 17:26:40 +08001736 /* 4 bytes: Areca io control code */
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001737 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08001738 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001739 if (scsi_sg_count(cmd) > 1) {
1740 retvalue = ARCMSR_MESSAGE_FAIL;
1741 goto message_out;
Erich Chen1c57e862006-07-12 08:59:32 -07001742 }
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001743 transfer_len += sg->length;
1744
Erich Chen1c57e862006-07-12 08:59:32 -07001745 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1746 retvalue = ARCMSR_MESSAGE_FAIL;
1747 goto message_out;
1748 }
1749 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1750 switch(controlcode) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001751
Erich Chen1c57e862006-07-12 08:59:32 -07001752 case ARCMSR_MESSAGE_READ_RQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001753 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001754 uint8_t *pQbuffer, *ptmpQbuffer;
1755 int32_t allxfer_len = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001756
Daniel Drake69e562c2008-02-20 13:29:05 +00001757 ver_addr = kmalloc(1032, GFP_ATOMIC);
1758 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001759 retvalue = ARCMSR_MESSAGE_FAIL;
1760 goto message_out;
1761 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001762
Daniel Drake69e562c2008-02-20 13:29:05 +00001763 ptmpQbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001764 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1765 && (allxfer_len < 1031)) {
1766 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1767 memcpy(ptmpQbuffer, pQbuffer, 1);
1768 acb->rqbuf_firstindex++;
1769 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1770 ptmpQbuffer++;
1771 allxfer_len++;
1772 }
1773 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
Erich Chen1c57e862006-07-12 08:59:32 -07001774
Al Viro80da1ad2007-10-29 05:08:28 +00001775 struct QBUFFER __iomem *prbuffer;
1776 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001777 int32_t iop_len;
1778
1779 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1780 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001781 iop_data = prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001782 iop_len = readl(&prbuffer->data_len);
1783 while (iop_len > 0) {
1784 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1785 acb->rqbuf_lastindex++;
1786 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1787 iop_data++;
1788 iop_len--;
Erich Chen1c57e862006-07-12 08:59:32 -07001789 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001790 arcmsr_iop_message_read(acb);
1791 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001792 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001793 pcmdmessagefld->cmdmessage.Length = allxfer_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001794 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001795 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001796 }else{
1797 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Chengae52e7f2010-06-18 15:39:12 +08001798 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001799 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001800 }
1801 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001802
Nick Cheng1a4f5502007-09-13 17:26:40 +08001803 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001804 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001805 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1806 uint8_t *pQbuffer, *ptmpuserbuffer;
1807
Daniel Drake69e562c2008-02-20 13:29:05 +00001808 ver_addr = kmalloc(1032, GFP_ATOMIC);
1809 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001810 retvalue = ARCMSR_MESSAGE_FAIL;
1811 goto message_out;
1812 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001813 if(acb->fw_flag == FW_DEADLOCK) {
1814 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Cheng36b83de2010-05-17 11:22:42 +08001815 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001816 }else{
1817 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Chengae52e7f2010-06-18 15:39:12 +08001818 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001819 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001820 ptmpuserbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001821 user_len = pcmdmessagefld->cmdmessage.Length;
1822 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1823 wqbuf_lastindex = acb->wqbuf_lastindex;
1824 wqbuf_firstindex = acb->wqbuf_firstindex;
1825 if (wqbuf_lastindex != wqbuf_firstindex) {
1826 struct SENSE_DATA *sensebuffer =
1827 (struct SENSE_DATA *)cmd->sense_buffer;
1828 arcmsr_post_ioctldata2iop(acb);
1829 /* has error report sensedata */
1830 sensebuffer->ErrorCode = 0x70;
1831 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1832 sensebuffer->AdditionalSenseLength = 0x0A;
1833 sensebuffer->AdditionalSenseCode = 0x20;
1834 sensebuffer->Valid = 1;
1835 retvalue = ARCMSR_MESSAGE_FAIL;
1836 } else {
1837 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1838 &(ARCMSR_MAX_QBUFFER - 1);
1839 if (my_empty_len >= user_len) {
1840 while (user_len > 0) {
1841 pQbuffer =
1842 &acb->wqbuffer[acb->wqbuf_lastindex];
1843 memcpy(pQbuffer, ptmpuserbuffer, 1);
1844 acb->wqbuf_lastindex++;
1845 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1846 ptmpuserbuffer++;
1847 user_len--;
1848 }
1849 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1850 acb->acb_flags &=
1851 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1852 arcmsr_post_ioctldata2iop(acb);
1853 }
1854 } else {
1855 /* has error report sensedata */
Erich Chen1c57e862006-07-12 08:59:32 -07001856 struct SENSE_DATA *sensebuffer =
1857 (struct SENSE_DATA *)cmd->sense_buffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001858 sensebuffer->ErrorCode = 0x70;
1859 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1860 sensebuffer->AdditionalSenseLength = 0x0A;
1861 sensebuffer->AdditionalSenseCode = 0x20;
1862 sensebuffer->Valid = 1;
1863 retvalue = ARCMSR_MESSAGE_FAIL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001864 }
Erich Chen1c57e862006-07-12 08:59:32 -07001865 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001866 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001867 }
1868 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001869
Erich Chen1c57e862006-07-12 08:59:32 -07001870 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001871 uint8_t *pQbuffer = acb->rqbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001872 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1873 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1874 arcmsr_iop_message_read(acb);
1875 }
1876 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1877 acb->rqbuf_firstindex = 0;
1878 acb->rqbuf_lastindex = 0;
1879 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001880 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001881 pcmdmessagefld->cmdmessage.ReturnCode =
1882 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001883 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001884 pcmdmessagefld->cmdmessage.ReturnCode =
1885 ARCMSR_MESSAGE_RETURNCODE_OK;
1886 }
Erich Chen1c57e862006-07-12 08:59:32 -07001887 }
1888 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001889
Erich Chen1c57e862006-07-12 08:59:32 -07001890 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001891 uint8_t *pQbuffer = acb->wqbuffer;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001892 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001893 pcmdmessagefld->cmdmessage.ReturnCode =
1894 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001895 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001896 pcmdmessagefld->cmdmessage.ReturnCode =
1897 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001898 }
Erich Chen1c57e862006-07-12 08:59:32 -07001899
Nick Cheng1a4f5502007-09-13 17:26:40 +08001900 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1901 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1902 arcmsr_iop_message_read(acb);
1903 }
1904 acb->acb_flags |=
1905 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1906 ACB_F_MESSAGE_WQBUFFER_READED);
1907 acb->wqbuf_firstindex = 0;
1908 acb->wqbuf_lastindex = 0;
1909 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Erich Chen1c57e862006-07-12 08:59:32 -07001910 }
1911 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001912
Erich Chen1c57e862006-07-12 08:59:32 -07001913 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001914 uint8_t *pQbuffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001915
Nick Cheng1a4f5502007-09-13 17:26:40 +08001916 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1917 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1918 arcmsr_iop_message_read(acb);
1919 }
1920 acb->acb_flags |=
1921 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1922 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1923 | ACB_F_MESSAGE_WQBUFFER_READED);
1924 acb->rqbuf_firstindex = 0;
1925 acb->rqbuf_lastindex = 0;
1926 acb->wqbuf_firstindex = 0;
1927 acb->wqbuf_lastindex = 0;
1928 pQbuffer = acb->rqbuffer;
1929 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1930 pQbuffer = acb->wqbuffer;
1931 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001932 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001933 pcmdmessagefld->cmdmessage.ReturnCode =
1934 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001935 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001936 pcmdmessagefld->cmdmessage.ReturnCode =
1937 ARCMSR_MESSAGE_RETURNCODE_OK;
1938 }
Erich Chen1c57e862006-07-12 08:59:32 -07001939 }
1940 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001941
Erich Chen1c57e862006-07-12 08:59:32 -07001942 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001943 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001944 pcmdmessagefld->cmdmessage.ReturnCode =
1945 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001946 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001947 pcmdmessagefld->cmdmessage.ReturnCode =
1948 ARCMSR_MESSAGE_RETURNCODE_3F;
Erich Chen1c57e862006-07-12 08:59:32 -07001949 }
1950 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08001951 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001952 case ARCMSR_MESSAGE_SAY_HELLO: {
1953 int8_t *hello_string = "Hello! I am ARCMSR";
Nick Chengcdd3cb12010-07-13 20:03:04 +08001954 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001955 pcmdmessagefld->cmdmessage.ReturnCode =
1956 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001957 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001958 pcmdmessagefld->cmdmessage.ReturnCode =
1959 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001960 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001961 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1962 , (int16_t)strlen(hello_string));
Erich Chen1c57e862006-07-12 08:59:32 -07001963 }
1964 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001965
Erich Chen1c57e862006-07-12 08:59:32 -07001966 case ARCMSR_MESSAGE_SAY_GOODBYE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001967 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001968 pcmdmessagefld->cmdmessage.ReturnCode =
1969 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001970 }
Erich Chen1c57e862006-07-12 08:59:32 -07001971 arcmsr_iop_parking(acb);
1972 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001973
Erich Chen1c57e862006-07-12 08:59:32 -07001974 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001975 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001976 pcmdmessagefld->cmdmessage.ReturnCode =
1977 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001978 }
Erich Chen1c57e862006-07-12 08:59:32 -07001979 arcmsr_flush_adapter_cache(acb);
1980 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001981
Erich Chen1c57e862006-07-12 08:59:32 -07001982 default:
1983 retvalue = ARCMSR_MESSAGE_FAIL;
1984 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001985 message_out:
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001986 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08001987 kunmap_atomic(buffer - sg->offset);
Erich Chen1c57e862006-07-12 08:59:32 -07001988 return retvalue;
1989}
1990
1991static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1992{
1993 struct list_head *head = &acb->ccb_free_list;
1994 struct CommandControlBlock *ccb = NULL;
Nick Chengae52e7f2010-06-18 15:39:12 +08001995 unsigned long flags;
1996 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07001997 if (!list_empty(head)) {
1998 ccb = list_entry(head->next, struct CommandControlBlock, list);
Nick Chengae52e7f2010-06-18 15:39:12 +08001999 list_del_init(&ccb->list);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002000 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002001 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2002 return 0;
Erich Chen1c57e862006-07-12 08:59:32 -07002003 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002004 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002005 return ccb;
2006}
2007
2008static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2009 struct scsi_cmnd *cmd)
2010{
2011 switch (cmd->cmnd[0]) {
2012 case INQUIRY: {
2013 unsigned char inqdata[36];
2014 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002015 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07002016
2017 if (cmd->device->lun) {
2018 cmd->result = (DID_TIME_OUT << 16);
2019 cmd->scsi_done(cmd);
2020 return;
2021 }
2022 inqdata[0] = TYPE_PROCESSOR;
2023 /* Periph Qualifier & Periph Dev Type */
2024 inqdata[1] = 0;
2025 /* rem media bit & Dev Type Modifier */
2026 inqdata[2] = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002027 /* ISO, ECMA, & ANSI versions */
Erich Chen1c57e862006-07-12 08:59:32 -07002028 inqdata[4] = 31;
2029 /* length of additional data */
2030 strncpy(&inqdata[8], "Areca ", 8);
2031 /* Vendor Identification */
2032 strncpy(&inqdata[16], "RAID controller ", 16);
2033 /* Product Identification */
2034 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
Erich Chen1c57e862006-07-12 08:59:32 -07002035
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002036 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002037 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002038
Erich Chen1c57e862006-07-12 08:59:32 -07002039 memcpy(buffer, inqdata, sizeof(inqdata));
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002040 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002041 kunmap_atomic(buffer - sg->offset);
Erich Chen1c57e862006-07-12 08:59:32 -07002042
Erich Chen1c57e862006-07-12 08:59:32 -07002043 cmd->scsi_done(cmd);
2044 }
2045 break;
2046 case WRITE_BUFFER:
2047 case READ_BUFFER: {
2048 if (arcmsr_iop_message_xfer(acb, cmd))
2049 cmd->result = (DID_ERROR << 16);
2050 cmd->scsi_done(cmd);
2051 }
2052 break;
2053 default:
2054 cmd->scsi_done(cmd);
2055 }
2056}
2057
Jeff Garzikf2812332010-11-16 02:10:29 -05002058static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
Erich Chen1c57e862006-07-12 08:59:32 -07002059 void (* done)(struct scsi_cmnd *))
2060{
2061 struct Scsi_Host *host = cmd->device->host;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002062 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07002063 struct CommandControlBlock *ccb;
2064 int target = cmd->device->id;
2065 int lun = cmd->device->lun;
Nick Cheng36b83de2010-05-17 11:22:42 +08002066 uint8_t scsicmd = cmd->cmnd[0];
Erich Chen1c57e862006-07-12 08:59:32 -07002067 cmd->scsi_done = done;
2068 cmd->host_scribble = NULL;
2069 cmd->result = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002070 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2071 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2072 cmd->result = (DID_NO_CONNECT << 16);
Nick Cheng36b83de2010-05-17 11:22:42 +08002073 }
2074 cmd->scsi_done(cmd);
2075 return 0;
2076 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002077 if (target == 16) {
Erich Chen1c57e862006-07-12 08:59:32 -07002078 /* virtual device for iop message transfer */
2079 arcmsr_handle_virtual_command(acb, cmd);
2080 return 0;
2081 }
Erich Chen1c57e862006-07-12 08:59:32 -07002082 if (atomic_read(&acb->ccboutstandingcount) >=
2083 ARCMSR_MAX_OUTSTANDING_CMD)
2084 return SCSI_MLQUEUE_HOST_BUSY;
Erich Chen1c57e862006-07-12 08:59:32 -07002085 ccb = arcmsr_get_freeccb(acb);
2086 if (!ccb)
2087 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002088 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
Nick Cheng76d78302008-02-04 23:53:24 -08002089 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2090 cmd->scsi_done(cmd);
2091 return 0;
2092 }
Erich Chen1c57e862006-07-12 08:59:32 -07002093 arcmsr_post_ccb(acb, ccb);
2094 return 0;
2095}
2096
Jeff Garzikf2812332010-11-16 02:10:29 -05002097static DEF_SCSI_QCMD(arcmsr_queue_command)
2098
Nick Chengae52e7f2010-06-18 15:39:12 +08002099static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002100{
Al Viro80da1ad2007-10-29 05:08:28 +00002101 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002102 char *acb_firm_model = acb->firm_model;
2103 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002104 char *acb_device_map = acb->device_map;
Al Viro80da1ad2007-10-29 05:08:28 +00002105 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2106 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002107 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
Erich Chen1c57e862006-07-12 08:59:32 -07002108 int count;
Erich Chen1c57e862006-07-12 08:59:32 -07002109 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002110 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002111 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2112 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002113 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002114 }
Erich Chen1c57e862006-07-12 08:59:32 -07002115 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002116 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002117 *acb_firm_model = readb(iop_firm_model);
2118 acb_firm_model++;
2119 iop_firm_model++;
2120 count--;
2121 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002122
Erich Chen1c57e862006-07-12 08:59:32 -07002123 count = 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002124 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002125 *acb_firm_version = readb(iop_firm_version);
2126 acb_firm_version++;
2127 iop_firm_version++;
2128 count--;
2129 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002130
Nick Chengcdd3cb12010-07-13 20:03:04 +08002131 count=16;
2132 while(count){
2133 *acb_device_map = readb(iop_device_map);
2134 acb_device_map++;
2135 iop_device_map++;
2136 count--;
2137 }
2138 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengae52e7f2010-06-18 15:39:12 +08002139 acb->host->host_no,
2140 acb->firm_version,
2141 acb->firm_model);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002142 acb->signature = readl(&reg->message_rwbuffer[0]);
Erich Chen1c57e862006-07-12 08:59:32 -07002143 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2144 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2145 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2146 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002147 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2148 return true;
Erich Chen1c57e862006-07-12 08:59:32 -07002149}
Nick Chengae52e7f2010-06-18 15:39:12 +08002150static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002151{
Al Viro80da1ad2007-10-29 05:08:28 +00002152 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002153 struct pci_dev *pdev = acb->pdev;
2154 void *dma_coherent;
2155 dma_addr_t dma_coherent_handle;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002156 char *acb_firm_model = acb->firm_model;
2157 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002158 char *acb_device_map = acb->device_map;
Nick Chengae52e7f2010-06-18 15:39:12 +08002159 char __iomem *iop_firm_model;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002160 /*firm_model,15,60-67*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002161 char __iomem *iop_firm_version;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002162 /*firm_version,17,68-83*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002163 char __iomem *iop_device_map;
Nick Cheng36b83de2010-05-17 11:22:42 +08002164 /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002165 int count;
Nick Chengae52e7f2010-06-18 15:39:12 +08002166 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002167 if (!dma_coherent){
Nick Chengae52e7f2010-06-18 15:39:12 +08002168 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2169 return false;
2170 }
2171 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2172 reg = (struct MessageUnit_B *)dma_coherent;
2173 acb->pmuB = reg;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002174 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
Nick Chengae52e7f2010-06-18 15:39:12 +08002175 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2176 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2177 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2178 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2179 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2180 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2181 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2182 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2183 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002184
Nick Chengae52e7f2010-06-18 15:39:12 +08002185 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002186 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002187 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2188 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002189 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002190 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002191 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002192 while (count){
2193 *acb_firm_model = readb(iop_firm_model);
2194 acb_firm_model++;
2195 iop_firm_model++;
2196 count--;
2197 }
2198 count = 16;
2199 while (count){
2200 *acb_firm_version = readb(iop_firm_version);
2201 acb_firm_version++;
2202 iop_firm_version++;
2203 count--;
2204 }
2205
2206 count = 16;
2207 while(count){
2208 *acb_device_map = readb(iop_device_map);
2209 acb_device_map++;
2210 iop_device_map++;
2211 count--;
2212 }
2213
2214 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2215 acb->host->host_no,
2216 acb->firm_version,
2217 acb->firm_model);
2218
2219 acb->signature = readl(&reg->message_rwbuffer[1]);
2220 /*firm_signature,1,00-03*/
2221 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2222 /*firm_request_len,1,04-07*/
2223 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2224 /*firm_numbers_queue,2,08-11*/
2225 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2226 /*firm_sdram_size,3,12-15*/
2227 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2228 /*firm_ide_channels,4,16-19*/
2229 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2230 /*firm_ide_channels,4,16-19*/
2231 return true;
2232}
2233
2234static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2235{
2236 uint32_t intmask_org, Index, firmware_state = 0;
2237 struct MessageUnit_C *reg = pACB->pmuC;
2238 char *acb_firm_model = pACB->firm_model;
2239 char *acb_firm_version = pACB->firm_version;
2240 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2241 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2242 int count;
2243 /* disable all outbound interrupt */
2244 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2245 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2246 /* wait firmware ready */
2247 do {
2248 firmware_state = readl(&reg->outbound_msgaddr1);
2249 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2250 /* post "get config" instruction */
2251 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2252 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2253 /* wait message ready */
2254 for (Index = 0; Index < 2000; Index++) {
2255 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2256 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2257 break;
2258 }
2259 udelay(10);
2260 } /*max 1 seconds*/
2261 if (Index >= 2000) {
2262 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2263 miscellaneous data' timeout \n", pACB->host->host_no);
2264 return false;
2265 }
2266 count = 8;
Nick Chengae52e7f2010-06-18 15:39:12 +08002267 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002268 *acb_firm_model = readb(iop_firm_model);
2269 acb_firm_model++;
2270 iop_firm_model++;
2271 count--;
2272 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002273 count = 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002274 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002275 *acb_firm_version = readb(iop_firm_version);
2276 acb_firm_version++;
2277 iop_firm_version++;
2278 count--;
2279 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002280 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002281 pACB->host->host_no,
2282 pACB->firm_version,
2283 pACB->firm_model);
2284 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2285 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2286 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2287 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2288 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2289 /*all interrupt service will be enable at arcmsr_iop_init*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002290 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002291}
Nick Chengae52e7f2010-06-18 15:39:12 +08002292static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002293{
Nick Chengae52e7f2010-06-18 15:39:12 +08002294 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2295 return arcmsr_get_hba_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002296 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
Nick Chengae52e7f2010-06-18 15:39:12 +08002297 return arcmsr_get_hbb_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002298 else
2299 return arcmsr_get_hbc_config(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002300}
2301
Nick Chengae52e7f2010-06-18 15:39:12 +08002302static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07002303 struct CommandControlBlock *poll_ccb)
2304{
Al Viro80da1ad2007-10-29 05:08:28 +00002305 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002306 struct CommandControlBlock *ccb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002307 struct ARCMSR_CDB *arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07002308 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002309 int rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002310 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002311 polling_hba_ccb_retry:
Erich Chen1c57e862006-07-12 08:59:32 -07002312 poll_count++;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002313 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
Erich Chen1c57e862006-07-12 08:59:32 -07002314 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2315 while (1) {
2316 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002317 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002318 rtn = SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07002319 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002320 }else {
2321 msleep(25);
2322 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002323 rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07002324 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002325 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002326 goto polling_hba_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002327 }
2328 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002329 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2330 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002331 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2332 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2333 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2334 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
Erich Chen1c57e862006-07-12 08:59:32 -07002335 " poll command abort successfully \n"
2336 , acb->host->host_no
2337 , ccb->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002338 , (u32)ccb->pcmd->device->lun
Erich Chen1c57e862006-07-12 08:59:32 -07002339 , ccb);
2340 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002341 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002342 continue;
2343 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002344 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2345 " command done ccb = '0x%p'"
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002346 "ccboutstandingcount = %d \n"
Erich Chen1c57e862006-07-12 08:59:32 -07002347 , acb->host->host_no
2348 , ccb
2349 , atomic_read(&acb->ccboutstandingcount));
2350 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002351 }
2352 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2353 arcmsr_report_ccb_state(acb, ccb, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002354 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002355 return rtn;
2356}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002357
Nick Chengae52e7f2010-06-18 15:39:12 +08002358static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002359 struct CommandControlBlock *poll_ccb)
2360{
Nick Chengcdd3cb12010-07-13 20:03:04 +08002361 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002362 struct ARCMSR_CDB *arcmsr_cdb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002363 struct CommandControlBlock *ccb;
2364 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002365 int index, rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002366 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002367 polling_hbb_ccb_retry:
NickCheng97b99122011-01-06 17:32:41 +08002368
Nick Chengcdd3cb12010-07-13 20:03:04 +08002369 poll_count++;
2370 /* clear doorbell interrupt */
Nick Chengae52e7f2010-06-18 15:39:12 +08002371 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002372 while(1){
2373 index = reg->doneq_index;
2374 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2375 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002376 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002377 break;
2378 }else {
2379 msleep(25);
2380 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002381 rtn = FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002382 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002383 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002384 goto polling_hbb_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002385 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002386 }
2387 writel(0, &reg->done_qbuffer[index]);
2388 index++;
2389 /*if last index number set it to 0 */
2390 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2391 reg->doneq_index = index;
2392 /* check if command done with no error*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002393 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2394 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002395 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2396 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2397 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002398 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2399 " poll command abort successfully \n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08002400 ,acb->host->host_no
2401 ,ccb->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002402 ,(u32)ccb->pcmd->device->lun
Nick Chengcdd3cb12010-07-13 20:03:04 +08002403 ,ccb);
2404 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002405 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002406 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002407 }
2408 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2409 " command done ccb = '0x%p'"
2410 "ccboutstandingcount = %d \n"
2411 , acb->host->host_no
2412 , ccb
2413 , atomic_read(&acb->ccboutstandingcount));
2414 continue;
2415 }
2416 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2417 arcmsr_report_ccb_state(acb, ccb, error);
2418 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002419 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002420}
2421
Nick Chengcdd3cb12010-07-13 20:03:04 +08002422static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2423{
2424 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2425 uint32_t flag_ccb, ccb_cdb_phy;
2426 struct ARCMSR_CDB *arcmsr_cdb;
2427 bool error;
2428 struct CommandControlBlock *pCCB;
2429 uint32_t poll_ccb_done = 0, poll_count = 0;
2430 int rtn;
2431polling_hbc_ccb_retry:
2432 poll_count++;
2433 while (1) {
2434 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2435 if (poll_ccb_done) {
2436 rtn = SUCCESS;
2437 break;
2438 } else {
2439 msleep(25);
2440 if (poll_count > 100) {
2441 rtn = FAILED;
2442 break;
2443 }
2444 goto polling_hbc_ccb_retry;
2445 }
2446 }
2447 flag_ccb = readl(&reg->outbound_queueport_low);
2448 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2449 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
2450 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2451 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
2452 /* check ifcommand done with no error*/
2453 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2454 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2455 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2456 " poll command abort successfully \n"
2457 , acb->host->host_no
2458 , pCCB->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002459 , (u32)pCCB->pcmd->device->lun
Nick Chengcdd3cb12010-07-13 20:03:04 +08002460 , pCCB);
2461 pCCB->pcmd->result = DID_ABORT << 16;
2462 arcmsr_ccb_complete(pCCB);
2463 continue;
2464 }
2465 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2466 " command done ccb = '0x%p'"
2467 "ccboutstandingcount = %d \n"
2468 , acb->host->host_no
2469 , pCCB
2470 , atomic_read(&acb->ccboutstandingcount));
2471 continue;
2472 }
2473 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2474 arcmsr_report_ccb_state(acb, pCCB, error);
2475 }
2476 return rtn;
2477}
Nick Chengae52e7f2010-06-18 15:39:12 +08002478static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002479 struct CommandControlBlock *poll_ccb)
2480{
Nick Chengae52e7f2010-06-18 15:39:12 +08002481 int rtn = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002482 switch (acb->adapter_type) {
2483
2484 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002485 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002486 }
2487 break;
2488
2489 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002490 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002491 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002492 break;
2493 case ACB_ADAPTER_TYPE_C: {
2494 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2495 }
Erich Chen1c57e862006-07-12 08:59:32 -07002496 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002497 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07002498}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002499
2500static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002501{
Nick Chengae52e7f2010-06-18 15:39:12 +08002502 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
Dan Carpentere2c70422014-02-11 19:06:33 +03002503
Nick Cheng1a4f5502007-09-13 17:26:40 +08002504 /*
2505 ********************************************************************
2506 ** here we need to tell iop 331 our freeccb.HighPart
2507 ** if freeccb.HighPart is not zero
2508 ********************************************************************
2509 */
Dan Carpentere2c70422014-02-11 19:06:33 +03002510 cdb_phyaddr = lower_32_bits(acb->dma_coherent_handle);
2511 cdb_phyaddr_hi32 = upper_32_bits(acb->dma_coherent_handle);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002512 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002513 /*
2514 ***********************************************************************
2515 ** if adapter type B, set window of "post command Q"
2516 ***********************************************************************
2517 */
2518 switch (acb->adapter_type) {
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002519
Nick Cheng1a4f5502007-09-13 17:26:40 +08002520 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002521 if (cdb_phyaddr_hi32 != 0) {
Al Viro80da1ad2007-10-29 05:08:28 +00002522 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002523 uint32_t intmask_org;
2524 intmask_org = arcmsr_disable_outbound_ints(acb);
2525 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2526 &reg->message_rwbuffer[0]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002527 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002528 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2529 &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002530 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002531 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2532 part physical address timeout\n",
2533 acb->host->host_no);
2534 return 1;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002535 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002536 arcmsr_enable_outbound_ints(acb, intmask_org);
2537 }
2538 }
2539 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002540
Nick Cheng1a4f5502007-09-13 17:26:40 +08002541 case ACB_ADAPTER_TYPE_B: {
2542 unsigned long post_queue_phyaddr;
Al Viro80da1ad2007-10-29 05:08:28 +00002543 uint32_t __iomem *rwbuffer;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002544
Al Viro80da1ad2007-10-29 05:08:28 +00002545 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002546 uint32_t intmask_org;
2547 intmask_org = arcmsr_disable_outbound_ints(acb);
2548 reg->postq_index = 0;
2549 reg->doneq_index = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002550 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002551 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002552 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2553 acb->host->host_no);
2554 return 1;
2555 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002556 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2557 rwbuffer = reg->message_rwbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002558 /* driver "set config" signature */
2559 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2560 /* normal should be zero */
Nick Chengae52e7f2010-06-18 15:39:12 +08002561 writel(cdb_phyaddr_hi32, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002562 /* postQ size (256 + 8)*4 */
2563 writel(post_queue_phyaddr, rwbuffer++);
2564 /* doneQ size (256 + 8)*4 */
2565 writel(post_queue_phyaddr + 1056, rwbuffer++);
2566 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2567 writel(1056, rwbuffer);
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002568
Nick Chengae52e7f2010-06-18 15:39:12 +08002569 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002570 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002571 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2572 timeout \n",acb->host->host_no);
2573 return 1;
2574 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002575 arcmsr_hbb_enable_driver_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002576 arcmsr_enable_outbound_ints(acb, intmask_org);
2577 }
2578 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002579 case ACB_ADAPTER_TYPE_C: {
2580 if (cdb_phyaddr_hi32 != 0) {
2581 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2582
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002583 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
2584 acb->adapter_index, cdb_phyaddr_hi32);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002585 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
2586 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
2587 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
2588 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2589 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2590 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2591 timeout \n", acb->host->host_no);
2592 return 1;
2593 }
2594 }
2595 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002596 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002597 return 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002598}
2599
Nick Cheng1a4f5502007-09-13 17:26:40 +08002600static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2601{
2602 uint32_t firmware_state = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002603 switch (acb->adapter_type) {
2604
2605 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002606 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002607 do {
2608 firmware_state = readl(&reg->outbound_msgaddr1);
2609 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2610 }
2611 break;
2612
2613 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002614 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002615 do {
Nick Chengae52e7f2010-06-18 15:39:12 +08002616 firmware_state = readl(reg->iop2drv_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002617 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
Nick Chengae52e7f2010-06-18 15:39:12 +08002618 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002619 }
2620 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002621 case ACB_ADAPTER_TYPE_C: {
2622 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2623 do {
2624 firmware_state = readl(&reg->outbound_msgaddr1);
2625 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2626 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002627 }
2628}
2629
Nick Cheng36b83de2010-05-17 11:22:42 +08002630static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2631{
2632 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002633 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002634 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002635 return;
2636 } else {
2637 acb->fw_flag = FW_NORMAL;
2638 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2639 atomic_set(&acb->rq_map_token, 16);
2640 }
2641 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002642 if (atomic_dec_and_test(&acb->rq_map_token)) {
2643 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002644 return;
NickCheng97b99122011-01-06 17:32:41 +08002645 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002646 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2647 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2648 }
2649 return;
2650}
2651
2652static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2653{
2654 struct MessageUnit_B __iomem *reg = acb->pmuB;
2655 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002656 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002657 return;
2658 } else {
2659 acb->fw_flag = FW_NORMAL;
2660 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
NickCheng97b99122011-01-06 17:32:41 +08002661 atomic_set(&acb->rq_map_token, 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002662 }
2663 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002664 if (atomic_dec_and_test(&acb->rq_map_token)) {
2665 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002666 return;
NickCheng97b99122011-01-06 17:32:41 +08002667 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002668 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2669 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2670 }
2671 return;
2672}
2673
2674static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2675{
2676 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengae52e7f2010-06-18 15:39:12 +08002677 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
NickCheng97b99122011-01-06 17:32:41 +08002678 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002679 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08002680 } else {
Nick Chengae52e7f2010-06-18 15:39:12 +08002681 acb->fw_flag = FW_NORMAL;
2682 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002683 atomic_set(&acb->rq_map_token, 16);
2684 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002685 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002686 if (atomic_dec_and_test(&acb->rq_map_token)) {
2687 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002688 return;
NickCheng97b99122011-01-06 17:32:41 +08002689 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002690 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002691 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2692 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Cheng36b83de2010-05-17 11:22:42 +08002693 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002694 return;
2695}
2696
2697static void arcmsr_request_device_map(unsigned long pacb)
2698{
2699 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
Nick Cheng36b83de2010-05-17 11:22:42 +08002700 switch (acb->adapter_type) {
2701 case ACB_ADAPTER_TYPE_A: {
2702 arcmsr_request_hba_device_map(acb);
2703 }
2704 break;
2705 case ACB_ADAPTER_TYPE_B: {
2706 arcmsr_request_hbb_device_map(acb);
2707 }
2708 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002709 case ACB_ADAPTER_TYPE_C: {
2710 arcmsr_request_hbc_device_map(acb);
2711 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002712 }
2713}
2714
Nick Cheng1a4f5502007-09-13 17:26:40 +08002715static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2716{
Al Viro80da1ad2007-10-29 05:08:28 +00002717 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002718 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2719 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002720 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002721 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2722 rebulid' timeout \n", acb->host->host_no);
2723 }
2724}
2725
2726static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2727{
Al Viro80da1ad2007-10-29 05:08:28 +00002728 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002729 acb->acb_flags |= ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002730 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002731 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002732 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2733 rebulid' timeout \n",acb->host->host_no);
2734 }
2735}
2736
Nick Chengcdd3cb12010-07-13 20:03:04 +08002737static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2738{
2739 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2740 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2741 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2742 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2743 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2744 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2745 rebulid' timeout \n", pACB->host->host_no);
2746 }
2747 return;
2748}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002749static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2750{
2751 switch (acb->adapter_type) {
2752 case ACB_ADAPTER_TYPE_A:
2753 arcmsr_start_hba_bgrb(acb);
2754 break;
2755 case ACB_ADAPTER_TYPE_B:
2756 arcmsr_start_hbb_bgrb(acb);
2757 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002758 case ACB_ADAPTER_TYPE_C:
2759 arcmsr_start_hbc_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002760 }
2761}
2762
2763static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2764{
2765 switch (acb->adapter_type) {
2766 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002767 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002768 uint32_t outbound_doorbell;
2769 /* empty doorbell Qbuffer if door bell ringed */
2770 outbound_doorbell = readl(&reg->outbound_doorbell);
2771 /*clear doorbell interrupt */
2772 writel(outbound_doorbell, &reg->outbound_doorbell);
2773 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2774 }
2775 break;
2776
2777 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002778 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002779 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002780 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2781 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002782 /* let IOP know data has been read */
2783 }
2784 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002785 case ACB_ADAPTER_TYPE_C: {
2786 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2787 uint32_t outbound_doorbell;
2788 /* empty doorbell Qbuffer if door bell ringed */
2789 outbound_doorbell = readl(&reg->outbound_doorbell);
2790 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2791 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2792 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002793 }
2794}
Erich Chen1c57e862006-07-12 08:59:32 -07002795
Nick Cheng76d78302008-02-04 23:53:24 -08002796static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2797{
2798 switch (acb->adapter_type) {
2799 case ACB_ADAPTER_TYPE_A:
2800 return;
2801 case ACB_ADAPTER_TYPE_B:
2802 {
2803 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002804 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002805 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng76d78302008-02-04 23:53:24 -08002806 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2807 return;
2808 }
2809 }
2810 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002811 case ACB_ADAPTER_TYPE_C:
2812 return;
Nick Cheng76d78302008-02-04 23:53:24 -08002813 }
2814 return;
2815}
2816
Nick Cheng36b83de2010-05-17 11:22:42 +08002817static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2818{
2819 uint8_t value[64];
Nick Chengcdd3cb12010-07-13 20:03:04 +08002820 int i, count = 0;
2821 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2822 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
Dan Carpenter6ad819b2012-06-09 12:10:19 +03002823
Nick Cheng36b83de2010-05-17 11:22:42 +08002824 /* backup pci config data */
Nick Chengcdd3cb12010-07-13 20:03:04 +08002825 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
Nick Cheng36b83de2010-05-17 11:22:42 +08002826 for (i = 0; i < 64; i++) {
2827 pci_read_config_byte(acb->pdev, i, &value[i]);
2828 }
2829 /* hardware reset signal */
Nick Chengae52e7f2010-06-18 15:39:12 +08002830 if ((acb->dev_id == 0x1680)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002831 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2832 } else if ((acb->dev_id == 0x1880)) {
2833 do {
2834 count++;
2835 writel(0xF, &pmuC->write_sequence);
2836 writel(0x4, &pmuC->write_sequence);
2837 writel(0xB, &pmuC->write_sequence);
2838 writel(0x2, &pmuC->write_sequence);
2839 writel(0x7, &pmuC->write_sequence);
2840 writel(0xD, &pmuC->write_sequence);
Dan Carpenter6ad819b2012-06-09 12:10:19 +03002841 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002842 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
Nick Chengae52e7f2010-06-18 15:39:12 +08002843 } else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002844 pci_write_config_byte(acb->pdev, 0x84, 0x20);
Nick Chengae52e7f2010-06-18 15:39:12 +08002845 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002846 msleep(2000);
Nick Cheng36b83de2010-05-17 11:22:42 +08002847 /* write back pci config data */
2848 for (i = 0; i < 64; i++) {
2849 pci_write_config_byte(acb->pdev, i, value[i]);
2850 }
2851 msleep(1000);
2852 return;
2853}
Erich Chen1c57e862006-07-12 08:59:32 -07002854static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2855{
Nick Cheng1a4f5502007-09-13 17:26:40 +08002856 uint32_t intmask_org;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002857 /* disable all outbound interrupt */
2858 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002859 arcmsr_wait_firmware_ready(acb);
2860 arcmsr_iop_confirm(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002861 /*start background rebuild*/
2862 arcmsr_start_adapter_bgrb(acb);
2863 /* empty doorbell Qbuffer if door bell ringed */
2864 arcmsr_clear_doorbell_queue_buffer(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002865 arcmsr_enable_eoi_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002866 /* enable outbound Post Queue,outbound doorbell Interrupt */
2867 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07002868 acb->acb_flags |= ACB_F_IOP_INITED;
2869}
2870
Nick Cheng36b83de2010-05-17 11:22:42 +08002871static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002872{
Erich Chen1c57e862006-07-12 08:59:32 -07002873 struct CommandControlBlock *ccb;
2874 uint32_t intmask_org;
Nick Cheng36b83de2010-05-17 11:22:42 +08002875 uint8_t rtnval = 0x00;
Erich Chen1c57e862006-07-12 08:59:32 -07002876 int i = 0;
NickCheng97b99122011-01-06 17:32:41 +08002877 unsigned long flags;
2878
Erich Chen1c57e862006-07-12 08:59:32 -07002879 if (atomic_read(&acb->ccboutstandingcount) != 0) {
Erich Chen1c57e862006-07-12 08:59:32 -07002880 /* disable all outbound interrupt */
2881 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08002882 /* talk to iop 331 outstanding command aborted */
2883 rtnval = arcmsr_abort_allcmd(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002884 /* clear all outbound posted Q */
Nick Cheng1a4f5502007-09-13 17:26:40 +08002885 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002886 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2887 ccb = acb->pccb_pool[i];
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002888 if (ccb->startdone == ARCMSR_CCB_START) {
NickCheng97b99122011-01-06 17:32:41 +08002889 scsi_dma_unmap(ccb->pcmd);
2890 ccb->startdone = ARCMSR_CCB_DONE;
2891 ccb->ccb_flags = 0;
2892 spin_lock_irqsave(&acb->ccblist_lock, flags);
2893 list_add_tail(&ccb->list, &acb->ccb_free_list);
2894 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002895 }
2896 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002897 atomic_set(&acb->ccboutstandingcount, 0);
Erich Chen1c57e862006-07-12 08:59:32 -07002898 /* enable all outbound interrupt */
2899 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Cheng36b83de2010-05-17 11:22:42 +08002900 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002901 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002902 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002903}
2904
2905static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2906{
NickCheng97b99122011-01-06 17:32:41 +08002907 struct AdapterControlBlock *acb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002908 uint32_t intmask_org, outbound_doorbell;
2909 int retry_count = 0;
2910 int rtn = FAILED;
Nick Chengae52e7f2010-06-18 15:39:12 +08002911 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002912 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
Nick Cheng36b83de2010-05-17 11:22:42 +08002913 acb->num_resets++;
Nick Cheng36b83de2010-05-17 11:22:42 +08002914
Nick Chengcdd3cb12010-07-13 20:03:04 +08002915 switch(acb->adapter_type){
2916 case ACB_ADAPTER_TYPE_A:{
2917 if (acb->acb_flags & ACB_F_BUS_RESET){
Nick Chengae52e7f2010-06-18 15:39:12 +08002918 long timeout;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002919 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2920 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
Nick Chengae52e7f2010-06-18 15:39:12 +08002921 if (timeout) {
2922 return SUCCESS;
2923 }
2924 }
2925 acb->acb_flags |= ACB_F_BUS_RESET;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002926 if (!arcmsr_iop_reset(acb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002927 struct MessageUnit_A __iomem *reg;
2928 reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002929 arcmsr_hardware_reset(acb);
2930 acb->acb_flags &= ~ACB_F_IOP_INITED;
Nick Cheng36b83de2010-05-17 11:22:42 +08002931sleep_again:
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002932 ssleep(ARCMSR_SLEEPTIME);
Nick Chengae52e7f2010-06-18 15:39:12 +08002933 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002934 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
2935 if (retry_count > ARCMSR_RETRYCOUNT) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002936 acb->fw_flag = FW_DEADLOCK;
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002937 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002938 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002939 }
2940 retry_count++;
2941 goto sleep_again;
2942 }
2943 acb->acb_flags |= ACB_F_IOP_INITED;
2944 /* disable all outbound interrupt */
2945 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +08002946 arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002947 arcmsr_start_adapter_bgrb(acb);
2948 /* clear Qbuffer if door bell ringed */
2949 outbound_doorbell = readl(&reg->outbound_doorbell);
2950 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
2951 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2952 /* enable outbound Post Queue,outbound doorbell Interrupt */
2953 arcmsr_enable_outbound_ints(acb, intmask_org);
2954 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +08002955 atomic_set(&acb->ante_token_value, 16);
2956 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08002957 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002958 acb->acb_flags &= ~ACB_F_BUS_RESET;
2959 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002960 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
Nick Chengae52e7f2010-06-18 15:39:12 +08002961 } else {
2962 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08002963 atomic_set(&acb->rq_map_token, 16);
2964 atomic_set(&acb->ante_token_value, 16);
2965 acb->fw_flag = FW_NORMAL;
2966 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002967 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002968 }
2969 break;
2970 }
2971 case ACB_ADAPTER_TYPE_B:{
2972 acb->acb_flags |= ACB_F_BUS_RESET;
2973 if (!arcmsr_iop_reset(acb)) {
2974 acb->acb_flags &= ~ACB_F_BUS_RESET;
2975 rtn = FAILED;
2976 } else {
2977 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08002978 atomic_set(&acb->rq_map_token, 16);
2979 atomic_set(&acb->ante_token_value, 16);
2980 acb->fw_flag = FW_NORMAL;
2981 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002982 rtn = SUCCESS;
2983 }
2984 break;
2985 }
2986 case ACB_ADAPTER_TYPE_C:{
2987 if (acb->acb_flags & ACB_F_BUS_RESET) {
2988 long timeout;
2989 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2990 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2991 if (timeout) {
2992 return SUCCESS;
2993 }
2994 }
2995 acb->acb_flags |= ACB_F_BUS_RESET;
2996 if (!arcmsr_iop_reset(acb)) {
2997 struct MessageUnit_C __iomem *reg;
2998 reg = acb->pmuC;
2999 arcmsr_hardware_reset(acb);
3000 acb->acb_flags &= ~ACB_F_IOP_INITED;
3001sleep:
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003002 ssleep(ARCMSR_SLEEPTIME);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003003 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003004 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3005 if (retry_count > ARCMSR_RETRYCOUNT) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003006 acb->fw_flag = FW_DEADLOCK;
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003007 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003008 return FAILED;
3009 }
3010 retry_count++;
3011 goto sleep;
3012 }
3013 acb->acb_flags |= ACB_F_IOP_INITED;
3014 /* disable all outbound interrupt */
3015 intmask_org = arcmsr_disable_outbound_ints(acb);
3016 arcmsr_get_firmware_spec(acb);
3017 arcmsr_start_adapter_bgrb(acb);
3018 /* clear Qbuffer if door bell ringed */
3019 outbound_doorbell = readl(&reg->outbound_doorbell);
3020 writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
3021 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3022 /* enable outbound Post Queue,outbound doorbell Interrupt */
3023 arcmsr_enable_outbound_ints(acb, intmask_org);
3024 atomic_set(&acb->rq_map_token, 16);
3025 atomic_set(&acb->ante_token_value, 16);
3026 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08003027 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003028 acb->acb_flags &= ~ACB_F_BUS_RESET;
3029 rtn = SUCCESS;
3030 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3031 } else {
3032 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003033 atomic_set(&acb->rq_map_token, 16);
3034 atomic_set(&acb->ante_token_value, 16);
3035 acb->fw_flag = FW_NORMAL;
3036 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003037 rtn = SUCCESS;
3038 }
3039 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08003040 }
3041 }
3042 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003043}
3044
Nick Chengae52e7f2010-06-18 15:39:12 +08003045static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07003046 struct CommandControlBlock *ccb)
3047{
Nick Chengae52e7f2010-06-18 15:39:12 +08003048 int rtn;
Nick Chengae52e7f2010-06-18 15:39:12 +08003049 rtn = arcmsr_polling_ccbdone(acb, ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +08003050 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003051}
3052
3053static int arcmsr_abort(struct scsi_cmnd *cmd)
3054{
3055 struct AdapterControlBlock *acb =
3056 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3057 int i = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08003058 int rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07003059 printk(KERN_NOTICE
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003060 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02003061 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
Nick Chengae52e7f2010-06-18 15:39:12 +08003062 acb->acb_flags |= ACB_F_ABORT;
Erich Chen1c57e862006-07-12 08:59:32 -07003063 acb->num_aborts++;
Erich Chen1c57e862006-07-12 08:59:32 -07003064 /*
3065 ************************************************
3066 ** the all interrupt service routine is locked
3067 ** we need to handle it as soon as possible and exit
3068 ************************************************
3069 */
3070 if (!atomic_read(&acb->ccboutstandingcount))
Nick Chengae52e7f2010-06-18 15:39:12 +08003071 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003072
3073 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3074 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3075 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003076 ccb->startdone = ARCMSR_CCB_ABORTED;
3077 rtn = arcmsr_abort_one_cmd(acb, ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003078 break;
3079 }
3080 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003081 acb->acb_flags &= ~ACB_F_ABORT;
3082 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003083}
3084
3085static const char *arcmsr_info(struct Scsi_Host *host)
3086{
3087 struct AdapterControlBlock *acb =
3088 (struct AdapterControlBlock *) host->hostdata;
3089 static char buf[256];
3090 char *type;
3091 int raid6 = 1;
Erich Chen1c57e862006-07-12 08:59:32 -07003092 switch (acb->pdev->device) {
3093 case PCI_DEVICE_ID_ARECA_1110:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003094 case PCI_DEVICE_ID_ARECA_1200:
3095 case PCI_DEVICE_ID_ARECA_1202:
Erich Chen1c57e862006-07-12 08:59:32 -07003096 case PCI_DEVICE_ID_ARECA_1210:
3097 raid6 = 0;
3098 /*FALLTHRU*/
3099 case PCI_DEVICE_ID_ARECA_1120:
3100 case PCI_DEVICE_ID_ARECA_1130:
3101 case PCI_DEVICE_ID_ARECA_1160:
3102 case PCI_DEVICE_ID_ARECA_1170:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003103 case PCI_DEVICE_ID_ARECA_1201:
Erich Chen1c57e862006-07-12 08:59:32 -07003104 case PCI_DEVICE_ID_ARECA_1220:
3105 case PCI_DEVICE_ID_ARECA_1230:
3106 case PCI_DEVICE_ID_ARECA_1260:
3107 case PCI_DEVICE_ID_ARECA_1270:
3108 case PCI_DEVICE_ID_ARECA_1280:
3109 type = "SATA";
3110 break;
3111 case PCI_DEVICE_ID_ARECA_1380:
3112 case PCI_DEVICE_ID_ARECA_1381:
3113 case PCI_DEVICE_ID_ARECA_1680:
3114 case PCI_DEVICE_ID_ARECA_1681:
Nick Chengcdd3cb12010-07-13 20:03:04 +08003115 case PCI_DEVICE_ID_ARECA_1880:
Erich Chen1c57e862006-07-12 08:59:32 -07003116 type = "SAS";
3117 break;
3118 default:
3119 type = "X-TYPE";
3120 break;
3121 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003122 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
Erich Chen1c57e862006-07-12 08:59:32 -07003123 type, raid6 ? "( RAID6 capable)" : "",
3124 ARCMSR_DRIVER_VERSION);
3125 return buf;
3126}