blob: 04fbd7fffd0d8f2af296b35ac3dcb049c5cd8002 [file] [log] [blame]
Roy Zangc03675f2010-08-10 18:02:20 -07001/*
Akinobu Mita080481f52016-03-07 00:27:48 +09002 * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
Roy Zangc03675f2010-08-10 18:02:20 -07003 *
Lei Xua2d6d2f2011-02-25 14:44:23 -08004 * Copyright (C) 2009-2011 Freescale Semiconductor.
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -07005 * Author: Jack Lan <jack.lan@freescale.com>
Akinobu Mita080481f52016-03-07 00:27:48 +09006 * Copyright (C) 2008 MIMOMax Wireless Ltd.
Roy Zangc03675f2010-08-10 18:02:20 -07007 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
Roy Zangc03675f2010-08-10 18:02:20 -070013
Joe Perchesa737e832015-04-16 12:46:14 -070014#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
Roy Zangc03675f2010-08-10 18:02:20 -070016#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/interrupt.h>
19#include <linux/i2c.h>
Akinobu Mita080481f52016-03-07 00:27:48 +090020#include <linux/spi/spi.h>
Roy Zangc03675f2010-08-10 18:02:20 -070021#include <linux/rtc.h>
22#include <linux/bcd.h>
Roy Zangc03675f2010-08-10 18:02:20 -070023#include <linux/slab.h>
Akinobu Mita370927c2016-03-07 00:27:47 +090024#include <linux/regmap.h>
Roy Zangc03675f2010-08-10 18:02:20 -070025
26#define DS3232_REG_SECONDS 0x00
27#define DS3232_REG_MINUTES 0x01
28#define DS3232_REG_HOURS 0x02
29#define DS3232_REG_AMPM 0x02
30#define DS3232_REG_DAY 0x03
31#define DS3232_REG_DATE 0x04
32#define DS3232_REG_MONTH 0x05
33#define DS3232_REG_CENTURY 0x05
34#define DS3232_REG_YEAR 0x06
35#define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */
36#define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */
37#define DS3232_REG_CR 0x0E /* Control register */
38# define DS3232_REG_CR_nEOSC 0x80
39# define DS3232_REG_CR_INTCN 0x04
40# define DS3232_REG_CR_A2IE 0x02
41# define DS3232_REG_CR_A1IE 0x01
42
43#define DS3232_REG_SR 0x0F /* control/status register */
44# define DS3232_REG_SR_OSF 0x80
45# define DS3232_REG_SR_BSY 0x04
46# define DS3232_REG_SR_A2F 0x02
47# define DS3232_REG_SR_A1F 0x01
48
49struct ds3232 {
Akinobu Mita370927c2016-03-07 00:27:47 +090050 struct device *dev;
51 struct regmap *regmap;
52 int irq;
Roy Zangc03675f2010-08-10 18:02:20 -070053 struct rtc_device *rtc;
Roy Zangc03675f2010-08-10 18:02:20 -070054
Wang Dongshengc93a3ae2014-04-03 14:50:08 -070055 bool suspended;
Roy Zangc03675f2010-08-10 18:02:20 -070056};
57
Akinobu Mita370927c2016-03-07 00:27:47 +090058static int ds3232_check_rtc_status(struct device *dev)
Roy Zangc03675f2010-08-10 18:02:20 -070059{
Akinobu Mita370927c2016-03-07 00:27:47 +090060 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Roy Zangc03675f2010-08-10 18:02:20 -070061 int ret = 0;
62 int control, stat;
63
Akinobu Mita370927c2016-03-07 00:27:47 +090064 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
65 if (ret)
66 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -070067
68 if (stat & DS3232_REG_SR_OSF)
Akinobu Mita370927c2016-03-07 00:27:47 +090069 dev_warn(dev,
Roy Zangc03675f2010-08-10 18:02:20 -070070 "oscillator discontinuity flagged, "
71 "time unreliable\n");
72
73 stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
74
Akinobu Mita370927c2016-03-07 00:27:47 +090075 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
76 if (ret)
Roy Zangc03675f2010-08-10 18:02:20 -070077 return ret;
78
79 /* If the alarm is pending, clear it before requesting
80 * the interrupt, so an interrupt event isn't reported
81 * before everything is initialized.
82 */
83
Akinobu Mita370927c2016-03-07 00:27:47 +090084 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
85 if (ret)
86 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -070087
88 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
89 control |= DS3232_REG_CR_INTCN;
90
Akinobu Mita370927c2016-03-07 00:27:47 +090091 return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
Roy Zangc03675f2010-08-10 18:02:20 -070092}
93
94static int ds3232_read_time(struct device *dev, struct rtc_time *time)
95{
Akinobu Mita370927c2016-03-07 00:27:47 +090096 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Roy Zangc03675f2010-08-10 18:02:20 -070097 int ret;
98 u8 buf[7];
99 unsigned int year, month, day, hour, minute, second;
100 unsigned int week, twelve_hr, am_pm;
101 unsigned int century, add_century = 0;
102
Akinobu Mita370927c2016-03-07 00:27:47 +0900103 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
104 if (ret)
Roy Zangc03675f2010-08-10 18:02:20 -0700105 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -0700106
107 second = buf[0];
108 minute = buf[1];
109 hour = buf[2];
110 week = buf[3];
111 day = buf[4];
112 month = buf[5];
113 year = buf[6];
114
115 /* Extract additional information for AM/PM and century */
116
117 twelve_hr = hour & 0x40;
118 am_pm = hour & 0x20;
119 century = month & 0x80;
120
121 /* Write to rtc_time structure */
122
123 time->tm_sec = bcd2bin(second);
124 time->tm_min = bcd2bin(minute);
125 if (twelve_hr) {
126 /* Convert to 24 hr */
127 if (am_pm)
128 time->tm_hour = bcd2bin(hour & 0x1F) + 12;
129 else
130 time->tm_hour = bcd2bin(hour & 0x1F);
131 } else {
132 time->tm_hour = bcd2bin(hour);
133 }
134
Lei Xua2d6d2f2011-02-25 14:44:23 -0800135 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
136 time->tm_wday = bcd2bin(week) - 1;
Roy Zangc03675f2010-08-10 18:02:20 -0700137 time->tm_mday = bcd2bin(day);
Lei Xua2d6d2f2011-02-25 14:44:23 -0800138 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
139 time->tm_mon = bcd2bin(month & 0x7F) - 1;
Roy Zangc03675f2010-08-10 18:02:20 -0700140 if (century)
141 add_century = 100;
142
143 time->tm_year = bcd2bin(year) + add_century;
144
145 return rtc_valid_tm(time);
146}
147
148static int ds3232_set_time(struct device *dev, struct rtc_time *time)
149{
Akinobu Mita370927c2016-03-07 00:27:47 +0900150 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Roy Zangc03675f2010-08-10 18:02:20 -0700151 u8 buf[7];
152
153 /* Extract time from rtc_time and load into ds3232*/
154
155 buf[0] = bin2bcd(time->tm_sec);
156 buf[1] = bin2bcd(time->tm_min);
157 buf[2] = bin2bcd(time->tm_hour);
Lei Xua2d6d2f2011-02-25 14:44:23 -0800158 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
159 buf[3] = bin2bcd(time->tm_wday + 1);
Roy Zangc03675f2010-08-10 18:02:20 -0700160 buf[4] = bin2bcd(time->tm_mday); /* Date */
Lei Xua2d6d2f2011-02-25 14:44:23 -0800161 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
162 buf[5] = bin2bcd(time->tm_mon + 1);
Roy Zangc03675f2010-08-10 18:02:20 -0700163 if (time->tm_year >= 100) {
164 buf[5] |= 0x80;
165 buf[6] = bin2bcd(time->tm_year - 100);
166 } else {
167 buf[6] = bin2bcd(time->tm_year);
168 }
169
Akinobu Mita370927c2016-03-07 00:27:47 +0900170 return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
Roy Zangc03675f2010-08-10 18:02:20 -0700171}
172
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700173/*
174 * DS3232 has two alarm, we only use alarm1
175 * According to linux specification, only support one-shot alarm
176 * no periodic alarm mode
177 */
178static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
179{
Akinobu Mita370927c2016-03-07 00:27:47 +0900180 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700181 int control, stat;
182 int ret;
183 u8 buf[4];
184
Akinobu Mita370927c2016-03-07 00:27:47 +0900185 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
186 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700187 goto out;
Akinobu Mita370927c2016-03-07 00:27:47 +0900188 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
189 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700190 goto out;
Akinobu Mita370927c2016-03-07 00:27:47 +0900191 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
192 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700193 goto out;
194
195 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
196 alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
197 alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
198 alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
199
200 alarm->time.tm_mon = -1;
201 alarm->time.tm_year = -1;
202 alarm->time.tm_wday = -1;
203 alarm->time.tm_yday = -1;
204 alarm->time.tm_isdst = -1;
205
206 alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
207 alarm->pending = !!(stat & DS3232_REG_SR_A1F);
208
209 ret = 0;
210out:
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700211 return ret;
212}
213
214/*
215 * linux rtc-module does not support wday alarm
216 * and only 24h time mode supported indeed
217 */
218static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
219{
Akinobu Mita370927c2016-03-07 00:27:47 +0900220 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700221 int control, stat;
222 int ret;
223 u8 buf[4];
224
Akinobu Mita370927c2016-03-07 00:27:47 +0900225 if (ds3232->irq <= 0)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700226 return -EINVAL;
227
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700228 buf[0] = bin2bcd(alarm->time.tm_sec);
229 buf[1] = bin2bcd(alarm->time.tm_min);
230 buf[2] = bin2bcd(alarm->time.tm_hour);
231 buf[3] = bin2bcd(alarm->time.tm_mday);
232
233 /* clear alarm interrupt enable bit */
Akinobu Mita370927c2016-03-07 00:27:47 +0900234 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
235 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700236 goto out;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700237 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
Akinobu Mita370927c2016-03-07 00:27:47 +0900238 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
239 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700240 goto out;
241
242 /* clear any pending alarm flag */
Akinobu Mita370927c2016-03-07 00:27:47 +0900243 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
244 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700245 goto out;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700246 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
Akinobu Mita370927c2016-03-07 00:27:47 +0900247 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
248 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700249 goto out;
250
Akinobu Mita370927c2016-03-07 00:27:47 +0900251 ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900252 if (ret)
253 goto out;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700254
255 if (alarm->enabled) {
256 control |= DS3232_REG_CR_A1IE;
Akinobu Mita370927c2016-03-07 00:27:47 +0900257 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700258 }
259out:
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700260 return ret;
261}
262
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900263static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700264{
Akinobu Mita370927c2016-03-07 00:27:47 +0900265 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700266 int control;
267 int ret;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700268
Akinobu Mita370927c2016-03-07 00:27:47 +0900269 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
270 if (ret)
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900271 return ret;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700272
Akinobu Mita75222972016-03-07 00:27:51 +0900273 if (enabled)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700274 /* enable alarm1 interrupt */
275 control |= DS3232_REG_CR_A1IE;
276 else
277 /* disable alarm1 interrupt */
278 control &= ~(DS3232_REG_CR_A1IE);
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900279 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700280
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900281 return ret;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700282}
283
284static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
285{
Akinobu Mita370927c2016-03-07 00:27:47 +0900286 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700287
Akinobu Mita370927c2016-03-07 00:27:47 +0900288 if (ds3232->irq <= 0)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700289 return -EINVAL;
290
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900291 return ds3232_update_alarm(dev, enabled);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700292}
293
Roy Zangc03675f2010-08-10 18:02:20 -0700294static irqreturn_t ds3232_irq(int irq, void *dev_id)
295{
Akinobu Mita370927c2016-03-07 00:27:47 +0900296 struct device *dev = dev_id;
297 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900298 struct mutex *lock = &ds3232->rtc->ops_lock;
Akinobu Mita370927c2016-03-07 00:27:47 +0900299 int ret;
Roy Zangc03675f2010-08-10 18:02:20 -0700300 int stat, control;
301
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900302 mutex_lock(lock);
Roy Zangc03675f2010-08-10 18:02:20 -0700303
Akinobu Mita370927c2016-03-07 00:27:47 +0900304 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
305 if (ret)
Roy Zangc03675f2010-08-10 18:02:20 -0700306 goto unlock;
307
308 if (stat & DS3232_REG_SR_A1F) {
Akinobu Mita370927c2016-03-07 00:27:47 +0900309 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
310 if (ret) {
Akinobu Mita95c60c12016-03-07 00:27:52 +0900311 dev_warn(ds3232->dev,
312 "Read Control Register error %d\n", ret);
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700313 } else {
314 /* disable alarm1 interrupt */
315 control &= ~(DS3232_REG_CR_A1IE);
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900316 ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
317 control);
318 if (ret) {
319 dev_warn(ds3232->dev,
320 "Write Control Register error %d\n",
321 ret);
322 goto unlock;
323 }
Roy Zangc03675f2010-08-10 18:02:20 -0700324
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700325 /* clear the alarm pend flag */
326 stat &= ~DS3232_REG_SR_A1F;
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900327 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
328 if (ret) {
329 dev_warn(ds3232->dev,
330 "Write Status Register error %d\n",
331 ret);
332 goto unlock;
333 }
Roy Zangc03675f2010-08-10 18:02:20 -0700334
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700335 rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700336 }
Roy Zangc03675f2010-08-10 18:02:20 -0700337 }
338
Roy Zangc03675f2010-08-10 18:02:20 -0700339unlock:
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900340 mutex_unlock(lock);
Akinobu Mita95c60c12016-03-07 00:27:52 +0900341
342 return IRQ_HANDLED;
Roy Zangc03675f2010-08-10 18:02:20 -0700343}
344
345static const struct rtc_class_ops ds3232_rtc_ops = {
346 .read_time = ds3232_read_time,
347 .set_time = ds3232_set_time,
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700348 .read_alarm = ds3232_read_alarm,
349 .set_alarm = ds3232_set_alarm,
350 .alarm_irq_enable = ds3232_alarm_irq_enable,
Roy Zangc03675f2010-08-10 18:02:20 -0700351};
352
Akinobu Mita370927c2016-03-07 00:27:47 +0900353static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
354 const char *name)
Roy Zangc03675f2010-08-10 18:02:20 -0700355{
356 struct ds3232 *ds3232;
357 int ret;
358
Akinobu Mita370927c2016-03-07 00:27:47 +0900359 ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
Roy Zangc03675f2010-08-10 18:02:20 -0700360 if (!ds3232)
361 return -ENOMEM;
362
Akinobu Mita370927c2016-03-07 00:27:47 +0900363 ds3232->regmap = regmap;
364 ds3232->irq = irq;
365 ds3232->dev = dev;
366 dev_set_drvdata(dev, ds3232);
Roy Zangc03675f2010-08-10 18:02:20 -0700367
Akinobu Mita370927c2016-03-07 00:27:47 +0900368 ret = ds3232_check_rtc_status(dev);
Roy Zangc03675f2010-08-10 18:02:20 -0700369 if (ret)
Sachin Kamat66714612013-04-29 16:20:31 -0700370 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -0700371
Qianyu Gongb4b77f32016-04-21 14:55:40 +0800372 ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
373 THIS_MODULE);
374 if (IS_ERR(ds3232->rtc))
375 return PTR_ERR(ds3232->rtc);
376
Akinobu Mita370927c2016-03-07 00:27:47 +0900377 if (ds3232->irq > 0) {
Akinobu Mita95c60c12016-03-07 00:27:52 +0900378 ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
379 ds3232_irq,
380 IRQF_SHARED | IRQF_ONESHOT,
381 name, dev);
Roy Zangc03675f2010-08-10 18:02:20 -0700382 if (ret) {
Akinobu Mita370927c2016-03-07 00:27:47 +0900383 ds3232->irq = 0;
384 dev_err(dev, "unable to request IRQ\n");
385 } else
386 device_init_wakeup(dev, 1);
Roy Zangc03675f2010-08-10 18:02:20 -0700387 }
Akinobu Mita370927c2016-03-07 00:27:47 +0900388
Qianyu Gongb4b77f32016-04-21 14:55:40 +0800389 return 0;
Roy Zangc03675f2010-08-10 18:02:20 -0700390}
391
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700392#ifdef CONFIG_PM_SLEEP
393static int ds3232_suspend(struct device *dev)
394{
395 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700396
Akinobu Mita95c60c12016-03-07 00:27:52 +0900397 if (device_may_wakeup(dev)) {
398 if (enable_irq_wake(ds3232->irq))
Wang Dongshengdc2280e2015-08-12 17:14:13 +0800399 dev_warn_once(dev, "Cannot set wakeup source\n");
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700400 }
401
402 return 0;
403}
404
405static int ds3232_resume(struct device *dev)
406{
407 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700408
Akinobu Mita95c60c12016-03-07 00:27:52 +0900409 if (device_may_wakeup(dev))
410 disable_irq_wake(ds3232->irq);
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700411
412 return 0;
413}
414#endif
415
416static const struct dev_pm_ops ds3232_pm_ops = {
417 SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
418};
419
Akinobu Mita080481f52016-03-07 00:27:48 +0900420#if IS_ENABLED(CONFIG_I2C)
421
Akinobu Mita370927c2016-03-07 00:27:47 +0900422static int ds3232_i2c_probe(struct i2c_client *client,
423 const struct i2c_device_id *id)
424{
425 struct regmap *regmap;
426 static const struct regmap_config config = {
427 .reg_bits = 8,
428 .val_bits = 8,
429 };
430
431 regmap = devm_regmap_init_i2c(client, &config);
432 if (IS_ERR(regmap)) {
433 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
434 __func__, PTR_ERR(regmap));
435 return PTR_ERR(regmap);
436 }
437
438 return ds3232_probe(&client->dev, regmap, client->irq, client->name);
439}
440
Roy Zangc03675f2010-08-10 18:02:20 -0700441static const struct i2c_device_id ds3232_id[] = {
442 { "ds3232", 0 },
443 { }
444};
445MODULE_DEVICE_TABLE(i2c, ds3232_id);
446
447static struct i2c_driver ds3232_driver = {
448 .driver = {
449 .name = "rtc-ds3232",
Wang Dongshengc93a3ae2014-04-03 14:50:08 -0700450 .pm = &ds3232_pm_ops,
Roy Zangc03675f2010-08-10 18:02:20 -0700451 },
Akinobu Mita370927c2016-03-07 00:27:47 +0900452 .probe = ds3232_i2c_probe,
Roy Zangc03675f2010-08-10 18:02:20 -0700453 .id_table = ds3232_id,
454};
Akinobu Mita080481f52016-03-07 00:27:48 +0900455
456static int ds3232_register_driver(void)
457{
458 return i2c_add_driver(&ds3232_driver);
459}
460
461static void ds3232_unregister_driver(void)
462{
463 i2c_del_driver(&ds3232_driver);
464}
465
466#else
467
468static int ds3232_register_driver(void)
469{
470 return 0;
471}
472
473static void ds3232_unregister_driver(void)
474{
475}
476
477#endif
478
479#if IS_ENABLED(CONFIG_SPI_MASTER)
480
481static int ds3234_probe(struct spi_device *spi)
482{
483 int res;
484 unsigned int tmp;
485 static const struct regmap_config config = {
486 .reg_bits = 8,
487 .val_bits = 8,
488 .write_flag_mask = 0x80,
489 };
490 struct regmap *regmap;
491
492 regmap = devm_regmap_init_spi(spi, &config);
493 if (IS_ERR(regmap)) {
494 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
495 __func__, PTR_ERR(regmap));
496 return PTR_ERR(regmap);
497 }
498
499 spi->mode = SPI_MODE_3;
500 spi->bits_per_word = 8;
501 spi_setup(spi);
502
503 res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
504 if (res)
505 return res;
506
507 /* Control settings
508 *
509 * CONTROL_REG
510 * BIT 7 6 5 4 3 2 1 0
511 * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
512 *
513 * 0 0 0 1 1 1 0 0
514 *
515 * CONTROL_STAT_REG
516 * BIT 7 6 5 4 3 2 1 0
517 * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
518 *
519 * 1 0 0 0 1 0 0 0
520 */
521 res = regmap_read(regmap, DS3232_REG_CR, &tmp);
522 if (res)
523 return res;
524 res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
525 if (res)
526 return res;
527
528 res = regmap_read(regmap, DS3232_REG_SR, &tmp);
529 if (res)
530 return res;
531 res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
532 if (res)
533 return res;
534
535 /* Print our settings */
536 res = regmap_read(regmap, DS3232_REG_CR, &tmp);
537 if (res)
538 return res;
539 dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
540
541 res = regmap_read(regmap, DS3232_REG_SR, &tmp);
542 if (res)
543 return res;
544 dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
545
546 return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
547}
548
Akinobu Mita080481f52016-03-07 00:27:48 +0900549static struct spi_driver ds3234_driver = {
550 .driver = {
551 .name = "ds3234",
552 },
553 .probe = ds3234_probe,
Akinobu Mita080481f52016-03-07 00:27:48 +0900554};
555
556static int ds3234_register_driver(void)
557{
558 return spi_register_driver(&ds3234_driver);
559}
560
561static void ds3234_unregister_driver(void)
562{
563 spi_unregister_driver(&ds3234_driver);
564}
565
566#else
567
568static int ds3234_register_driver(void)
569{
570 return 0;
571}
572
573static void ds3234_unregister_driver(void)
574{
575}
576
577#endif
578
579static int __init ds323x_init(void)
580{
581 int ret;
582
583 ret = ds3232_register_driver();
584 if (ret) {
585 pr_err("Failed to register ds3232 driver: %d\n", ret);
586 return ret;
587 }
588
589 ret = ds3234_register_driver();
590 if (ret) {
591 pr_err("Failed to register ds3234 driver: %d\n", ret);
592 ds3232_unregister_driver();
593 }
594
595 return ret;
596}
597module_init(ds323x_init)
598
599static void __exit ds323x_exit(void)
600{
601 ds3234_unregister_driver();
602 ds3232_unregister_driver();
603}
604module_exit(ds323x_exit)
Roy Zangc03675f2010-08-10 18:02:20 -0700605
606MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
Akinobu Mita080481f52016-03-07 00:27:48 +0900607MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
608MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
Roy Zangc03675f2010-08-10 18:02:20 -0700609MODULE_LICENSE("GPL");
Akinobu Mita080481f52016-03-07 00:27:48 +0900610MODULE_ALIAS("spi:ds3234");